summaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorJonghun Han <jonghun.han@samsung.com>2011-07-21 15:46:19 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-07-21 17:28:39 +0900
commit1aee2add2179a46c93bd62137feca22b1822eda2 (patch)
tree324ad1126cf180fd216db42fc3b8adf6d7bb6c18 /arch/arm
parent268a7ef2f3a84b16a1b160bb171f70077bad5886 (diff)
downloadtalos-op-linux-1aee2add2179a46c93bd62137feca22b1822eda2.tar.gz
talos-op-linux-1aee2add2179a46c93bd62137feca22b1822eda2.zip
ARM: EXYNOS4: Add resource definition for FIMD
This patch adds resource definitions for EXYNOS4 FIMD. IRQ and SFR definitions are added. Signed-off-by: Jonghun Han <jonghun.han@samsung.com> Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-exynos4/include/mach/irqs.h4
-rw-r--r--arch/arm/mach-exynos4/include/mach/map.h3
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index e2995be40c3f..934d2a493982 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -138,6 +138,10 @@
#define IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6)
#define IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7)
+#define IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0)
+#define IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1)
+#define IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2)
+
#define MAX_COMBINER_NR 16
#define IRQ_ADC IRQ_ADC0
diff --git a/arch/arm/mach-exynos4/include/mach/map.h b/arch/arm/mach-exynos4/include/mach/map.h
index 0aa77fb707d2..44b796926f53 100644
--- a/arch/arm/mach-exynos4/include/mach/map.h
+++ b/arch/arm/mach-exynos4/include/mach/map.h
@@ -95,6 +95,8 @@
#define EXYNOS4_PA_MIPI_CSIS0 0x11880000
#define EXYNOS4_PA_MIPI_CSIS1 0x11890000
+#define EXYNOS4_PA_FIMD0 0x11C00000
+
#define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
#define EXYNOS4_PA_DWMCI 0x12550000
@@ -148,6 +150,7 @@
#define S5P_PA_FIMC3 EXYNOS4_PA_FIMC3
#define S5P_PA_MIPI_CSIS0 EXYNOS4_PA_MIPI_CSIS0
#define S5P_PA_MIPI_CSIS1 EXYNOS4_PA_MIPI_CSIS1
+#define S5P_PA_FIMD0 EXYNOS4_PA_FIMD0
#define S5P_PA_ONENAND EXYNOS4_PA_ONENAND
#define S5P_PA_ONENAND_DMA EXYNOS4_PA_ONENAND_DMA
#define S5P_PA_SDRAM EXYNOS4_PA_SDRAM
OpenPOWER on IntegriCloud