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| author | Len Brown <len.brown@intel.com> | 2012-06-04 00:35:19 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2012-06-04 00:35:19 -0400 |
| commit | 7e1bd6e38b1f30860ce25a014c6d6adfb0079f4a (patch) | |
| tree | 65c5898ba93007d4399150c7a127a670bcfbc30d /arch/arm/mach-tegra/common.c | |
| parent | 301f33fbcf4ced53b3de114846ecece5d6aafeeb (diff) | |
| parent | f8f5701bdaf9134b1f90e5044a82c66324d2073f (diff) | |
| download | talos-op-linux-7e1bd6e38b1f30860ce25a014c6d6adfb0079f4a.tar.gz talos-op-linux-7e1bd6e38b1f30860ce25a014c6d6adfb0079f4a.zip | |
Merge branch 'upstream' into bugfix-video
Update bugfix-video branch to 2.5-rc1
so I don't have to again resolve the
conflict in these patches vs. upstream.
Conflicts:
drivers/gpu/drm/gma500/psb_drv.c
text conflict: add comment vs delete neighboring line
keep just this:
/* igd_opregion_init(&dev_priv->opregion_dev); */
/* acpi_video_register(); */
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/arm/mach-tegra/common.c')
| -rw-r--r-- | arch/arm/mach-tegra/common.c | 28 |
1 files changed, 24 insertions, 4 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 22df10fb9972..204a5c8b0b57 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -82,10 +82,12 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = { { "pll_p_out1", "pll_p", 28800000, true }, { "pll_p_out2", "pll_p", 48000000, true }, { "pll_p_out3", "pll_p", 72000000, true }, - { "pll_p_out4", "pll_p", 108000000, true }, - { "sclk", "pll_p_out4", 108000000, true }, - { "hclk", "sclk", 108000000, true }, - { "pclk", "hclk", 54000000, true }, + { "pll_p_out4", "pll_p", 24000000, true }, + { "pll_c", "clk_m", 600000000, true }, + { "pll_c_out1", "pll_c", 120000000, true }, + { "sclk", "pll_c_out1", 120000000, true }, + { "hclk", "sclk", 120000000, true }, + { "pclk", "hclk", 60000000, true }, { "csite", NULL, 0, true }, { "emc", NULL, 0, true }, { "cpu", NULL, 0, true }, @@ -93,6 +95,17 @@ static __initdata struct tegra_clk_init_table tegra20_clk_init_table[] = { }; #endif +#ifdef CONFIG_ARCH_TEGRA_3x_SOC +static __initdata struct tegra_clk_init_table tegra30_clk_init_table[] = { + /* name parent rate enabled */ + { "clk_m", NULL, 0, true }, + { "pll_p", "clk_m", 408000000, true }, + { "pll_p_out1", "pll_p", 9600000, true }, + { NULL, NULL, 0, 0}, +}; +#endif + + static void __init tegra_init_cache(u32 tag_latency, u32 data_latency) { #ifdef CONFIG_CACHE_L2X0 @@ -127,8 +140,15 @@ void __init tegra30_init_early(void) { tegra_init_fuse(); tegra30_init_clocks(); + tegra_clk_init_from_table(tegra30_clk_init_table); tegra_init_cache(0x441, 0x551); tegra_pmc_init(); tegra_powergate_init(); } #endif + +void __init tegra_init_late(void) +{ + tegra_clk_debugfs_init(); + tegra_powergate_debugfs_init(); +} |

