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author | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 17:51:30 +0900 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-01-04 18:27:43 +0900 |
commit | 3c0fa647159895139d4a25f3d87b90af26789a5c (patch) | |
tree | 1ec43f87471c0ddabd3a89ce9bae8c7d32484609 /arch/arm/mach-s5pv210/clock.c | |
parent | 96ee39c445243dc58b71d72456a5bd19d9b04f31 (diff) | |
download | talos-op-linux-3c0fa647159895139d4a25f3d87b90af26789a5c.tar.gz talos-op-linux-3c0fa647159895139d4a25f3d87b90af26789a5c.zip |
ARM: S5PV210: Tidy init+disable clock usage and s3c24xx_register_clocks cleanup
This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pv210/clock.c')
-rw-r--r-- | arch/arm/mach-s5pv210/clock.c | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c index 019c3a69b0e4..061a9b67fa99 100644 --- a/arch/arm/mach-s5pv210/clock.c +++ b/arch/arm/mach-s5pv210/clock.c @@ -309,7 +309,7 @@ static struct clk_ops clk_fout_apll_ops = { .get_rate = s5pv210_clk_fout_apll_get_rate, }; -static struct clk init_clocks_disable[] = { +static struct clk init_clocks_off[] = { { .name = "pdma", .id = 0, @@ -1220,13 +1220,9 @@ static struct clk *clks[] __initdata = { void __init s5pv210_register_clocks(void) { - struct clk *clkp; - int ret; int ptr; - ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); - if (ret > 0) - printk(KERN_ERR "Failed to register %u clocks\n", ret); + s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) s3c_register_clksrc(sysclks[ptr], 1); @@ -1234,15 +1230,8 @@ void __init s5pv210_register_clocks(void) s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); - clkp = init_clocks_disable; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { - ret = s3c24xx_register_clock(clkp); - if (ret < 0) { - printk(KERN_ERR "Failed to register clock %s (%d)\n", - clkp->name, ret); - } - (clkp->enable)(clkp, 0); - } + s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_pwmclk_init(); } |