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authorShawn Guo <shawn.guo@linaro.org>2015-04-25 22:38:19 +0800
committerShawn Guo <shawn.guo@linaro.org>2015-06-03 14:44:30 +0800
commitf3a9249d096178d29bba69cece29da99a622ce28 (patch)
treeff86f86388e5ea7f55160f9d548c75ae3f451e8e /arch/arm/mach-imx/pm-imx5.c
parent9bbef18750b34fa1d476e46a7833867b49f856c4 (diff)
downloadtalos-op-linux-f3a9249d096178d29bba69cece29da99a622ce28.tar.gz
talos-op-linux-f3a9249d096178d29bba69cece29da99a622ce28.zip
ARM: imx5: let pm code map CCM block on its own
We are about to move imx5 clock driver into drivers/clk, so let's get imx5 pm code map CCM block on its own rather than relying on clock driver to do the mapping. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/pm-imx5.c')
-rw-r--r--arch/arm/mach-imx/pm-imx5.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mach-imx/pm-imx5.c b/arch/arm/mach-imx/pm-imx5.c
index f1f80ab73e69..b04025592d94 100644
--- a/arch/arm/mach-imx/pm-imx5.c
+++ b/arch/arm/mach-imx/pm-imx5.c
@@ -50,16 +50,19 @@
#define IMX5_DEFAULT_CPU_IDLE_STATE WAIT_UNCLOCKED_POWER_OFF
struct imx5_pm_data {
+ phys_addr_t ccm_addr;
phys_addr_t cortex_addr;
phys_addr_t gpc_addr;
};
static const struct imx5_pm_data imx51_pm_data __initconst = {
+ .ccm_addr = 0x73fd4000,
.cortex_addr = 0x83fa0000,
.gpc_addr = 0x73fd8000,
};
static const struct imx5_pm_data imx53_pm_data __initconst = {
+ .ccm_addr = 0x53fd4000,
.cortex_addr = 0x63fa0000,
.gpc_addr = 0x53fd8000,
};
@@ -68,11 +71,6 @@ static void __iomem *ccm_base;
static void __iomem *cortex_base;
static void __iomem *gpc_base;
-void __init imx5_pm_set_ccm_base(void __iomem *base)
-{
- ccm_base = base;
-}
-
/*
* set cpu low power mode before WFI instruction. This function is called
* mx5 because it can be used for mx51, and mx53.
@@ -208,6 +206,7 @@ static int __init imx5_pm_common_init(const struct imx5_pm_data *data)
arm_pm_idle = imx5_pm_idle;
+ ccm_base = ioremap(data->ccm_addr, SZ_16K);
cortex_base = ioremap(data->cortex_addr, SZ_16K);
gpc_base = ioremap(data->gpc_addr, SZ_16K);
WARN_ON(!ccm_base || !cortex_base || !gpc_base);
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