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authorKukjin Kim <kgene.kim@samsung.com>2011-09-16 16:38:43 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-09-16 16:38:43 +0900
commitbe6bb8cc8d2bd033a1f89983f2f13bdb3548a08f (patch)
tree2b7f76cc2154e5589a605f97a663c8afe4f6016f /arch/arm/mach-exynos4/platsmp.c
parentd03c35939d2a447093e60133156217d6512aa9e3 (diff)
parentb02b5da4d15d7f7a250888d003121e1b5b69d00b (diff)
downloadtalos-op-linux-be6bb8cc8d2bd033a1f89983f2f13bdb3548a08f.tar.gz
talos-op-linux-be6bb8cc8d2bd033a1f89983f2f13bdb3548a08f.zip
Merge branch 'next/topic-cpuid-rev' into next/topic-add-exynos4212
Diffstat (limited to 'arch/arm/mach-exynos4/platsmp.c')
-rw-r--r--arch/arm/mach-exynos4/platsmp.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c
index df6ef1b2f98b..a3346e36d0ae 100644
--- a/arch/arm/mach-exynos4/platsmp.c
+++ b/arch/arm/mach-exynos4/platsmp.c
@@ -30,9 +30,12 @@
#include <mach/regs-clock.h>
#include <mach/regs-pmu.h>
+#include <plat/cpu.h>
+
extern void exynos4_secondary_startup(void);
-#define CPU1_BOOT_REG S5P_VA_SYSRAM
+#define CPU1_BOOT_REG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
+ S5P_INFORM5 : S5P_VA_SYSRAM)
/*
* control for which core is the next to come out of the secondary
@@ -218,5 +221,6 @@ void __init platform_smp_prepare_cpus(unsigned int max_cpus)
* until it receives a soft interrupt, and then the
* secondary CPU branches to this address.
*/
- __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)), S5P_VA_SYSRAM);
+ __raw_writel(BSYM(virt_to_phys(exynos4_secondary_startup)),
+ CPU1_BOOT_REG);
}
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