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| author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2010-04-16 21:29:20 +0400 |
|---|---|---|
| committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-05-06 15:02:06 -0700 |
| commit | 002cb2d2f1dde524b2aef6e43922984f6d1c8adc (patch) | |
| tree | 0759d468cc34005aafcacf54e673eae7f7a8a326 /arch/arm/mach-davinci | |
| parent | 7034217467abe91b5bc63fc2993bb8eec1cf3c9f (diff) | |
| download | talos-op-linux-002cb2d2f1dde524b2aef6e43922984f6d1c8adc.tar.gz talos-op-linux-002cb2d2f1dde524b2aef6e43922984f6d1c8adc.zip | |
DA830 EVM: use DA8XX_AEMIF_*_BASE #define's
The board file #define's its own version of EMIFA base addresses, while there
are DA8XX_AEMIF_*_BASE macros #define'd in <mach/da8xx.h>. Start using them
instead.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci')
| -rw-r--r-- | arch/arm/mach-davinci/board-da830-evm.c | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c index 925705649ed0..8f079d2f1af9 100644 --- a/arch/arm/mach-davinci/board-da830-evm.c +++ b/arch/arm/mach-davinci/board-da830-evm.c @@ -33,9 +33,6 @@ #define DA830_EVM_PHY_MASK 0x0 #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */ -#define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000 -#define DA830_EMIF25_CONTROL_BASE 0x68000000 - /* * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4]. */ @@ -375,13 +372,13 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = { static struct resource da830_evm_nand_resources[] = { [0] = { /* First memory resource is NAND I/O window */ - .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE, - .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1, + .start = DA8XX_AEMIF_CS3_BASE, + .end = DA8XX_AEMIF_CS3_BASE + PAGE_SIZE - 1, .flags = IORESOURCE_MEM, }, [1] = { /* Second memory resource is AEMIF control registers */ - .start = DA830_EMIF25_CONTROL_BASE, - .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1, + .start = DA8XX_AEMIF_CTL_BASE, + .end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1, .flags = IORESOURCE_MEM, }, }; |
