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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-06-18 20:03:30 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2013-06-18 20:05:48 +0100 |
| commit | b3f288de7c8add67a3364e989b865b6537838662 (patch) | |
| tree | 389c80ae471e4e24f25e6c38862a89ee5d833d86 /arch/arm/mach-at91/at91rm9200_time.c | |
| parent | 04e71d72abec3e1a2b2ac10f96ced1a471ecb3aa (diff) | |
| parent | 8d962507007357d6fbbcbdd1647faa389a9aed6d (diff) | |
| download | talos-op-linux-b3f288de7c8add67a3364e989b865b6537838662.tar.gz talos-op-linux-b3f288de7c8add67a3364e989b865b6537838662.zip | |
Merge branch 'for-rmk/hugepages' of git://git.linaro.org/people/stevecapper/linux into devel-stable
These changes bring both HugeTLB support and Transparent HugePage
(THP) support to ARM. Only long descriptors (LPAE) are supported
in this series.
The code has been tested on an Arndale board (Exynos 5250).
Diffstat (limited to 'arch/arm/mach-at91/at91rm9200_time.c')
| -rw-r--r-- | arch/arm/mach-at91/at91rm9200_time.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c index 2acdff4c1dfe..180b3024bec3 100644 --- a/arch/arm/mach-at91/at91rm9200_time.c +++ b/arch/arm/mach-at91/at91rm9200_time.c @@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev) static struct clock_event_device clkevt = { .name = "at91_tick", .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, .rating = 150, .set_next_event = clkevt32k_next_event, .set_mode = clkevt32k_mode, @@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void) at91_st_write(AT91_ST_RTMR, 1); /* Setup timer clockevent, with minimum of two ticks (important!!) */ + clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift); + clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt); + clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1; clkevt.cpumask = cpumask_of(0); - clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK, - 2, AT91_ST_ALMV); + clockevents_register_device(&clkevt); /* register clocksource */ clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK); |
