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authorChristoffer Dall <christoffer.dall@linaro.org>2013-08-06 05:34:16 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-08-13 20:25:06 +0100
commit8947c09d05da9f0436f423518f449beaa5ea1bdc (patch)
treeefb05ec3b49d2e452cb9257548514962ed4cbeb0 /arch/arm/kvm/mmu.c
parent4bfab2034bab9374eba1921cf7bd51fd8d48661b (diff)
downloadtalos-op-linux-8947c09d05da9f0436f423518f449beaa5ea1bdc.tar.gz
talos-op-linux-8947c09d05da9f0436f423518f449beaa5ea1bdc.zip
ARM: 7808/1: KVM: mm: Get rid of L_PTE_USER ref from PAGE_S2_DEVICE
THe L_PTE_USER actually has nothing to do with stage 2 mappings and the L_PTE_S2_RDWR value sets the readable bit, which was what L_PTE_USER was used for before proper handling of stage 2 memory defines. Changelog: [v3]: Drop call to kvm_set_s2pte_writable in mmu.c [v2]: Change default mappings to be r/w instead of r/o, as per Marc Zyngier's suggestion. Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kvm/mmu.c')
-rw-r--r--arch/arm/kvm/mmu.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index ca6bea4859b4..9583c95adbb7 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -495,7 +495,6 @@ int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa,
for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) {
pte_t pte = pfn_pte(pfn, PAGE_S2_DEVICE);
- kvm_set_s2pte_writable(&pte);
ret = mmu_topup_memory_cache(&cache, 2, 2);
if (ret)
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