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authorWill Deacon <will.deacon@arm.com>2012-07-29 12:36:28 +0100
committerWill Deacon <will.deacon@arm.com>2012-08-23 11:35:52 +0100
commit6dbc00297095122ea89e016ce6affad0b7c0ddac (patch)
treef3c01a92818dd1a8e9cf9cd9a52cae8229332c55 /arch/arm/kernel/perf_event_v6.c
parent04236f9fe07462849215c67cae6147661368bfad (diff)
downloadtalos-op-linux-6dbc00297095122ea89e016ce6affad0b7c0ddac.tar.gz
talos-op-linux-6dbc00297095122ea89e016ce6affad0b7c0ddac.zip
ARM: perf: prepare for moving CPU PMU code into separate file
The CPU PMU code is tightly coupled with generic ARM PMU handling code. This makes it cumbersome when trying to add support for other ARM PMUs (e.g. interconnect, L2 cache controller, bus) as the generic parts of the code are not readily reusable. This patch cleans up perf_event.c so that reusable code is exposed via header files to other potential PMU drivers. The CPU code is consistently named to identify it as such and also to prepare for moving it into a separate file. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm/kernel/perf_event_v6.c')
-rw-r--r--arch/arm/kernel/perf_event_v6.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/kernel/perf_event_v6.c b/arch/arm/kernel/perf_event_v6.c
index a4328b12eed5..6ccc07971745 100644
--- a/arch/arm/kernel/perf_event_v6.c
+++ b/arch/arm/kernel/perf_event_v6.c
@@ -645,7 +645,7 @@ armv6mpcore_pmu_disable_event(struct hw_perf_event *hwc,
static int armv6_map_event(struct perf_event *event)
{
- return map_cpu_event(event, &armv6_perf_map,
+ return armpmu_map_event(event, &armv6_perf_map,
&armv6_perf_cache_map, 0xFF);
}
@@ -679,7 +679,7 @@ static struct arm_pmu *__devinit armv6pmu_init(void)
static int armv6mpcore_map_event(struct perf_event *event)
{
- return map_cpu_event(event, &armv6mpcore_perf_map,
+ return armpmu_map_event(event, &armv6mpcore_perf_map,
&armv6mpcore_perf_cache_map, 0xFF);
}
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