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authorHiroshi Doyu <hdoyu@nvidia.com>2013-01-22 07:52:01 +0200
committerStephen Warren <swarren@nvidia.com>2013-01-28 10:40:59 -0700
commite9d6b3358ac35901ccc6a4a5a317670fa469db25 (patch)
tree3908982a7950a72a10b61543c09be6d9adc0765b /arch/arm/include
parenta8a6930157e0e4a2d57abefee487fc4ceba4d53e (diff)
downloadtalos-op-linux-e9d6b3358ac35901ccc6a4a5a317670fa469db25.tar.gz
talos-op-linux-e9d6b3358ac35901ccc6a4a5a317670fa469db25.zip
ARM: Add API to detect SCU base address from CP15
Add API to detect SCU base address from CP15. Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/smp_scu.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/include/asm/smp_scu.h b/arch/arm/include/asm/smp_scu.h
index 4eb6d005ffaa..006f02681cd8 100644
--- a/arch/arm/include/asm/smp_scu.h
+++ b/arch/arm/include/asm/smp_scu.h
@@ -6,6 +6,23 @@
#define SCU_PM_POWEROFF 3
#ifndef __ASSEMBLER__
+
+#include <asm/cputype.h>
+
+static inline bool scu_a9_has_base(void)
+{
+ return read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9;
+}
+
+static inline unsigned long scu_a9_get_base(void)
+{
+ unsigned long pa;
+
+ asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
+
+ return pa;
+}
+
unsigned int scu_get_core_count(void __iomem *);
void scu_enable(void __iomem *);
int scu_power_mode(void __iomem *, unsigned int);
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