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authorChen-Yu Tsai <wens@csie.org>2017-06-03 22:44:27 +0800
committerChen-Yu Tsai <wens@csie.org>2017-06-09 20:22:50 +0800
commit694ca10ca059812219a2841f3c385aca8f6a3b17 (patch)
tree14b94bf85d2e98ef30e7b5dbbc1322154a3faf59 /arch/arm/boot
parent21b29920933086b34f4a58692a079e9914115019 (diff)
downloadtalos-op-linux-694ca10ca059812219a2841f3c385aca8f6a3b17.tar.gz
talos-op-linux-694ca10ca059812219a2841f3c385aca8f6a3b17.zip
ARM: sun8i: a83t: Add device node for R_PIO
The A83T has 1 pingroup with 13 pins belonging to the R_PIO or special pin controller. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/sun8i-a83t.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 49aeb56970ba..bf63e3b77572 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -44,6 +44,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
+
/ {
interrupt-parent = <&gic>;
#address-cells = <1>;
@@ -280,5 +282,18 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+ r_pio: pinctrl@1f02c00 {
+ compatible = "allwinner,sun8i-a83t-r-pinctrl";
+ reg = <0x01f02c00 0x400>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
+ <&osc16Md512>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
};
};
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