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author | Boris BREZILLON <b.brezillon@overkiz.com> | 2013-08-07 10:49:01 +0200 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2013-10-16 15:47:08 +0200 |
commit | d7d1d45cc46d79ab9227288e225aa51078855729 (patch) | |
tree | a2cd1cb9d532439e35628eb631cbce9c981ba05a /arch/arm/boot/dts/sama5d3_tcb1.dtsi | |
parent | d195608acc78db293468694ed5225a39e440429d (diff) | |
download | talos-op-linux-d7d1d45cc46d79ab9227288e225aa51078855729.tar.gz talos-op-linux-d7d1d45cc46d79ab9227288e225aa51078855729.zip |
ARM: at91/dt: split sama5d3 peripheral definitions
This patch splits the sama5d3 SoCs definition:
- a common base for all sama5d3 SoCs (sama5d3.dtsi)
- several optional peripheral definitions which will be included by sama5d3
specific SoCs (sama5d3_'periph name'.dtsi)
- sama5d3 specific SoC definitions (sama5d3x.dtsi)
This provides a better representation of the real hardware (drop unneed
dt nodes) and avoids peripheral id conflict (which is not the case for
current sama5d3 SoCs, but could be if other SoCs of this family are
released).
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
[nicolas.ferre@atmel.com: add more "sama5d3?" compatibility strings]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d3_tcb1.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sama5d3_tcb1.dtsi | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama5d3_tcb1.dtsi b/arch/arm/boot/dts/sama5d3_tcb1.dtsi new file mode 100644 index 000000000000..5264bb4a6998 --- /dev/null +++ b/arch/arm/boot/dts/sama5d3_tcb1.dtsi @@ -0,0 +1,27 @@ +/* + * at91sama5d3_tcb1.dtsi - Device Tree Include file for AT91SAM9x5 SoC with + * 2 TC blocks. + * + * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com> + * + * Licensed under GPLv2. + */ + +#include <dt-bindings/pinctrl/at91.h> +#include <dt-bindings/interrupt-controller/irq.h> + +/ { + aliases { + tcb1 = &tcb1; + }; + + ahb { + apb { + tcb1: timer@f8014000 { + compatible = "atmel,at91sam9x5-tcb"; + reg = <0xf8014000 0x100>; + interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>; + }; + }; + }; +}; |