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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2015-10-10 00:41:26 +0300
committerSimon Horman <horms+renesas@verge.net.au>2015-10-12 09:06:59 +0900
commitf9953c5e2a84ffc309ca5f6a281528907a3c8a39 (patch)
tree635d5544545b1b936f89f11ab6a8e7267154660e /arch/arm/boot/dts/r8a7791-porter.dts
parent2685a2cefe6bcd17e6b407799f41369c7dad422d (diff)
downloadtalos-op-linux-f9953c5e2a84ffc309ca5f6a281528907a3c8a39.tar.gz
talos-op-linux-f9953c5e2a84ffc309ca5f6a281528907a3c8a39.zip
ARM: shmobile: porter: enable PCIe
Enable the PCIe controller and clock for the Porter board. This patch is analogous to the commit 485f3ce67c11 ("ARM: shmobile: henninger: Enable PCIe Controller & PCIe bus clock") as there are no differences between the boards in this respect. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7791-porter.dts')
-rw-r--r--arch/arm/boot/dts/r8a7791-porter.dts8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7791-porter.dts b/arch/arm/boot/dts/r8a7791-porter.dts
index 4eebc67773d2..c46aad3954f4 100644
--- a/arch/arm/boot/dts/r8a7791-porter.dts
+++ b/arch/arm/boot/dts/r8a7791-porter.dts
@@ -244,3 +244,11 @@
};
};
};
+
+&pcie_bus_clk {
+ status = "okay";
+};
+
+&pciec {
+ status = "okay";
+};
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