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authorAndrew Lunn <andrew@lunn.ch>2012-11-17 15:22:28 +0100
committerThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-11-20 14:46:50 +0100
commit1611f872513735ac7105535689c0dd668fbf1c04 (patch)
treed8fdd2f1f9b7df6b6e3543af6435b7d11f5da45e /arch/arm/boot/dts/kirkwood.dtsi
parent5b03df9ace680d7cdd34a69dfd85ca5f74159d18 (diff)
downloadtalos-op-linux-1611f872513735ac7105535689c0dd668fbf1c04.tar.gz
talos-op-linux-1611f872513735ac7105535689c0dd668fbf1c04.zip
ARM: Kirkwood: switch to DT clock providers
With true DT clock providers available switch Kirkwood clock setup in DT- enabled boards. While AUXDATA can be removed completely from bus probing, some devices still don't know about DT. Therefore, some clkdev aliases are created until these devices also move to DT. Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Diffstat (limited to 'arch/arm/boot/dts/kirkwood.dtsi')
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 4e5b8154a5be..7a9fac0d4251 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -19,6 +19,12 @@
#address-cells = <1>;
#size-cells = <1>;
+ core_clk: core-clocks@10030 {
+ compatible = "marvell,kirkwood-core-clock";
+ reg = <0x10030 0x4>;
+ #clock-cells = <1>;
+ };
+
gpio0: gpio@10100 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
@@ -42,6 +48,7 @@
reg = <0x12000 0x100>;
reg-shift = <2>;
interrupts = <33>;
+ clocks = <&gate_clk 7>;
/* set clock-frequency in board dts */
status = "disabled";
};
@@ -51,6 +58,7 @@
reg = <0x12100 0x100>;
reg-shift = <2>;
interrupts = <34>;
+ clocks = <&gate_clk 7>;
/* set clock-frequency in board dts */
status = "disabled";
};
@@ -68,12 +76,21 @@
cell-index = <0>;
interrupts = <23>;
reg = <0x10600 0x28>;
+ clocks = <&gate_clk 7>;
status = "disabled";
};
+ gate_clk: clock-gating-control@2011c {
+ compatible = "marvell,kirkwood-gating-clock";
+ reg = <0x2011c 0x4>;
+ clocks = <&core_clk 0>;
+ #clock-cells = <1>;
+ };
+
wdt@20300 {
compatible = "marvell,orion-wdt";
reg = <0x20300 0x28>;
+ clocks = <&gate_clk 7>;
status = "okay";
};
@@ -81,6 +98,8 @@
compatible = "marvell,orion-sata";
reg = <0x80000 0x5000>;
interrupts = <21>;
+ clocks = <&gate_clk 14>, <&gate_clk 15>;
+ clock-names = "0", "1";
status = "disabled";
};
@@ -94,6 +113,7 @@
reg = <0x3000000 0x400>;
chip-delay = <25>;
/* set partition map and/or chip-delay in board dts */
+ clocks = <&gate_clk 7>;
status = "disabled";
};
@@ -104,6 +124,7 @@
#size-cells = <0>;
interrupts = <29>;
clock-frequency = <100000>;
+ clocks = <&gate_clk 7>;
status = "disabled";
};
@@ -113,6 +134,7 @@
<0xf5000000 0x800>;
reg-names = "regs", "sram";
interrupts = <22>;
+ clocks = <&gate_clk 17>;
status = "okay";
};
};
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