diff options
author | Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> | 2016-03-04 13:56:09 -0800 |
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committer | Will Deacon <will.deacon@arm.com> | 2016-05-03 18:23:01 +0100 |
commit | 1bd37a6835bef0ecd2138cb42f9088fd890f9939 (patch) | |
tree | c2b9cb2eb6d21b7d12d7a846e177d67fd7638d32 /Documentation | |
parent | 4e3e9b6997b24383264031198bf8905b3746221e (diff) | |
download | talos-op-linux-1bd37a6835bef0ecd2138cb42f9088fd890f9939.tar.gz talos-op-linux-1bd37a6835bef0ecd2138cb42f9088fd890f9939.zip |
iommu/arm-smmu: Workaround for ThunderX erratum #27704
Due to erratum #27704, the CN88xx SMMUv2 implementation supports only
shared ASID and VMID numberspaces.
This patch ensures that ASID and VMIDs are unique across all SMMU
instances on affected Cavium systems.
Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Signed-off-by: Akula Geethasowjanya <Geethasowjanya.Akula@caviumnetworks.com>
[will: commit message, comments and formatting]
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/arm64/silicon-errata.txt | 1 | ||||
-rw-r--r-- | Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/arm64/silicon-errata.txt b/Documentation/arm64/silicon-errata.txt index ba4b6acfc545..806f91cdd45d 100644 --- a/Documentation/arm64/silicon-errata.txt +++ b/Documentation/arm64/silicon-errata.txt @@ -57,3 +57,4 @@ stable kernels. | Cavium | ThunderX ITS | #22375, #24313 | CAVIUM_ERRATUM_22375 | | Cavium | ThunderX GICv3 | #23154 | CAVIUM_ERRATUM_23154 | | Cavium | ThunderX Core | #27456 | CAVIUM_ERRATUM_27456 | +| Cavium | ThunderX SMMUv2 | #27704 | N/A | diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt index 718074501fcb..19fe6f2c83f6 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt @@ -16,6 +16,7 @@ conditions. "arm,mmu-400" "arm,mmu-401" "arm,mmu-500" + "cavium,smmu-v2" depending on the particular implementation and/or the version of the architecture implemented. |