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author | Liviu Dudau <Liviu.Dudau@arm.com> | 2015-05-20 11:42:37 +0100 |
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committer | Liviu Dudau <Liviu.Dudau@arm.com> | 2015-05-22 16:25:40 +0100 |
commit | 41e177b37bd558980d50609116f7810b46fe4ce0 (patch) | |
tree | 2b125012b22e8a441fb5713df35b0ec213993814 /Documentation/devicetree/bindings/arm/arm-boards | |
parent | 796c2b35a4105aa02c6a7af6de659086363d47f7 (diff) | |
download | talos-op-linux-41e177b37bd558980d50609116f7810b46fe4ce0.tar.gz talos-op-linux-41e177b37bd558980d50609116f7810b46fe4ce0.zip |
Documentation: bindings: Add DT bindings for ARM Juno boards.
List the required properties and nodes used to describe the
ARM Juno boards.
Signed-off-by: Liviu Dudau <Liviu.Dudau@arm.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/arm-boards')
-rw-r--r-- | Documentation/devicetree/bindings/arm/arm-boards | 66 |
1 files changed, 66 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards index b78564b2b201..1a709970e7f7 100644 --- a/Documentation/devicetree/bindings/arm/arm-boards +++ b/Documentation/devicetree/bindings/arm/arm-boards @@ -157,3 +157,69 @@ Example: }; }; + +ARM Versatile Express Boards +----------------------------- +For details on the device tree bindings for ARM Versatile Express boards +please consult the vexpress.txt file in the same directory as this file. + +ARM Juno Boards +---------------- +The Juno boards are targeting development for AArch64 systems. The first +iteration, Juno r0, is a vehicle for evaluating big.LITTLE on AArch64, +with the second iteration, Juno r1, mainly aimed at development of PCIe +based systems. Juno r1 also has support for AXI masters placed on the TLX +connectors to join the coherency domain. + +Juno boards are described in a similar way to ARM Versatile Express boards, +with the motherboard part of the hardware being described in a separate file +to highlight the fact that is part of the support infrastructure for the SoC. +Juno device tree bindings also share the Versatile Express bindings as +described under the RS1 memory mapping. + +Required properties (in root node): + compatible = "arm,juno"; /* For Juno r0 board */ + compatible = "arm,juno-r1"; /* For Juno r1 board */ + +Required nodes: +The description for the board must include: + - a "psci" node describing the boot method used for the secondary CPUs. + A detailed description of the bindings used for "psci" nodes is present + in the psci.txt file. + - a "cpus" node describing the available cores and their associated + "enable-method"s. For more details see cpus.txt file. + +Example: + +/dts-v1/; +/ { + model = "ARM Juno development board (r0)"; + compatible = "arm,juno", "arm,vexpress"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + A57_0: cpu@0 { + compatible = "arm,cortex-a57","arm,armv8"; + reg = <0x0 0x0>; + device_type = "cpu"; + enable-method = "psci"; + }; + + ..... + + A53_0: cpu@100 { + compatible = "arm,cortex-a53","arm,armv8"; + reg = <0x0 0x100>; + device_type = "cpu"; + enable-method = "psci"; + }; + + ..... + }; + +}; |