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author | Stephen Boyd <sboyd@codeaurora.org> | 2015-10-14 11:23:09 -0700 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-10-14 11:28:17 -0700 |
commit | e79b202c632f24f49f2eb9459b88b5fd9e332263 (patch) | |
tree | 5e98407067ea20a5799f1e567faff6159acc0fb9 | |
parent | 9f30a04d768f64280dc0c40b730746e82f298d88 (diff) | |
download | talos-op-linux-e79b202c632f24f49f2eb9459b88b5fd9e332263.tar.gz talos-op-linux-e79b202c632f24f49f2eb9459b88b5fd9e332263.zip |
Partially revert "clk: mvebu: Convert to clk_hw based provider APIs"
This partially reverts commit eca61c9ff2588e1df373e61078e1874976315839.
Thomas reports that it causes regressions on Armada XP devices.
This is because of_clk_get_parent_name() relies on the property
'clock-output-names' to resolve the name of a clock's parent,
without trying to get the clock from the framework and call
__clk_get_name(). Given that Armada XP devices don't have the
'clock-output-names' property, of_clk_get_parent_name() returns
the name of the node which doesn't match the actual parent
clock's name at all, causing CPU clocks to never link up with
their parents.
Reported-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r-- | drivers/clk/mvebu/clk-cpu.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c index 5837eb8a212f..85da8b983256 100644 --- a/drivers/clk/mvebu/clk-cpu.c +++ b/drivers/clk/mvebu/clk-cpu.c @@ -197,6 +197,7 @@ static void __init of_cpu_clk_setup(struct device_node *node) for_each_node_by_type(dn, "cpu") { struct clk_init_data init; struct clk *clk; + struct clk *parent_clk; char *clk_name = kzalloc(5, GFP_KERNEL); int cpu, err; @@ -208,8 +209,9 @@ static void __init of_cpu_clk_setup(struct device_node *node) goto bail_out; sprintf(clk_name, "cpu%d", cpu); + parent_clk = of_clk_get(node, 0); - cpuclk[cpu].parent_name = of_clk_get_parent_name(node, 0); + cpuclk[cpu].parent_name = __clk_get_name(parent_clk); cpuclk[cpu].clk_name = clk_name; cpuclk[cpu].cpu = cpu; cpuclk[cpu].reg_base = clock_complex_base; |