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authorHonghui Zhang <honghui.zhang@mediatek.com>2018-10-15 16:08:53 +0800
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2018-10-15 15:10:30 +0100
commita7f172ab6a8e755e60311f27512034b0441ef421 (patch)
tree1472573b7578e031eef09381d3223e3b8c0a0f73
parent074d6f32689ce05a084b6fa3db38445745bf11cc (diff)
downloadtalos-op-linux-a7f172ab6a8e755e60311f27512034b0441ef421.tar.gz
talos-op-linux-a7f172ab6a8e755e60311f27512034b0441ef421.zip
PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCI
commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") erroneously set the class type for MT7622 to PCI_CLASS_BRIDGE_HOST. The PCIe controller of MT7622 integrates a Root Port that has type 1 configuration space header and related bridge windows. The HW default value of this bridge's class type is invalid. Fix its class type and set it to PCI_CLASS_BRIDGE_PCI to match the hardware implementation. Fixes: 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: reworked the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
-rw-r--r--drivers/pci/controller/pcie-mediatek.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index 0d100f56cb88..8d1364c31774 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -432,7 +432,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
val = PCI_VENDOR_ID_MEDIATEK;
writew(val, port->base + PCIE_CONF_VEND_ID);
- val = PCI_CLASS_BRIDGE_HOST;
+ val = PCI_CLASS_BRIDGE_PCI;
writew(val, port->base + PCIE_CONF_CLASS_ID);
}
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