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authorH. Peter Anvin <hpa@linux.intel.com>2010-05-19 13:40:14 -0700
committerH. Peter Anvin <hpa@linux.intel.com>2010-05-19 13:47:11 -0700
commita75af580bb1fd261bf63cc00e4b324e17ceb15cf (patch)
tree4e49d335c4211b580dc4bcbbdad1a5e609ef46e8
parenta875c01944f0d750eeb1ef3133feceb13f13c4b3 (diff)
downloadtalos-op-linux-a75af580bb1fd261bf63cc00e4b324e17ceb15cf.tar.gz
talos-op-linux-a75af580bb1fd261bf63cc00e4b324e17ceb15cf.zip
x86, mrst: make mrst_identify_cpu() an inline returning enum
We have an enum, might as well use it. While we're at it, make it an inline... there is really no point in calling a function for this stuff. LKML-Reference: <1274295685-6774-3-git-send-email-jacob.jun.pan@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com>
-rw-r--r--arch/x86/include/asm/mrst.h7
-rw-r--r--arch/x86/kernel/mrst.c17
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 67ad31545778..1869c18d15ca 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -11,7 +11,6 @@
#ifndef _ASM_X86_MRST_H
#define _ASM_X86_MRST_H
extern int pci_mrst_init(void);
-extern int mrst_identify_cpu(void);
extern int mrst_timer_options __cpuinitdata;
int __init sfi_parse_mrtc(struct sfi_table_header *table);
@@ -27,6 +26,12 @@ enum mrst_cpu_type {
MRST_CPU_CHIP_PENWELL,
};
+extern enum mrst_cpu_type __mrst_cpu_chip;
+static enum mrst_cpu_type mrst_identify_cpu(void)
+{
+ return __mrst_cpu_chip;
+}
+
enum mrst_timer_options {
MRST_TIMER_DEFAULT,
MRST_TIMER_APBT_ONLY,
diff --git a/arch/x86/kernel/mrst.c b/arch/x86/kernel/mrst.c
index 636b53bd4198..967f2686adb0 100644
--- a/arch/x86/kernel/mrst.c
+++ b/arch/x86/kernel/mrst.c
@@ -50,7 +50,8 @@ int mrst_timer_options __cpuinitdata;
static u32 sfi_mtimer_usage[SFI_MTMR_MAX_NUM];
static struct sfi_timer_table_entry sfi_mtimer_array[SFI_MTMR_MAX_NUM];
-static int mrst_cpu_chip;
+enum mrst_cpu_type __mrst_cpu_chip;
+EXPORT_SYMBOL_GPL(__mrst_cpu_chip);
int sfi_mtimer_num;
@@ -233,25 +234,19 @@ void __init mrst_rtc_init(void)
sfi_table_parse(SFI_SIG_MRTC, NULL, NULL, sfi_parse_mrtc);
}
-int mrst_identify_cpu(void)
-{
- return mrst_cpu_chip;
-}
-EXPORT_SYMBOL_GPL(mrst_identify_cpu);
-
void __cpuinit mrst_arch_setup(void)
{
if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x27)
- mrst_cpu_chip = MRST_CPU_CHIP_PENWELL;
+ __mrst_cpu_chip = MRST_CPU_CHIP_PENWELL;
else if (boot_cpu_data.x86 == 6 && boot_cpu_data.x86_model == 0x26)
- mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
+ __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
else {
pr_err("Unknown Moorestown CPU (%d:%d), default to Lincroft\n",
boot_cpu_data.x86, boot_cpu_data.x86_model);
- mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
+ __mrst_cpu_chip = MRST_CPU_CHIP_LINCROFT;
}
pr_debug("Moorestown CPU %s identified\n",
- (mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ?
+ (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT) ?
"Lincroft" : "Penwell");
}
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