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author | Shaohui Xie <Shaohui.Xie@nxp.com> | 2016-09-13 16:09:55 +0800 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2016-10-21 21:33:37 +0800 |
commit | 981034a2bfcaff5c95dafde24d7abfe7f9025c19 (patch) | |
tree | 9b5c688329ff66f877731d6a311ea4cd54d4b48d | |
parent | 75b637f3bdd29883e4ab56d4dee39b9a7ef9d501 (diff) | |
download | talos-op-linux-981034a2bfcaff5c95dafde24d7abfe7f9025c19.tar.gz talos-op-linux-981034a2bfcaff5c95dafde24d7abfe7f9025c19.zip |
dt-bindings: fsl: add LS1043A/LS1046A/LS2080A compatible for SCFG and DCFG
SCFG and DCFG are SoC-specific devices can be found on SoCs like LS1021A,
LS1043A and LS1046A, this patch updates bindings for SCFG and DCFG to
reflect more SoCs.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r-- | Documentation/devicetree/bindings/arm/fsl.txt | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt index 2efbc097c342..a81277fdc7bc 100644 --- a/Documentation/devicetree/bindings/arm/fsl.txt +++ b/Documentation/devicetree/bindings/arm/fsl.txt @@ -97,7 +97,7 @@ Freescale LS1021A Platform Device Tree Bindings Required root node compatible properties: - compatible = "fsl,ls1021a"; -Freescale LS1021A SoC-specific Device Tree Bindings +Freescale SoC-specific Device Tree Bindings ------------------------------------------- Freescale SCFG @@ -105,7 +105,11 @@ Freescale SCFG configuration and status registers for the chip. Such as getting PEX port status. Required properties: - - compatible: should be "fsl,ls1021a-scfg" + - compatible: Should contain a chip-specific compatible string, + Chip-specific strings are of the form "fsl,<chip>-scfg", + The following <chip>s are known to be supported: + ls1021a, ls1043a, ls1046a, ls2080a. + - reg: should contain base address and length of SCFG memory-mapped registers Example: @@ -119,7 +123,11 @@ Freescale DCFG configuration and status for the device. Such as setting the secondary core start address and release the secondary core from holdoff and startup. Required properties: - - compatible: should be "fsl,ls1021a-dcfg" + - compatible: Should contain a chip-specific compatible string, + Chip-specific strings are of the form "fsl,<chip>-dcfg", + The following <chip>s are known to be supported: + ls1021a, ls1043a, ls1046a, ls2080a. + - reg : should contain base address and length of DCFG memory-mapped registers Example: |