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| author | Paul Mundt <lethal@linux-sh.org> | 2010-09-07 16:12:26 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2010-09-07 16:12:26 +0900 |
| commit | 2c5f674339d5e4c02cca7af13ec02bd9b5a96b60 (patch) | |
| tree | 7327f35f706a9847afaf05a5fd019f7206c534ce | |
| parent | 2dbfa1e37dc703631d5421e0b04aecc5a7aff37d (diff) | |
| download | talos-op-linux-2c5f674339d5e4c02cca7af13ec02bd9b5a96b60.tar.gz talos-op-linux-2c5f674339d5e4c02cca7af13ec02bd9b5a96b60.zip | |
sh: Establish a SuperHyway<->PCIe window mapping on SH7786 PCIe.
This bumps up the low address to match the physical memory windows for
SHway<->PCIe transfers. The previous implementation was banking on a 1:1
virt<->phys SHway mapping, which doesn't apply here.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| -rw-r--r-- | arch/sh/drivers/pci/pcie-sh7786.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c index 40b0ed042236..4cd83140579b 100644 --- a/arch/sh/drivers/pci/pcie-sh7786.c +++ b/arch/sh/drivers/pci/pcie-sh7786.c @@ -354,8 +354,8 @@ static int pcie_init(struct sh7786_pcie_port *port) __raw_writel(((roundup_pow_of_two(size) / SZ_256K) - 1) << 18, chan->reg_base + SH4A_PCIEPAMR(i)); + pci_write_reg(chan, res->start, SH4A_PCIEPARL(i)); pci_write_reg(chan, 0x00000000, SH4A_PCIEPARH(i)); - pci_write_reg(chan, 0x00000000, SH4A_PCIEPARL(i)); enable_mask = MASK_PARE; if (res->flags & IORESOURCE_IO) |
