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| author | Misael Lopez Cruz <misael.lopez@ti.com> | 2015-06-08 16:03:47 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2015-06-08 18:51:26 +0100 |
| commit | 19db62ea0558d71844847cdf4c65a655df2ab69f (patch) | |
| tree | 901b33c14404a775c414e4ee905063c4396afec1 | |
| parent | 518f6bab13842a5f25bd8f89b1cae32aa8adf91f (diff) | |
| download | talos-op-linux-19db62ea0558d71844847cdf4c65a655df2ab69f.tar.gz talos-op-linux-19db62ea0558d71844847cdf4c65a655df2ab69f.zip | |
ASoC: davinci-mcasp: Logic low for inactive output slots
The default state when serializers are in inactive slots is Hi-Z.
In some cases, there are no additional components driving the data
lines to a safe state so they might have noise.
While in inactive slots, the McASP AXR pins configured as outputs
can be driven low through the serializer pin drive mode setting
(DISMOD) to prevent such noise.
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | sound/soc/davinci/davinci-mcasp.c | 2 | ||||
| -rw-r--r-- | sound/soc/davinci/davinci-mcasp.h | 5 |
2 files changed, 6 insertions, 1 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 56da8ce1faf3..68356f2c78f8 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c @@ -686,6 +686,8 @@ static int mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream, if (mcasp->serial_dir[i] == TX_MODE && tx_ser < max_active_serializers) { mcasp_set_bits(mcasp, DAVINCI_MCASP_PDIR_REG, AXR(i)); + mcasp_mod_bits(mcasp, DAVINCI_MCASP_XRSRCTL_REG(i), + DISMOD_LOW, DISMOD_MASK); tx_ser++; } else if (mcasp->serial_dir[i] == RX_MODE && rx_ser < max_active_serializers) { diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h index 79dc511180bf..a3be108a8c17 100644 --- a/sound/soc/davinci/davinci-mcasp.h +++ b/sound/soc/davinci/davinci-mcasp.h @@ -215,7 +215,10 @@ * DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits */ #define MODE(val) (val) -#define DISMOD (val)(val<<2) +#define DISMOD_3STATE (0x0) +#define DISMOD_LOW (0x2 << 2) +#define DISMOD_HIGH (0x3 << 2) +#define DISMOD_MASK DISMOD_HIGH #define TXSTATE BIT(4) #define RXSTATE BIT(5) #define SRMOD_MASK 3 |
