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authorJim Yuan <jim.yuan@supermicro.com>2019-03-25 09:49:24 -0700
committerStewart Smith <stewart@linux.ibm.com>2019-04-05 14:46:19 +1100
commitf5da1def3a765f66a837707202e7087e2b40469f (patch)
treede33c1cfb319747c3791c62ec867a177deb48273
parentdc7af34d2c160fa2144d09d5a7772d367cdce638 (diff)
downloadtalos-op-build-f5da1def3a765f66a837707202e7087e2b40469f.tar.gz
talos-op-build-f5da1def3a765f66a837707202e7087e2b40469f.zip
Add p8dtu platform
This contains the p8dtu platform from SuperMicro. It has previously lived out of tree. Like other POWER8 platforms, several Hostboot patches are required. Since Hostboot does not have the ability to have per-platform code, this comes in as patches. Signed-off-by: Jim Yuan <jim.yuan@supermicro.com> [stewart: cleanup and longer commit message] Signed-off-by: Stewart Smith <stewart@linux.ibm.com>
-rw-r--r--openpower/configs/hostboot/p8dtu.config70
-rw-r--r--openpower/configs/p8dtu_defconfig67
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0001-Memory-Interleaving-Grouping-change-for-p8dtu.patch27
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0002-Support-130W-Turismo-Parts.patch40
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0003-Add-support-for-memory-voltage-control-for-p8dtu.patch49
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0004-change-esel-command-netfn-to-IBM-0x3a.patch26
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0005-change-pnor-response-command-to-0x7.patch26
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0006-send-board-ID-to-ipmi.patch108
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0007-read-riser-id-from-CPLD.patch95
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0008-Fill-board-mfg-time-and-date-in-FRU3.-It-is-read-fro.patch99
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0009-Hardcode-DIMM-pairing-for-RAS.-Fix-the-issue-that-MB.patch45
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0010-Adjust-APSS-gain-and-offset-from-PWS-FRU-information.patch308
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0012-Set-OPAL_MODEL-to-p8dtu1u-or-p8dtu2u-for-1U-and-2U-s.patch118
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0013-enable-TPM-required-sensor.patch26
-rw-r--r--openpower/patches/p8dtu-patches/hostboot-p8/0014-add-gain-and-offset-for-1300w-48V-DC-power-supply.patch56
15 files changed, 1160 insertions, 0 deletions
diff --git a/openpower/configs/hostboot/p8dtu.config b/openpower/configs/hostboot/p8dtu.config
new file mode 100644
index 00000000..7781d393
--- /dev/null
+++ b/openpower/configs/hostboot/p8dtu.config
@@ -0,0 +1,70 @@
+# The Serial Flash Controller is the AST2400 BMC.
+set SFC_IS_AST2400
+set PNORDD_IS_IPMI
+unset PNORDD_IS_SFC
+set BMC_DOES_SFC_INIT
+unset SFC_IS_IBM_DPSS
+set ALLOW_MICRON_PNOR
+set ALLOW_MACRONIX_PNOR
+
+# VPD options.
+set MVPD_READ_FROM_HW
+set MVPD_WRITE_TO_HW
+set MVPD_READ_FROM_PNOR
+set MVPD_WRITE_TO_PNOR
+set DJVPD_READ_FROM_HW
+unset DJVPD_WRITE_TO_HW
+set DJVPD_READ_FROM_PNOR
+set DJVPD_WRITE_TO_PNOR
+set CVPD_READ_FROM_HW
+set CVPD_WRITE_TO_HW
+set CVPD_READ_FROM_PNOR
+set CVPD_WRITE_TO_PNOR
+set PVPD_READ_FROM_HW
+set PVPD_WRITE_TO_HW
+set PVPD_READ_FROM_PNOR
+set PVPD_WRITE_TO_PNOR
+set SKIP_RESTRICT_EX_UNITS
+unset CDIMM_FORMAT_FOR_CVPD
+
+# gpio config
+set GPIODD
+set PALMETTO_VDDR
+
+# Enable SBE updates
+#set SBE_UPDATE_INDEPENDENT
+set SBE_UPDATE_SIMULTANEOUS
+
+unset PCIE_HOTPLUG_CONTROLLER
+
+# turn on console output
+set CONSOLE
+set BMC_AST2400
+
+# Enable Kingston dimm voltage workaround
+unset KINGSTON_1_35_VOLT
+
+unset DISABLE_HOSTBOOT_RUNTIME
+
+# Compile in hostboot runtime PRD
+set HBRT_PRD
+set HTMGT
+set START_OCC_DURING_BOOT
+
+#PNOR flags
+unset PNOR_TWO_SIDE_SUPPORT
+set PNOR_IS_32MB
+
+set BMC_BT_LPC_IPMI
+
+unset SET_NOMINAL_PSTATE
+
+# Enable Checktop Analysis
+set ENABLE_CHECKSTOP_ANALYSIS
+set IPLTIME_CHECKSTOP_ANALYSIS
+
+# Hostboot will detect hardware changes
+set HOST_HCDB_SUPPORT
+
+# set for trace debug to console
+unset CONSOLE_OUTPUT_TRACE
diff --git a/openpower/configs/p8dtu_defconfig b/openpower/configs/p8dtu_defconfig
new file mode 100644
index 00000000..ce5aec38
--- /dev/null
+++ b/openpower/configs/p8dtu_defconfig
@@ -0,0 +1,67 @@
+BR2_powerpc64le=y
+BR2_powerpc_power8=y
+BR2_GLOBAL_PATCH_DIR="$(BR2_EXTERNAL_OP_BUILD_PATH)/patches/p8dtu-patches"
+BR2_BINUTILS_EXTRA_CONFIG_OPTIONS="--enable-targets=powerpc64-linux"
+BR2_GCC_VERSION_6_X=y
+BR2_EXTRA_GCC_CONFIG_OPTIONS="--enable-targets=powerpc64-linux --disable-libsanitizer"
+BR2_TOOLCHAIN_BUILDROOT_CXX=y
+BR2_TARGET_GENERIC_HOSTNAME="skiroot"
+BR2_ROOTFS_DEVICE_CREATION_DYNAMIC_EUDEV=y
+BR2_ROOTFS_DEVICE_TABLE="../openpower/device_table.txt"
+BR2_TARGET_GENERIC_GETTY_PORT="hvc0"
+BR2_ENABLE_LOCALE_WHITELIST="C de en es fr it ja ko pt_BR ru zh_CN zh_TW"
+BR2_GENERATE_LOCALE="en_US.UTF-8 de_DE.UTF-8 es_ES.UTF-8 fr_FR.UTF-8 it_IT.UTF-8 ja_JP.UTF-8 ko_KR.UTF-8 pt_BR.UTF-8 ru_RU.UTF-8 zh_CN.UTF-8 zh_TW.UTF-8"
+BR2_SYSTEM_ENABLE_NLS=y
+BR2_ROOTFS_USERS_TABLES="$(BR2_EXTERNAL_OP_BUILD_PATH)/configs/users-table"
+BR2_ROOTFS_OVERLAY="../openpower/overlay"
+BR2_ROOTFS_POST_BUILD_SCRIPT="../openpower/scripts/fixup-target-var ../openpower/scripts/firmware-whitelist"
+BR2_LINUX_KERNEL=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION=y
+BR2_LINUX_KERNEL_CUSTOM_VERSION_VALUE="5.0.5"
+BR2_LINUX_KERNEL_PATCH="$(BR2_EXTERNAL_OP_BUILD_PATH)/linux"
+BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
+BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_OP_BUILD_PATH)/configs/linux/skiroot_defconfig"
+BR2_LINUX_KERNEL_ZIMAGE_EPAPR=y
+BR2_LINUX_KERNEL_XZ=y
+BR2_PACKAGE_BUSYBOX_CONFIG_FRAGMENT_FILES="$(BR2_EXTERNAL_OP_BUILD_PATH)/configs/busybox.fragment"
+BR2_PACKAGE_BUSYBOX_SHOW_OTHERS=y
+BR2_PACKAGE_LINUX_FIRMWARE=y
+BR2_PACKAGE_LINUX_FIRMWARE_BNX2X=y
+BR2_PACKAGE_LINUX_FIRMWARE_CXGB4_T4=y
+BR2_PACKAGE_IPMITOOL=y
+BR2_PACKAGE_IPMITOOL_USB=y
+BR2_PACKAGE_MDADM=y
+BR2_PACKAGE_NCURSES_WCHAR=y
+BR2_PACKAGE_DROPBEAR=y
+# BR2_PACKAGE_DROPBEAR_SERVER is not set
+BR2_PACKAGE_ETHTOOL=y
+BR2_PACKAGE_LRZSZ=y
+BR2_PACKAGE_NETCAT=y
+BR2_PACKAGE_RSYNC=y
+BR2_PACKAGE_SUDO=y
+BR2_PACKAGE_UTIL_LINUX_AGETTY=y
+BR2_TARGET_ROOTFS_CPIO_XZ=y
+BR2_TARGET_ROOTFS_INITRAMFS=y
+BR2_OPENPOWER_PLATFORM=y
+BR2_OPENPOWER_POWER8=y
+BR2_HOSTBOOT_P8_CONFIG_FILE="p8dtu.config"
+BR2_OPENPOWER_MACHINE_XML_GITHUB_PROJECT_VALUE="p8dtu-xml"
+BR2_OPENPOWER_MACHINE_XML_VERSION="2a4ddd34b8517f8ccbbeb560737b012dd8f0c857"
+BR2_OPENPOWER_MACHINE_XML_FILENAME="p8dtu.xml"
+BR2_OPENPOWER_SYSTEM_XML_FILENAME="P8DTU_hb.system.xml"
+BR2_OPENPOWER_MRW_XML_FILENAME="P8DTU_hb.mrw.xml"
+BR2_OPENPOWER_BIOS_XML_FILENAME="P8DTU_bios.xml"
+BR2_OPENPOWER_PNOR_XML_LAYOUT_FILENAME="defaultPnorLayoutSingleSide.xml"
+BR2_OPENPOWER_CONFIG_NAME="p8dtu"
+BR2_OPENPOWER_PNOR_FILENAME="P8DTU.pnor"
+BR2_HOSTBOOT_BINARY_SBE_FILENAME="venice_sbe.img.ecc"
+BR2_HOSTBOOT_BINARY_SBEC_FILENAME="centaur_sbec_pad.img.ecc"
+BR2_HOSTBOOT_BINARY_WINK_FILENAME="p8.ref_image.hdr.bin.ecc"
+BR2_IMA_CATALOG_FILENAME="ima_catalog.bin"
+BR2_OPENPOWER_TARGETING_BIN_FILENAME="P8DTU_HB.targeting.bin"
+BR2_OPENPOWER_TARGETING_ECC_FILENAME="P8DTU_HB.targeting.bin.ecc"
+BR2_PACKAGE_PETITBOOT=y
+BR2_PACKAGE_PETITBOOT_MTD=y
+BR2_CAPP_UCODE_BIN_FILENAME="cappucode.bin"
+BR2_PACKAGE_LOADKEYS=y
+BR2_IMA_CATALOG_DTS="POWER8"
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0001-Memory-Interleaving-Grouping-change-for-p8dtu.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0001-Memory-Interleaving-Grouping-change-for-p8dtu.patch
new file mode 100644
index 00000000..acdb1c01
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0001-Memory-Interleaving-Grouping-change-for-p8dtu.patch
@@ -0,0 +1,27 @@
+From e6db702ece6f5d13c7d0b288203a0715b4a2a35b Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Tue, 18 Oct 2016 16:08:13 -0700
+Subject: [PATCH 01/14] Memory Interleaving Grouping change for p8dtu. Allow
+ not adjacent pair for p8dtu.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/targeting/common/xmltohb/attribute_types.xml | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
+index 0fc5f4eac..d7fc183a4 100644
+--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
++++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
+@@ -13812,7 +13812,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
+ </description>
+ <simpleType>
+ <uint8_t>
+- <default>1</default>
++ <default>0</default>
+ </uint8_t>
+ </simpleType>
+ <persistency>non-volatile</persistency>
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0002-Support-130W-Turismo-Parts.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0002-Support-130W-Turismo-Parts.patch
new file mode 100644
index 00000000..9b3c4b0c
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0002-Support-130W-Turismo-Parts.patch
@@ -0,0 +1,40 @@
+From 3040a458385e82d7d9edf7b926fcdba641d0a048 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Tue, 18 Oct 2016 16:12:21 -0700
+Subject: [PATCH 02/14] Support 130W Turismo Parts.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/targeting/common/xmltohb/attribute_types.xml | 2 +-
+ src/usr/targeting/common/xmltohb/target_types.xml | 2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
+index d7fc183a4..0f0e2f6a7 100644
+--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
++++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
+@@ -15890,7 +15890,7 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
+ <simpleType>
+ <enumeration>
+ <id>MRW_NEST_CAPABLE_FREQUENCIES_SYS</id>
+- <default>UNSUPPORTED_FREQ</default>
++ <default>2000_MHZ_OR_2400_MHZ</default>
+ </enumeration>
+ </simpleType>
+ <persistency>non-volatile</persistency>
+diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
+index b28607ca2..a150ce64d 100644
+--- a/src/usr/targeting/common/xmltohb/target_types.xml
++++ b/src/usr/targeting/common/xmltohb/target_types.xml
+@@ -681,7 +681,7 @@
+ </attribute>
+ <attribute>
+ <id>DEFAULT_PROC_MODULE_NEST_FREQ_MHZ</id>
+- <default>2400</default>
++ <default>2000</default>
+ </attribute>
+ </targetType>
+
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0003-Add-support-for-memory-voltage-control-for-p8dtu.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0003-Add-support-for-memory-voltage-control-for-p8dtu.patch
new file mode 100644
index 00000000..4f6b0211
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0003-Add-support-for-memory-voltage-control-for-p8dtu.patch
@@ -0,0 +1,49 @@
+From 783332cc9afcf3c8581760112162b650a9e01c7e Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Tue, 4 Oct 2016 16:07:44 -0700
+Subject: [PATCH 03/14] Adds support for memory voltage control specific to the p8dtu platform.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/hwpf/hwp/dram_training/palmetto_vddr.C | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+diff --git a/src/usr/hwpf/hwp/dram_training/palmetto_vddr.C b/src/usr/hwpf/hwp/dram_training/palmetto_vddr.C
+index b0f6bed4c..95c3924b8 100644
+--- a/src/usr/hwpf/hwp/dram_training/palmetto_vddr.C
++++ b/src/usr/hwpf/hwp/dram_training/palmetto_vddr.C
+@@ -168,6 +168,7 @@ static errlHndl_t for_each_vddr_domain_with_functional_memory(
+ std::sort(l_membufTargetList.begin(), l_membufTargetList.end(),
+ compareTargetsGpioInfos);
+
++/*
+ // Prune out targets with non-unique GPIO info
+ std::vector<TARGETING::TargetHandle_t>::iterator
+ pInvalidEntries = std::unique(
+@@ -175,6 +176,7 @@ static errlHndl_t for_each_vddr_domain_with_functional_memory(
+ l_membufTargetList.end(),
+ areTargetsGpioInfoEqual);
+ l_membufTargetList.erase(pInvalidEntries,l_membufTargetList.end());
++*/
+
+ // Invoke callback for one Centaur per unique VDDR domain
+ for (TargetHandleList::iterator
+@@ -274,6 +276,7 @@ static errlHndl_t pca95xGpioWriteBit(TARGETING::Target * i_target,
+ i_val);
+
+ // Configure gpio bit as output (if necessary).
++/*
+ if(!err)
+ {
+ err = pca95xGpioSetBit(i_target,
+@@ -281,6 +284,7 @@ static errlHndl_t pca95xGpioWriteBit(TARGETING::Target * i_target,
+ i_gpio_pin,
+ PCA95X_GPIO_CONFIG_OUTPUT);
+ }
++*/
+
+ return err;
+ }
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0004-change-esel-command-netfn-to-IBM-0x3a.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0004-change-esel-command-netfn-to-IBM-0x3a.patch
new file mode 100644
index 00000000..3215bc2e
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0004-change-esel-command-netfn-to-IBM-0x3a.patch
@@ -0,0 +1,26 @@
+From eee0dcae475618bef686198baf28c750de9a63a5 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Tue, 11 Oct 2016 10:00:15 -0700
+Subject: [PATCH 04/14] change esel command netfn to IBM 0x3a
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/include/usr/ipmi/ipmiif.H | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/include/usr/ipmi/ipmiif.H b/src/include/usr/ipmi/ipmiif.H
+index 5c2444f26..94fca5fb6 100644
+--- a/src/include/usr/ipmi/ipmiif.H
++++ b/src/include/usr/ipmi/ipmiif.H
+@@ -265,7 +265,7 @@ namespace IPMI
+
+ //AMI-specific storage messages
+ inline const command_t partial_add_esel(void)
+- { return std::make_pair(NETFUN_AMI, 0xf0); }
++ { return std::make_pair(NETFUN_IBM, 0xf0); }
+
+ // event messages
+ inline const command_t platform_event(void)
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0005-change-pnor-response-command-to-0x7.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0005-change-pnor-response-command-to-0x7.patch
new file mode 100644
index 00000000..943b4711
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0005-change-pnor-response-command-to-0x7.patch
@@ -0,0 +1,26 @@
+From 50ae9cf95223a5f6492e7e515ccef9d4499ef823 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Tue, 11 Oct 2016 10:03:01 -0700
+Subject: [PATCH 05/14] change pnor response command to 0x7
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/include/usr/ipmi/ipmiif.H | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/include/usr/ipmi/ipmiif.H b/src/include/usr/ipmi/ipmiif.H
+index 94fca5fb6..4b41cb3bc 100644
+--- a/src/include/usr/ipmi/ipmiif.H
++++ b/src/include/usr/ipmi/ipmiif.H
+@@ -289,7 +289,7 @@ namespace IPMI
+ { return std::make_pair(NETFUN_IBM, 0x07); }
+
+ inline const command_t pnor_response(void)
+- { return std::make_pair(NETFUN_IBM, 0x08); }
++ { return std::make_pair(NETFUN_IBM, 0x07); }
+
+ inline const command_t hiomap_event(void)
+ { return std::make_pair(NETFUN_IBM, 0x0f); }
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0006-send-board-ID-to-ipmi.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0006-send-board-ID-to-ipmi.patch
new file mode 100644
index 00000000..58ddb2d4
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0006-send-board-ID-to-ipmi.patch
@@ -0,0 +1,108 @@
+From 73ba34b74551c5f61a1f2c93f48a7f59cb576cd6 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Tue, 11 Oct 2016 10:26:14 -0700
+Subject: [PATCH 06/14] send board ID to ipmi
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/include/usr/ipmi/ipmiif.H | 6 ++++-
+ src/include/usr/ipmi/ipmipowerstate.H | 2 +-
+ .../initservice/istepdispatcher/istepdispatcher.C | 11 ++++++++
+ src/usr/ipmiext/ipmipowerstate.C | 29 ++++++++++++++++++++++
+ 4 files changed, 46 insertions(+), 2 deletions(-)
+
+diff --git a/src/include/usr/ipmi/ipmiif.H b/src/include/usr/ipmi/ipmiif.H
+index 4b41cb3bc..8039adbf7 100644
+--- a/src/include/usr/ipmi/ipmiif.H
++++ b/src/include/usr/ipmi/ipmiif.H
+@@ -299,7 +299,11 @@ namespace IPMI
+ // user defined power limit from the BMC.
+ inline const command_t get_power_limit(void)
+ { return std::make_pair(NETFUN_GRPEXT, 0x03); }
+-
++
++ //SMC
++ inline const command_t set_board_id(void)
++ { return std::make_pair(NETFUN_NONE, 0x20); }
++
+ // Some helper messages
+ // Used to create an empty message for reception
+ inline const command_t no_command(void)
+diff --git a/src/include/usr/ipmi/ipmipowerstate.H b/src/include/usr/ipmi/ipmipowerstate.H
+index b65275075..e943e8b66 100644
+--- a/src/include/usr/ipmi/ipmipowerstate.H
++++ b/src/include/usr/ipmi/ipmipowerstate.H
+@@ -78,7 +78,7 @@ enum ACPI_DEVICE_POWER_STATE_TO_SET
+ */
+ errlHndl_t setACPIPowerState();
+
+-
++errlHndl_t SmcsetBoardId();
+ } // namespace
+
+ #endif
+diff --git a/src/usr/initservice/istepdispatcher/istepdispatcher.C b/src/usr/initservice/istepdispatcher/istepdispatcher.C
+index 16f1c8a01..0f9731094 100644
+--- a/src/usr/initservice/istepdispatcher/istepdispatcher.C
++++ b/src/usr/initservice/istepdispatcher/istepdispatcher.C
+@@ -284,6 +284,17 @@ void IStepDispatcher::init(errlHndl_t &io_rtaskRetErrl)
+ err_ipmi->collectTrace("INITSVC", 1024);
+ errlCommit(err_ipmi, INITSVC_COMP_ID );
+ }
++ //send board ID
++ errlHndl_t err_ipmi1 = IPMI::SmcsetBoardId();
++
++ if(err_ipmi1)
++ {
++ TRACFCOMP(g_trac_initsvc,
++ "init: ERROR: IPMI set Board Id Failed");
++ err_ipmi->collectTrace("INITSVC", 1024);
++ errlCommit(err_ipmi1, INITSVC_COMP_ID );
++ }
++
+ #endif
+
+
+diff --git a/src/usr/ipmiext/ipmipowerstate.C b/src/usr/ipmiext/ipmipowerstate.C
+index 30c2a70ef..f8e61f82b 100644
+--- a/src/usr/ipmiext/ipmipowerstate.C
++++ b/src/usr/ipmiext/ipmipowerstate.C
+@@ -50,6 +50,35 @@ namespace IPMI
+ /******************************************************************************/
+ // Functions
+ /******************************************************************************/
++errlHndl_t SmcsetBoardId()
++{
++ errlHndl_t err_ipmi = NULL;
++
++ size_t len = 10;
++
++ //create request data buffer
++ uint8_t* data = new uint8_t[len];
++
++ IPMI::completion_code cc = IPMI::CC_UNKBAD;
++ //P8DTU board ID 0933
++ data[0] = 0x33;
++ data[1] = 0x9;
++ memset(&data[2], 0, 8);
++ err_ipmi = IPMI::sendrecv(IPMI::set_board_id(), cc, len, data);
++
++ //cleanup buffer
++ delete[] data;
++
++ if(cc != IPMI::CC_OK)
++ {
++ IPMI_TRAC("Set board id: BMC returned not ok CC[%x]",cc);
++ // should we log error and then retry?
++ // what happens if the communication is broken
++ // reset will try and set it again.
++ }
++
++ return err_ipmi;
++}
+
+ errlHndl_t setACPIPowerState()
+ {
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0007-read-riser-id-from-CPLD.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0007-read-riser-id-from-CPLD.patch
new file mode 100644
index 00000000..af19f742
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0007-read-riser-id-from-CPLD.patch
@@ -0,0 +1,95 @@
+From 94de2f7f944a2cabbdf699adcbc6679a091ad324 Mon Sep 17 00:00:00 2001
+From: Leoluo <leoluo@supermicro.com>
+Date: Tue, 8 Mar 2016 17:01:26 -0800
+Subject: [PATCH 07/14] read riser id from CPLD
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/include/usr/ipmi/ipmiif.H | 3 ++
+ src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C | 42 +++++++++++++++++++++++++-
+ 2 files changed, 44 insertions(+), 1 deletion(-)
+
+diff --git a/src/include/usr/ipmi/ipmiif.H b/src/include/usr/ipmi/ipmiif.H
+index 8039adbf7..9dfd8ee63 100644
+--- a/src/include/usr/ipmi/ipmiif.H
++++ b/src/include/usr/ipmi/ipmiif.H
+@@ -238,6 +238,9 @@ namespace IPMI
+ inline const command_t get_capabilities(void)
+ { return std::make_pair(NETFUN_APP, 0x36); }
+
++ inline const command_t master_readwrite(void)
++ { return std::make_pair(NETFUN_APP, 0x52); }
++
+
+ // Chassis messages
+ inline const command_t chassis_power_off(void)
+diff --git a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
+index d122ae4de..73f1a0a3f 100644
+--- a/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
++++ b/src/usr/hwpf/hwp/nest_chiplets/nest_chiplets.C
+@@ -58,6 +58,8 @@
+ // MVPD
+ #include <devicefw/userif.H>
+ #include <vpd/mvpdenums.H>
++#include <ipmi/ipmiif.H>
++
+
+ #include <config.h>
+
+@@ -1743,7 +1745,40 @@ errlHndl_t computeProcPcieConfigAttrs(
+ effectiveLaneSwap[iop] = laneSwap;
+ }
+ #endif
+-
++ uint8_t riser_id = 0 ;
++ errlHndl_t l_err = NULL;
++
++
++ size_t len = 4;
++
++ //create request data buffer
++ uint8_t* data = new uint8_t[len];
++
++ IPMI::completion_code cc = IPMI::CC_UNKBAD;
++
++ data[0] = 0x3;
++ data[1] = 0x70;
++ data[2] = 0x1;
++ data[3] = 0x1;
++ l_err = IPMI::sendrecv(IPMI::master_readwrite(), cc, len, data);
++
++ if( l_err == NULL )
++ {
++ if( cc == IPMI::CC_OK )
++ {
++ riser_id = data[0];
++ }
++
++ delete[] data;
++ }
++
++
++ if((i_pProcChipTarget->getAttr<TARGETING::ATTR_HUID>()) == 0x50001 && (riser_id == 0xE) ){
++ effectiveLaneMask[1][0] = 0xFFFF;
++ effectiveLaneMask[1][1] = 0x0000;
++ effectiveLaneSwap[1] = 0x0;
++ }
++
+ i_pProcChipTarget->setAttr<
+ TARGETING::ATTR_PROC_PCIE_LANE_MASK>(effectiveLaneMask);
+
+@@ -1797,6 +1832,11 @@ errlHndl_t computeProcPcieConfigAttrs(
+ iopConfig = laneConfigItr->laneConfig;
+ phbActiveMask = laneConfigItr->phbActive;
+
++ if((i_pProcChipTarget->getAttr<TARGETING::ATTR_HUID>()) == 0x50001 && (riser_id == 0xE) ){
++ iopConfig = 0 ;
++ phbActiveMask = PHB0_MASK|PHB1_MASK;
++ }
++
+ // Disable applicable PHBs
+ phbActiveMask &= (~disabledPhbs);
+ (void)_deconfigPhbsBasedOnPciState(
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0008-Fill-board-mfg-time-and-date-in-FRU3.-It-is-read-fro.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0008-Fill-board-mfg-time-and-date-in-FRU3.-It-is-read-fro.patch
new file mode 100644
index 00000000..41c24b37
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0008-Fill-board-mfg-time-and-date-in-FRU3.-It-is-read-fro.patch
@@ -0,0 +1,99 @@
+From ed60d5736559c4e100e5db20de942a584b58b6f0 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Wed, 25 May 2016 15:24:40 -0700
+Subject: [PATCH 08/14] Fill board mfg time and date in FRU3. It is read from
+ PVPD:VNDR:IN.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/ipmiext/ipmifruinv.C | 65 +++++++++++++++++++++++++++++++++-----------
+ 1 file changed, 49 insertions(+), 16 deletions(-)
+
+diff --git a/src/usr/ipmiext/ipmifruinv.C b/src/usr/ipmiext/ipmifruinv.C
+index 23aaf9b97..11fbd7677 100644
+--- a/src/usr/ipmiext/ipmifruinv.C
++++ b/src/usr/ipmiext/ipmifruinv.C
+@@ -1279,31 +1279,64 @@ errlHndl_t backplaneIpmiFruInv::buildChassisInfoArea(
+ return l_errl;
+ }
+
++// Quick hexdigit to binary converter.
++// Hopefull someday to replaced by strtoul
++uint8_t aschex2bin(char c)
++{
++ if(c >= 'a' && c <= 'f')
++ {
++ c = c + 10 - 'a';
++ }
++ else if (c >= 'A' && c <= 'F')
++ {
++ c = c + 10 - 'A';
++ }
++ else if (c >= '0' && c <= '9')
++ {
++ c -= '0';
++ }
++ else return 0;// else it's not a hex digit, return 0
++
++ return c;
++}
++
++
+ errlHndl_t backplaneIpmiFruInv::buildBoardInfoArea(
+ std::vector<uint8_t> &io_data)
+ {
+ errlHndl_t l_errl = NULL;
++ std::vector<uint8_t> oem_data; //jim052316
++ uint8_t i, data1, data2, data3;//jim052316
+
+ do {
+ //Set formatting data that goes at the beginning of the record
+ preFormatProcessing(io_data, true);
+
+- // Set Mfg Build date
+- // Grab VPD data into seperate data vector
+- std::vector<uint8_t> mfgDateData;
+- l_errl = addVpdData(mfgDateData, PVPD::OPFR, PVPD::MB, false, false);
+- if (l_errl)
+- {
+- // The MB keyword was optional on older cards so just ignore
+- // any errors
+- delete l_errl;
+- l_errl = NULL;
+- }
+- else
+- {
+- // Pass that to the function that sets the Build date
+- setMfgData(io_data, mfgDateData);
+- }
++ l_errl = addVpdData(oem_data, PVPD::VNDR, PVPD::IN, true);
++ if (l_errl) { break; }
++
++ for (i=0; i < oem_data.size(); i++)
++ TRACFCOMP(g_trac_ipmi,"Jimdebug board VNDR:IN data is 0x%x", oem_data[i]);
++
++ data1 = (aschex2bin(oem_data[5]) << 4) | aschex2bin(oem_data[6]);//jim052416
++ data2 = (aschex2bin(oem_data[3]) << 4) | aschex2bin(oem_data[4]);
++ data3 = (aschex2bin(oem_data[1]) << 4) | aschex2bin(oem_data[2]);
++
++
++ TRACFCOMP(g_trac_ipmi,"Jimdebug push data1 is 0x%x", data1);
++ TRACFCOMP(g_trac_ipmi,"Jimdebug push data2 is 0x%x", data2);
++ TRACFCOMP(g_trac_ipmi,"Jimdebug push data3 is 0x%x", data3);
++
++
++ io_data.push_back(data1);
++ io_data.push_back(data2);
++ io_data.push_back(data3);
++
++
++ //Set MFG Date/Time - Blank
++ //io_data.push_back(0x5E); //jim52016
++ //io_data.push_back(0x9A);
++ //io_data.push_back(0xA3);
+
+ //Set Vendor Name - ascii formatted data
+ l_errl = addVpdData(io_data, PVPD::OPFR, PVPD::VN, true);
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0009-Hardcode-DIMM-pairing-for-RAS.-Fix-the-issue-that-MB.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0009-Hardcode-DIMM-pairing-for-RAS.-Fix-the-issue-that-MB.patch
new file mode 100644
index 00000000..c6f4a1c0
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0009-Hardcode-DIMM-pairing-for-RAS.-Fix-the-issue-that-MB.patch
@@ -0,0 +1,45 @@
+From 9d8e17897f398f1f750c87c4dcf58fe9e64ffed9 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Thu, 7 Jul 2016 15:53:31 -0700
+Subject: [PATCH 09/14] Hardcode DIMM pairing for RAS. Fix the issue that MBA0
+ Memory UE on Cenatur Chip4 brought all dimms under Proc2 offline.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/hwas/common/deconfigGard.C | 19 ++++++++++++++++++-
+ 1 file changed, 18 insertions(+), 1 deletion(-)
+
+diff --git a/src/usr/hwas/common/deconfigGard.C b/src/usr/hwas/common/deconfigGard.C
+index fa266c881..bd4e4fe4c 100644
+--- a/src/usr/hwas/common/deconfigGard.C
++++ b/src/usr/hwas/common/deconfigGard.C
+@@ -980,8 +980,25 @@ Target * findPartnerForMcs(const Target *i_startMcs)
+ // Declare partner MCS CHIP_UNIT
+ ATTR_CHIP_UNIT_type partnerMcsUnit = 0;
+
++ // Add temp code to handle different MCS pairing
++ if (startMcsUnit == 0)
++ {
++ partnerMcsUnit = 4;
++ }
++ else if (startMcsUnit == 1)
++ {
++ partnerMcsUnit = 5;
++ }
++ else if (startMcsUnit == 4)
++ {
++ partnerMcsUnit = 0;
++ }
++ else if (startMcsUnit == 5)
++ {
++ partnerMcsUnit = 1;
++ }
+ // If CHIP_UNIT is even, its partner will be the next MCS
+- if (!(startMcsUnit % 2))
++ else if (!(startMcsUnit % 2))
+ {
+ partnerMcsUnit = startMcsUnit + 1;
+ }
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0010-Adjust-APSS-gain-and-offset-from-PWS-FRU-information.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0010-Adjust-APSS-gain-and-offset-from-PWS-FRU-information.patch
new file mode 100644
index 00000000..172d6acc
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0010-Adjust-APSS-gain-and-offset-from-PWS-FRU-information.patch
@@ -0,0 +1,308 @@
+From bdd6ce1bbfe0ee77feefe84662e961fb253c6195 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Fri, 22 Jul 2016 17:50:57 -0700
+Subject: [PATCH 10/14] Adjust APSS gain and offset from PWS FRU information.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/include/usr/ipmi/ipmiif.H | 4 +-
+ src/usr/htmgt/htmgt_cfgdata.C | 2 +
+ src/usr/hwpf/hwp/start_payload/start_payload.C | 212 +++++++++++++++++++++
+ .../common/xmltohb/attribute_types_hb.xml | 2 +
+ 4 files changed, 218 insertions(+), 2 deletions(-)
+
+diff --git a/src/include/usr/ipmi/ipmiif.H b/src/include/usr/ipmi/ipmiif.H
+index 9dfd8ee63..5416ddca0 100644
+--- a/src/include/usr/ipmi/ipmiif.H
++++ b/src/include/usr/ipmi/ipmiif.H
+@@ -251,8 +251,8 @@ namespace IPMI
+ inline const command_t set_sel_time(void)
+ { return std::make_pair(NETFUN_STORAGE, 0x49); }
+
+- inline const command_t read_fru_data(void)
+- { return std::make_pair(NETFUN_STORAGE, 0x11); }
++ inline const command_t read_fru_data(void)
++ { return std::make_pair(NETFUN_STORAGE, 0x11); }
+
+ inline const command_t write_fru_data(void)
+ { return std::make_pair(NETFUN_STORAGE, 0x12); }
+diff --git a/src/usr/htmgt/htmgt_cfgdata.C b/src/usr/htmgt/htmgt_cfgdata.C
+index 19e7b21bf..7c42abdb6 100644
+--- a/src/usr/htmgt/htmgt_cfgdata.C
++++ b/src/usr/htmgt/htmgt_cfgdata.C
+@@ -1025,6 +1025,8 @@ void getApssMessageData(uint8_t* o_data,
+ ATTR_ADC_CHANNEL_OFFSETS_type offset;
+ sys->tryGetAttr<ATTR_ADC_CHANNEL_OFFSETS>(offset);
+
++ TMGT_INF("getApssMessageData: gain is %d, offset is %d", gain[15], offset[15]); //jim
++
+ CPPASSERT(sizeof(function) == sizeof(ground));
+ CPPASSERT(sizeof(function) == sizeof(gain));
+ CPPASSERT(sizeof(function) == sizeof(offset));
+diff --git a/src/usr/hwpf/hwp/start_payload/start_payload.C b/src/usr/hwpf/hwp/start_payload/start_payload.C
+index 5d7865a12..ad155f19e 100644
+--- a/src/usr/hwpf/hwp/start_payload/start_payload.C
++++ b/src/usr/hwpf/hwp/start_payload/start_payload.C
+@@ -88,6 +88,7 @@
+ #include <algorithm>
+ #include <config.h>
+ #include <ipmi/ipmiwatchdog.H>
++#include <ipmi/ipmiif.H> //jim
+ #include <vpd/vpd_if.H>
+
+ #include <hwpf/hwpf_reasoncodes.H>
+@@ -95,6 +96,7 @@
+ // Uncomment these files as they become available:
+ // #include "host_start_payload/host_start_payload.H"
+
++
+ namespace START_PAYLOAD
+ {
+
+@@ -277,6 +279,214 @@ errlHndl_t setMaxPstate ( void )
+ }
+ #endif
+
++//jim-start
++enum
++{
++PWS_1600 = 0,
++PWS_1000 = 1,
++PWS_1200 = 2,
++PWS_UNKNOWN = 0xFE,
++};
++
++uint8_t getPSUFRUFromIPMICommands(void)
++{
++ errlHndl_t l_err = NULL;
++ uint8_t* frudata = new uint8_t[120];
++ size_t len = 4;
++ uint8_t fru_header_version = 0;
++ uint8_t j = 0, loop_break = 0, read_offset = 0;
++
++ //create request data buffer
++ uint8_t* data = new uint8_t[len];
++
++ IPMI::completion_code cc = IPMI::CC_UNKBAD;
++
++ data[0] = 60; //try to read from PWS1. 60-PWS1, 61-PWS2
++ data[1] = 0x0;
++ data[2] = 0x0;
++ data[3] = 8;
++ l_err = IPMI::sendrecv(IPMI::read_fru_data(), cc, len, data);
++
++ for (uint8_t i = 0; i <= 8; i++ )
++ fru_header_version = data[1] & 0xF; //normal should be 0x01.
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "fru header version is %x", fru_header_version);
++ delete[] data;
++
++ if((l_err == NULL) && (cc == IPMI::CC_OK) && (fru_header_version == 1))
++ {
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "could get FRU from PWS1");
++
++ while ((l_err == NULL) && (loop_break == 0) && (read_offset < 100))
++ {
++ //create request data buffer
++ len = 4; //must set len every time
++ uint8_t* data = new uint8_t[len];
++
++ IPMI::completion_code cc = IPMI::CC_UNKBAD;
++
++ data[0] = 60; //read from PWS1
++ data[1] = read_offset;
++ data[2] = 0x0;
++ data[3] = 8;
++ l_err = IPMI::sendrecv(IPMI::read_fru_data(), cc, len, data);
++
++ if (cc != IPMI::CC_OK) loop_break = 1;
++
++ read_offset += 8;
++ for (uint8_t i = 1; i <= 8; i++ )
++ {
++ frudata[j] = data[i];
++ j++;
++ }
++ delete[] data;
++ }
++
++
++ }
++ else
++ {
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "could get FRU from PWS2");
++
++ while ((l_err == NULL) && (loop_break == 0) && (read_offset < 100))
++ {
++ //create request data buffer
++ len = 4;//must set len every time
++ uint8_t* data = new uint8_t[len];
++
++ IPMI::completion_code cc = IPMI::CC_UNKBAD;
++
++ data[0] = 61; //read from PWS2
++ data[1] = read_offset;
++ data[2] = 0x0;
++ data[3] = 8;
++ l_err = IPMI::sendrecv(IPMI::read_fru_data(), cc, len, data);
++
++ if (cc != IPMI::CC_OK) loop_break = 1;
++
++ read_offset += 8;
++ for (uint8_t i = 1; i <= 8; i++ )
++ {
++ frudata[j] = data[i];
++ j++;
++ }
++ delete[] data;
++ }
++
++ }
++
++ uint8_t product_info_offset, manufacture_name_offset, manufacture_name_length, product_name_offset, product_name_length;
++ uint8_t product_partnumber_offset, product_partnumber_length;
++ uint8_t fru_offset, powerSupplyFru = PWS_UNKNOWN;
++ uint8_t pws1600[] = {'P','W','S','-','1','K','6','2','A','-','1','R'};
++ uint8_t pws1000[] = {'P','W','S','-','1','K','0','2','A','-','1','R'};
++ uint8_t pws1200[] = {'P','W','S','-','1','K','2','2','A','-','1','R'};
++
++ //code to calculate product part number size and offset. should use structure. refer to FRU spec.
++ product_info_offset = frudata[4] * 8;
++ manufacture_name_offset = product_info_offset + 3;
++ manufacture_name_length = frudata[manufacture_name_offset] & 0x3F;
++ product_name_offset = manufacture_name_offset + manufacture_name_length + 1;
++ product_name_length = frudata[product_name_offset] & 0x3F;
++ product_partnumber_offset = product_name_offset + product_name_length + 1;
++ product_partnumber_length = frudata[product_partnumber_offset] & 0x3F;
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "product_partnumber_length is %x", product_partnumber_length);
++ fru_offset = product_partnumber_offset + 1;
++
++ if (product_partnumber_length == 12)
++ {
++ for (uint8_t i = 0; pws1600[i] == frudata[fru_offset + i] ; i ++)
++ if (i == 11)
++ powerSupplyFru = PWS_1600;
++
++ for (uint8_t i = 0; pws1000[i] == frudata[fru_offset + i] ; i ++)
++ if (i == 11)
++ powerSupplyFru = PWS_1000;
++
++ for (uint8_t i = 0; pws1200[i] == frudata[fru_offset + i] ; i ++)
++ if (i == 11)
++ powerSupplyFru = PWS_1200;
++ }
++ else
++ powerSupplyFru = PWS_UNKNOWN;
++
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "powerSupplyFru is %x", powerSupplyFru);
++
++ return powerSupplyFru;
++
++}
++//find apss channel number from XML.
++enum
++{
++V12_SENSE = 0,
++PROC0_POWER = 1,
++PROC1_POWER = 2,
++PCIE_PROC0_POWER = 5,
++PCIE_PROC1_POWER = 6,
++TOTAL_SYSTEM_POWER = 15,
++};
++
++void setAPSSGainOffsetFromPWSInfo(void)
++{
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "before load OCC");
++
++ //Get Gain/Offset ATTR
++ TARGETING::Target* sys = NULL;
++ targetService().getTopLevelTarget(sys);
++
++ ATTR_ADC_CHANNEL_GAINS_type gain;
++ sys->tryGetAttr<ATTR_ADC_CHANNEL_GAINS>(gain);
++
++ ATTR_ADC_CHANNEL_OFFSETS_type offset;
++ sys->tryGetAttr<ATTR_ADC_CHANNEL_OFFSETS>(offset);
++
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "gain is %d, offset is %d", gain[15], offset[15]);
++
++ //Note that the function/ APSS channel ids can be indirect. I've hardcoded here, you will need to look at the XML to find the channel/function number that matches
++ //const uint8_t SYS_CHANNEL = 15; //APSS Channel 15 is sys power, ie the gain/offset we need to tweak
++
++ //Get power supply data from BMC
++ uint8_t powerSupplyFru = getPSUFRUFromIPMICommands();
++
++ switch(powerSupplyFru)
++ {
++ case PWS_1600: //PWS-1K62A-1R (1600W):
++ gain[TOTAL_SYSTEM_POWER] = 67800;
++ offset[TOTAL_SYSTEM_POWER] = 0;
++ break;
++
++ case PWS_1000: //PWS-1K02A-1R (1000W):
++ gain[TOTAL_SYSTEM_POWER] = 41500;
++ offset[TOTAL_SYSTEM_POWER] = 0;
++ break;
++
++ case PWS_1200: //PWS-1K22A-1R (1200W):
++ gain[TOTAL_SYSTEM_POWER] = 50000;
++ offset[TOTAL_SYSTEM_POWER] = 0;
++ break;
++
++ default:
++ //Do nothing, leave defaults
++ //Gen error for user attention?
++ break;
++ }
++
++ //Now write the attributes back so they get picked up by OCC code
++ if (!sys->trySetAttr<ATTR_ADC_CHANNEL_GAINS>(gain))
++ {
++ //unlikely, crash
++ //Emit failing trace/console data
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "set gain failed");
++ assert(0);
++ }
++
++ if (!sys->trySetAttr<ATTR_ADC_CHANNEL_OFFSETS>(offset))
++ {
++ //unlikely, crash
++ //Emit failing trace/console data
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "set offset failed");
++ assert(0);
++ }
++}
+ //
+ // Wrapper function to call host_runtime_setup
+ //
+@@ -318,6 +528,8 @@ void* call_host_runtime_setup( void *io_pArgs )
+ break;
+ }
+
++ setAPSSGainOffsetFromPWSInfo(); //jim add code before activate OCC. START_OCC_DURING_BOOT is defined in config.
++
+ bool l_activateOCC = is_avp_load();
+
+ #ifdef CONFIG_START_OCC_DURING_BOOT
+diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
+index c4eb6603d..64a0c9bae 100644
+--- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
++++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
+@@ -747,6 +747,7 @@
+ </simpleType>
+ <persistency>non-volatile</persistency>
+ <readable/>
++ <writeable/>
+ </attribute>
+
+ <attribute>
+@@ -758,6 +759,7 @@
+ </simpleType>
+ <persistency>non-volatile</persistency>
+ <readable/>
++ <writeable/>
+ </attribute>
+
+ <attribute>
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0012-Set-OPAL_MODEL-to-p8dtu1u-or-p8dtu2u-for-1U-and-2U-s.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0012-Set-OPAL_MODEL-to-p8dtu1u-or-p8dtu2u-for-1U-and-2U-s.patch
new file mode 100644
index 00000000..bc4f4926
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0012-Set-OPAL_MODEL-to-p8dtu1u-or-p8dtu2u-for-1U-and-2U-s.patch
@@ -0,0 +1,118 @@
+From 1e6bb450cf94fc3ade70f82703e6c57a30bbebaa Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Wed, 10 Aug 2016 10:41:32 -0700
+Subject: [PATCH 12/14] Set OPAL_MODEL to p8dtu1u or p8dtu2u for 1U and 2U
+ system.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/hwpf/hwp/start_payload/start_payload.C | 66 +++++++++++++++++++++-
+ .../common/xmltohb/attribute_types_hb.xml | 1 +
+ 2 files changed, 66 insertions(+), 1 deletion(-)
+
+diff --git a/src/usr/hwpf/hwp/start_payload/start_payload.C b/src/usr/hwpf/hwp/start_payload/start_payload.C
+index ad155f19e..80e62a0b6 100644
+--- a/src/usr/hwpf/hwp/start_payload/start_payload.C
++++ b/src/usr/hwpf/hwp/start_payload/start_payload.C
+@@ -89,6 +89,8 @@
+ #include <config.h>
+ #include <ipmi/ipmiwatchdog.H>
+ #include <ipmi/ipmiif.H> //jim
++#include <string.h> //jim
++
+ #include <vpd/vpd_if.H>
+
+ #include <hwpf/hwpf_reasoncodes.H>
+@@ -487,6 +489,67 @@ void setAPSSGainOffsetFromPWSInfo(void)
+ assert(0);
+ }
+ }
++
++
++void setOpalMode (void)
++{
++
++ uint8_t riser_id = 0 ;
++ errlHndl_t l_err = NULL;
++ size_t len = 4;
++
++ //create request data buffer
++ uint8_t* data = new uint8_t[len];
++
++ IPMI::completion_code cc = IPMI::CC_UNKBAD;
++
++ data[0] = 0x3;
++ data[1] = 0x70;
++ data[2] = 0x1;
++ data[3] = 0x2; //offset 0x2 for UIO info
++ l_err = IPMI::sendrecv(IPMI::master_readwrite(), cc, len, data);
++
++ if( l_err == NULL )
++ {
++ if( cc == IPMI::CC_OK )
++ {
++ riser_id = data[0];
++ }
++
++ delete[] data;
++ }
++
++ATTR_OPAL_MODEL_type l_model = {0};
++
++TARGETING::Target* sys = NULL;
++targetService().getTopLevelTarget(sys);
++
++sys->tryGetAttr<TARGETING::ATTR_OPAL_MODEL>(l_model);
++TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "OPAL Mode is %s", l_model);
++TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "Riser ID is %d", riser_id);
++
++if (riser_id == 0x9)
++ {
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "1U OPAL Mode");
++ strcpy (l_model, "supermicro,p8dtu1u");
++
++ }
++else //(riser_id == 0x19)
++ {
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "2U OPAL Mode");
++ strcpy (l_model, "supermicro,p8dtu2u");
++ }
++
++if (!sys->trySetAttr<TARGETING::ATTR_OPAL_MODEL>(l_model))
++ {
++ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "set OPAL Mode failed");
++ assert(0);
++ }
++
++sys->tryGetAttr<TARGETING::ATTR_OPAL_MODEL>(l_model);
++TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "after set, OPAL Mode is %s", l_model);
++
++}
+ //
+ // Wrapper function to call host_runtime_setup
+ //
+@@ -529,7 +592,8 @@ void* call_host_runtime_setup( void *io_pArgs )
+ }
+
+ setAPSSGainOffsetFromPWSInfo(); //jim add code before activate OCC. START_OCC_DURING_BOOT is defined in config.
+-
++ setOpalMode(); //jim
++
+ bool l_activateOCC = is_avp_load();
+
+ #ifdef CONFIG_START_OCC_DURING_BOOT
+diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
+index 64a0c9bae..3cfdb9aa0 100644
+--- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
++++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
+@@ -966,6 +966,7 @@
+ </simpleType>
+ <persistency>non-volatile</persistency>
+ <readable/>
++ <writeable/>
+ </attribute>
+
+ <attribute>
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0013-enable-TPM-required-sensor.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0013-enable-TPM-required-sensor.patch
new file mode 100644
index 00000000..64709c0d
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0013-enable-TPM-required-sensor.patch
@@ -0,0 +1,26 @@
+From db0d855457974d520d829259f56488e6c896be0e Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Thu, 27 Oct 2016 10:42:48 -0700
+Subject: [PATCH 13/14] enable TPM required sensor.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/targeting/common/xmltohb/attribute_types_hb.xml | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
+index 3cfdb9aa0..84536fbb4 100644
+--- a/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
++++ b/src/usr/targeting/common/xmltohb/attribute_types_hb.xml
+@@ -1200,7 +1200,7 @@
+ </enumerator>
+ <enumerator>
+ <name>TPM_REQUIRED</name>
+- <value>0xFFFF</value>
++ <value>0xCC03</value>
+ </enumerator>
+ </enumerationType>
+
+--
+2.16.2.windows.1
+
diff --git a/openpower/patches/p8dtu-patches/hostboot-p8/0014-add-gain-and-offset-for-1300w-48V-DC-power-supply.patch b/openpower/patches/p8dtu-patches/hostboot-p8/0014-add-gain-and-offset-for-1300w-48V-DC-power-supply.patch
new file mode 100644
index 00000000..fe5d816f
--- /dev/null
+++ b/openpower/patches/p8dtu-patches/hostboot-p8/0014-add-gain-and-offset-for-1300w-48V-DC-power-supply.patch
@@ -0,0 +1,56 @@
+From a3283c6922dee8ebfb3ea9ac7d22047e6e7bca00 Mon Sep 17 00:00:00 2001
+From: Jim Yuan <jim.yuan@supermicro.com>
+Date: Tue, 9 May 2017 14:34:56 -0700
+Subject: [PATCH 14/14] add gain and offset for 1300w 48V DC power supply.
+
+Signed-off-by: Jim Yuan <jim.yuan@supermicro.com>
+---
+ src/usr/hwpf/hwp/start_payload/start_payload.C | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+diff --git a/src/usr/hwpf/hwp/start_payload/start_payload.C b/src/usr/hwpf/hwp/start_payload/start_payload.C
+index 80e62a0b6..309122785 100644
+--- a/src/usr/hwpf/hwp/start_payload/start_payload.C
++++ b/src/usr/hwpf/hwp/start_payload/start_payload.C
+@@ -287,6 +287,7 @@ enum
+ PWS_1600 = 0,
+ PWS_1000 = 1,
+ PWS_1200 = 2,
++PWS_1300 = 3,
+ PWS_UNKNOWN = 0xFE,
+ };
+
+@@ -382,6 +383,7 @@ uint8_t getPSUFRUFromIPMICommands(void)
+ uint8_t pws1600[] = {'P','W','S','-','1','K','6','2','A','-','1','R'};
+ uint8_t pws1000[] = {'P','W','S','-','1','K','0','2','A','-','1','R'};
+ uint8_t pws1200[] = {'P','W','S','-','1','K','2','2','A','-','1','R'};
++ uint8_t pws1300[] = {'P','W','S','-','1','K','3','0','D','-','1','R'};
+
+ //code to calculate product part number size and offset. should use structure. refer to FRU spec.
+ product_info_offset = frudata[4] * 8;
+@@ -407,6 +409,10 @@ uint8_t getPSUFRUFromIPMICommands(void)
+ for (uint8_t i = 0; pws1200[i] == frudata[fru_offset + i] ; i ++)
+ if (i == 11)
+ powerSupplyFru = PWS_1200;
++
++ for (uint8_t i = 0; pws1300[i] == frudata[fru_offset + i] ; i ++)
++ if (i == 11)
++ powerSupplyFru = PWS_1300;
+ }
+ else
+ powerSupplyFru = PWS_UNKNOWN;
+@@ -466,6 +472,11 @@ void setAPSSGainOffsetFromPWSInfo(void)
+ offset[TOTAL_SYSTEM_POWER] = 0;
+ break;
+
++ case PWS_1300: //PWS-1K30D-1R (1300W 48V AC):
++ gain[TOTAL_SYSTEM_POWER] = 51900;
++ offset[TOTAL_SYSTEM_POWER] = 0;
++ break;
++
+ default:
+ //Do nothing, leave defaults
+ //Gen error for user attention?
+--
+2.16.2.windows.1
+
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