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* Fixed warnings and added -Werror CFLAGWilliam Bryan2015-11-0225-253/+254
| | | | | | | | | | Fixed adding traces in error handling code RTC: 137993 Change-Id: Ifc48da76bf2af90435b708c3415b5f456957911b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21097 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* busy_wait based on decrementer values inside interrupts.Wael El-Essawy2015-11-022-6/+36
| | | | | | | Change-Id: Iceba2e502420cd03e173edfa7740c6539e120264 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21562 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: Wael Elessawy <welessa@us.ibm.com>
* Remove applet supportWilliam Bryan2015-10-2734-2705/+291
| | | | | | | | | | | | | | 1. Removed most files related to applets 2. Converted sensor query list and command handler debug applets to functions. 3. Removed #includes of applet header files Change-Id: I410b3c68991e4fa6a7f542e5ee346a3d313f2a94 RTC: 137992 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21030 Tested-by: FSP CI Jenkins Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Implement busy wait and remove TOD accessWael El-Essawy2015-10-234-121/+58
| | | | | | | | | | | | | | | | | | | | | | | | | 1. Implement busy_wait() as an alternative to pk_sleep when APSS code runs in interrupt handlers. 2. Remove the TOD scom register access from the code, since it is not supported in simics yet. 3. Modify the calls to putscom_abs to take in register values rather than a pointer to register values, to be compatible with the new putscom code. 4. Eliminate code that endlessly triggers OCC and other GPEs, and add instead a counter with the number of ticks (250 usec) since last reset. Change-Id: I48414137434dfdc3cc4c038643536c1250fccbf2 RTC: 131177 RTC: 139105 RTC: 137703 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21269 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
* Remove obsolete failsafe codeWilliam Bryan2015-10-208-99/+21
| | | | | | | | | RTC: 139700 Change-Id: I932fcba9f006138e927d2c1836b09617500e468b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21355 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
* fix rtls and applet address bugs and comment out pmc watchdog register accessWael El-Essawy2015-10-095-17/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current OCC phase, many tasks were removed from the global task table (G_task_table) array, because the OCC code is not ready to schedule them every tick. A bag was introduced when such entries were commented in the G_task_table array in the rtes_tables.c file, without removing the corresponding entries from the corresponding task_id_t enum in the rtls.h header file. The result was wrong mapping between the tasks the corresponding function pointers (func_ptr) entries, and hence, the wrong GPE codes were called from the OCC via the IPC messages. A fix was done by eliminating the corresponding task entries from the task_id_t enum, and remove references to commented out enums, and hence, the discrepancy between the two structures was resolved. In addition, the pmc watchdog register, PMC_STATUS_REG @ 0x40010048 used by the OCC for pmc heartbeat on P8 is no longer defined in SIMICS on P9 The code line that accesses this register was commented out, and it should be later replaced by a new PGPE heartbeat register, when the design is ready. Also, the initAppletAddr() routine was commented out, since the applet image header data structure is currently not setup properly in simics. RTC: 137914 RTC: 135989 Change-Id: I32abf6edfd2536af58b24c97d26eb14902ee6a11 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20975 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Tested-by: Fadi Kassem <fmkassem@us.ibm.com>
* Enable command handler thread and misc cleanupWilliam Bryan2015-10-0711-107/+126
| | | | | | | | | | | | | | 1. The command handler thread now starts running. 2. Disabled just about all of the command handler functions so that they can be enabled as they are implemented and needed. 3. Fixed a bug in the linker script where the response buffer is put in the incorrect offset. Change-Id: Ia169cb9fef3fd91d5667e636569ada9d83c02b3b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20927 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* fix getscom_abs and _getscom codeWael El-Essawy2015-10-062-34/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of reading the scom registers, and storing the results to a memory address specified by o_data, the two routines were loading data into a vector register, without storing it to the o_data pointer, basically losing it. There is no memory to memory PPC instruction, so the minimum number of instructions to execute the code is two: a vector load and a vector store. - Had to modify the ppe42_scom.h to make the _m_data parameter to the PPE_LVD and PPE_LVDX macros an output only. Otherwise, the compiler initializes the temp variable, adding two (useless) instructions. - make the PPE_LVDX macro have the same flavor as PPE_LVD by eliminating the pointer to m_data from both the _getscom function side and the macro implementation side. This fix is already merged in the hw/ppe repository. Change-Id: I6390d2c5e2fbcecf440080917611a82ae88d313b RTC: 135989 RTC: 137704 RTC: 136459 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20976 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
* OCC: Init and start GPE1Chris Cain2015-09-2411-18/+698
| | | | | | | | Change-Id: I2f1ef0a01497d46884eed25f1f63f9ebfcaf1da4 RTC: 133841 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20729 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Update new PPE HW codeWilliam Bryan2015-09-24193-1397/+129154
| | | | | | | | Change-Id: I8e0f107fc08c857b00102fa67f35516a04ee6c78 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20731 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Tracing ImprovementsWilliam Bryan2015-09-163-95/+173
| | | | | | | | | | | Changed tracing to use one mutex per buffer RTC: 133155 Change-Id: I85091dc2afd32f28d280e6f335d0c0d454b6fcb0 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20500 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Fix a typecast bugWael El-Essawy2015-09-141-17/+17
| | | | | | | | Change-Id: I1896e3cf0b543df70101dcf4e6e600084425a83e Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20450 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Tested-by: Fadi Kassem <fmkassem@us.ibm.com>
* GPE0 error and ffdc codes, and remove most pk_haltsWael El-Essawy2015-09-0813-1743/+291
| | | | | | | | | | | | | | | | | | | | modified the wait_spi_completion function to make it args_t independent eliminated all scom/spi related pk_halts, left only ipc related pk_halt using new APSS_RC_XXX rc codes used apss_set_ffdc to set rc, ffdc, and address fields cleaned some comments added four PK traces to mark the start and completion of init routines removed gpe0 from PK traces, and added register address and scom operation added description for all functions deleted all assembly files Change-Id: I5a265c14b917b7c5d87647dad537725ee7f47001 RTC: 131177 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20277 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: Wael Elessawy <welessa@us.ibm.com>
* APSS init supportFadi Kassem2015-09-0116-726/+701
| | | | | | | | | | Change-Id: I57df832e0611a097eac5285f52366061be091343 RTC:133242 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20250 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* tracepp Makefile fixWilliam Bryan2015-08-312-1/+13
| | | | | | | | | Change-Id: I03b1b092362803b055f2175cd98bf6559abd1acd Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20210 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Wrote the three assembly GPE0 power measurement routine in CWael El-Essawy2015-08-288-51/+426
| | | | | | | | | | | | | | | | | | | created an apss_structs.h file to define common arguments data structure (between the OCC and GPE0) translated the _wait_for_adc_ops_complete assembly macro to C added the wait_spi.c file (probably rename in the future) eliminated tabs and trailing spaces and used linux development style cleaned comments, fixed errors added the ipc_send_cmd at the end of GPE0 functions used pss_constants to adopt the new SETENV SIM_OCC_SPIPSS_PCB_BASE RTC: 131177 Change-Id: I541f5e882dd65e0fafc87c3cc6eb95a32d87e466 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19981 Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable tracingWilliam Bryan2015-08-2710-33/+78
| | | | | | | | | | | | | | I've reverted the way we trace from SSX_TRACE to the P8 way More useful way of compiling for Simics vs HW RTC: 133155 Change-Id: I7ac3ce9ad71e36de0cf0050f14ff3d2423c9f75f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20113 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enabled FFDC and SimicsWilliam Bryan2015-08-2615-128/+216
| | | | | | | | | | | | | | | | Also included: -- Some more cmdh files into the build -- Workaround for OCB Timer divider register in Simics -- Workaround to start APSS tasks until DCOM is back RTC: 133819 Change-Id: Ie19c2a544f64c40126c2bc4a0af6fabfe6430d21 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19998 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Start GPE0 and schedule APSS read tasksmbroyles2015-08-105-148/+248
| | | | | | | | Change-Id: I045a6b32bbbb4944ba766cde17f0ce9645f879e6 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19693 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins
* OCC405 Stripped Down and CompilesWilliam Bryan2015-08-0738-832/+1089
| | | | | | | | Change-Id: Ic5c0536de429106975f5b5b0831c645d6f53e86c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19650 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Updates for IPC and GPE0mbroyles2015-08-0411-0/+1112
| | | | | | | Change-Id: I8e31c3fdc0bf142e07ce2adc16abc585d63c8f82 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19524 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* new ssx and lib filesWilliam Bryan2015-08-03453-37626/+13746
| | | | | | | Change-Id: I2328b1e86d59e3788910687d762fb70ec680058f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19503 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* new ppe dirmbroyles2015-08-03315-0/+46975
| | | | | | | Change-Id: I43d54c18ac4f3bce90a4f26510e443a55c446bba Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19509 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* new include dirmbroyles2015-08-0325-0/+22853
| | | | | | | Change-Id: I791df565b9277ab3cd29d1616fd0affac2c3e68d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19499 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Removed functions not used for Phase 1Guillermo J Silva2015-07-284-145/+162
| | | | | | | Change-Id: I3ac68a4b794d64d5dbfadfd0a4257e6ae07c4446 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19389 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Update build name to op_occ_150716aGuillermo J Silva2015-07-171-1/+1
| | | | | | | | | Change-Id: I9316b58354449184a52dbe46d88ac26ef1e612c9 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19132 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Fix to make OCC successfully build using gcc4.9+Fadi Kassem2015-07-145-22/+20
| | | | | | | | | Change-Id: I1f7f34c3873a7c06983b14eac27a691ee52b17bc Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19076 Tested-by: FSP CI Jenkins Reviewed-by: ANDRES A. LUGO-REYES <aalugore@us.ibm.com> Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Added debug code to obtain APSS info.Fadi Kassem2015-07-073-2/+84
| | | | | | | | Change-Id: I91fc25302bb86bb798fb2e910733f67cc142a7d3 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18707 Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Update build name to op_occ_150617aGuillermo J Silva2015-06-171-1/+1
| | | | | | | | Change-Id: I73a5e8a3d49098806c79f082f604dc4ed8712414 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18560 Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Firestone fix for full frequency range on slave OCCsGuillermo J Silva2015-06-172-8/+15
| | | | | | | | | | | | | This fix is intended to allow slave OCCs to have the full frequency range. Master OCC does not have this problem. Change-Id: I67759eb1038787fde43b6d9bc44fbb5b23c0e517 CQ:SW311104 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/18502 Tested-by: FSP CI Jenkins Reviewed-by: ANDRES A. LUGO-REYES <aalugore@us.ibm.com> Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Redundant master occ role fix.Fadi Kassem2015-05-271-2/+11
| | | | | | | | Change-Id: I56addf7434a2a4cfeb9d2886c25c4ea3b876e867 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17952 Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Update build name to op_occ_150521aGuillermo J Silva2015-05-211-1/+1
| | | | | | | Change-Id: If16eca54b63700ffa5cb3fb80103f2d73ff5cb9d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17913 Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Initial support for new version of Pstate Super StructureGuillermo J Silva2015-05-214-112/+358
| | | | | | | | | | | Provide initial support for the new version of the Pstate Super Structure. Only basic size validation is done in order to support the new version as well as previous versions. Change-Id: Id7c482b2aa66f4d7da3a2456a5f78805930418ac Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17889 Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
* add recovery to FSI failuresZane Shelley2015-05-211-0/+20
| | | | | | | | | Change-Id: Ic3a8ae62f297ccbeae1120431e1642a052b69537 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17844 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Error path handling in scom_util.cZane Shelley2015-05-211-138/+172
| | | | | | | Change-Id: I4628f9020b20297ad43436420cac62064432fe28 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17842 Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Error path handling of getfsi/putfsiZane Shelley2015-05-213-73/+71
| | | | | | | Change-Id: If806612b72ec1e8ee0260f1d3ea28022e8c96258 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17841 Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Error path handling of xscom_write/xscom_readZane Shelley2015-05-215-36/+69
| | | | | | | | | Change-Id: I5e21e79434c7e96c225446ab60f1773fa11c0d01 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17840 Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Preliminary support for new config data formats 0x30,0x31Guillermo J Silva2015-05-202-0/+10
| | | | | | | | | | | | | | This inital OCC support for config data formats 0x30 and 0x31 will always return success regardless of the data contents. At this point, OCC will not require these data formats to go active. Change-Id: I873db2913737d24dc7e90cee02be9eab9715ed88 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17876 Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Fix bug accessing the wrong FSI addresses.Zane Shelley2015-05-191-2/+3
| | | | | | | | | Fixes open-power/tyan-openpower#134 Change-Id: Ife8655f116c77b6a164939e3a56ef28f15b5198d Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17838 Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
* Fixed error path trace output in FIRDATA codeZane Shelley2015-05-191-11/+17
| | | | | | | | | Change-Id: I946acb5266fffe04460c51d83aa4448587998ece Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17843 Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
* Checkstop isolation bug with indirect SCOMsZane Shelley2015-05-191-1/+5
| | | | | | | | | Change-Id: I4382bba4f0080b7188dac5ca1e996f4c74707401 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17839 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
* Modifed OCC build name for use in FIPS.Fadi Kassem2015-05-181-0/+14
| | | | | | | | Change-Id: Ic59254247f1d11ce198bb45c56c874c5d7f0bc30 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17783 Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Set extended Status thermal throttle and Quick Power Drop bits.Fadi Kassem2015-05-141-1/+15
| | | | | | | | Change-Id: Ib115894ad4c3d557c52fee20df794baa30a66e08 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17747 Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Support for version 0x11 of frequency config packetGuillermo J Silva2015-05-131-7/+35
| | | | | | | | | Change-Id: I987e06723fc4eaab385840821a43474c61592e55 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17689 Tested-by: FSP CI Jenkins Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Fix issue where false errorlogs are reported.Fadi Kassem2015-05-123-3/+40
| | | | | | | | Change-Id: Ifa5e6812001bf83de19b5b68d5b98a7acdc1dd06 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17694 Tested-by: FSP CI Jenkins Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Fixed call home issue reporting socket power.Fadi Kassem2015-05-062-20/+34
| | | | | | | Change-Id: I039e6d98bfb1add9c1f8bd6e5a54bcce80d8e169 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17601 Reviewed-by: Guillermo J. Silva <guilsilv@us.ibm.com> Tested-by: Guillermo J. Silva <guilsilv@us.ibm.com>
* Update build name to op_occ_150424aGuillermo J Silva2015-04-241-1/+1
| | | | | | | Change-Id: Ib18783ced5c183a57c51004bfc9cb6e3b3b1b103 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17439 Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
* Multiple OCC support for FirestoneGuillermo J Silva2015-04-231-2/+17
| | | | | | | | | | Need to modify the node IDs and chip IDs programmed by HW in order to support mutiple OCCs in a single node for Firestone. Change-Id: I64f05708ab051e618afada75c43c4be33dd52ad8 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17346 Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
* Bug fixes for HBRT CS analysisZane Shelley2015-04-144-39/+23
| | | | | | | Change-Id: I93c8b1d826e8fc8fb81f2c34e7b902e99aabf40c Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/17076 Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com> Tested-by: Stephan Broyles <sbroyles@us.ibm.com>
* Update build nameWilliam Bryan2015-04-131-1/+25
| | | | Change-Id: Ia3f5b0dcff53c2a72dbc3021a4fa84ceba7bd51a
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