diff options
author | mbroyles <mbroyles@us.ibm.com> | 2015-08-04 11:52:42 -0500 |
---|---|---|
committer | William A. Bryan <wilbryan@us.ibm.com> | 2015-08-04 11:57:34 -0500 |
commit | c64c10490a90584ad69d12dd4fac1a4288a26c45 (patch) | |
tree | c798af61d732b1f09b3e88fe89ab5b57eb6630a7 /src | |
parent | 420e6d248cc6d2b3c39bc3970e3bb6747b3bddc3 (diff) | |
download | talos-occ-c64c10490a90584ad69d12dd4fac1a4288a26c45.tar.gz talos-occ-c64c10490a90584ad69d12dd4fac1a4288a26c45.zip |
Updates for IPC and GPE0
Change-Id: I8e31c3fdc0bf142e07ce2adc16abc585d63c8f82
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/19524
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/global_app_cfg.h | 42 | ||||
-rw-r--r-- | src/ipc_func_ids.h | 83 | ||||
-rw-r--r-- | src/occ_gpe0/Makefile | 105 | ||||
-rw-r--r-- | src/occ_gpe0/apss_read.c | 45 | ||||
-rw-r--r-- | src/occ_gpe0/gpe0_main.c | 211 | ||||
-rw-r--r-- | src/occ_gpe0/img_defs.mk | 258 | ||||
-rw-r--r-- | src/occ_gpe0/ipc_func_tables.c | 68 | ||||
-rw-r--r-- | src/occ_gpe0/link.cmd | 123 | ||||
-rw-r--r-- | src/occ_gpe0/pk_app_cfg.h | 56 | ||||
-rw-r--r-- | src/occ_gpe0/pk_app_irq_table.c | 93 | ||||
-rw-r--r-- | src/occ_gpe0/topfiles.mk | 28 |
11 files changed, 1112 insertions, 0 deletions
diff --git a/src/global_app_cfg.h b/src/global_app_cfg.h new file mode 100644 index 0000000..f0dd619 --- /dev/null +++ b/src/global_app_cfg.h @@ -0,0 +1,42 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/global_app_cfg.h $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#define GLOBAL_CFG_USE_IPC // have lib/occlib/ipc_structs.h use "ipc_func_ids.h" +#define OCCHW_IRQ_ROUTE_OWNER 4 + +/// All GPE's will use the external timebase register +#define APPCFG_USE_EXT_TIMEBASE + +// If we are using the OCB timebase then assume +// a frequency of 37.5Mhz. Otherwise, the default is to use +// the decrementer as a timebase and assume a frequency of +// 600MHz +// In product code, this value will be IPL-time configurable. +#ifdef APPCFG_USE_EXT_TIMEBASE +#define PPE_TIMEBASE_HZ 37500000 +#else +#define PPE_TIMEBASE_HZ 600000000 +#endif /* APPCFG_USE_EXT_TIMEBASE */ + + diff --git a/src/ipc_func_ids.h b/src/ipc_func_ids.h new file mode 100644 index 0000000..fd4a773 --- /dev/null +++ b/src/ipc_func_ids.h @@ -0,0 +1,83 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/ipc_func_ids.h $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __IPC_FUNC_IDS_H__ +#define __IPC_FUNC_IDS_H__ +//----------------------------------------------------------------------------- +// *! (C) Copyright International Business Machines Corp. 2015 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//----------------------------------------------------------------------------- + +/// \file ipc_func_ids.h +/// \brief This file contains the definition of function ID used for +/// interprocessor communications (IPC) in the OCC. +/// + +// This is a global file that defines all of the valid IPC function ID's. + +// comment this out if you do not want to use the ping utility provided by the IPC library +#define IPC_ENABLE_PING + +// NOTE: MT Multi Target, ST = Single Target +IPC_FUNCIDS_TABLE_START + + //This is where common function ID's that any instance can support should be + //defined. + IPC_FUNCIDS_MT_START +#ifdef IPC_ENABLE_PING + IPC_FUNC_ID(IPC_MT_PING) //anyone can ping anyone else +#endif + IPC_FUNCIDS_MT_END + + //Functions that are only supported by GPE0 should be defined here + //These function ID's can only be sent to GPE0 + IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE0) + IPC_FUNC_ID(IPC_ST_TEST_FUNC0) + IPC_FUNC_ID(IPC_ST_APSS_START_PWR_MEAS_READ_FUNCID) + IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE0) + + //Functions that are only supported by GPE1 should be defined here + //These function ID's can only be sent to GPE1 + IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE1) + IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE1) + + //Functions that are only supported by GPE2 should be defined here + //These function ID's can only be sent to GPE2 + IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE2) + IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE2) + + //Functions that are only supported by GPE3 should be defined here + //These function ID's can only be sent to GPE3 + IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE3) + IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE3) + + //Functions that are only supported by PPC should be defined here + //These function ID's can only be sent to the PPC + IPC_FUNCIDS_ST_START(OCCHW_INST_ID_PPC) + IPC_FUNCIDS_ST_END(OCCHW_INST_ID_PPC) + +IPC_FUNCIDS_TABLE_END + +#endif /*__IPC_FUNC_IDS_H__*/ diff --git a/src/occ_gpe0/Makefile b/src/occ_gpe0/Makefile new file mode 100644 index 0000000..0039e1d --- /dev/null +++ b/src/occ_gpe0/Makefile @@ -0,0 +1,105 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/occ_gpe0/Makefile $ +# +# OpenPOWER OnChipController Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +#remove this once we have a real compiler +export P2P_ENABLE = 1 + +#Pull in the definitions that affect all makefiles for this image +include img_defs.mk + +#Pull in object file names for the top directory +include topfiles.mk + +ifdef P2P_ENABLE +include $(P2P_SRCDIR)/p2pfiles.mk +endif + +PK_MAKE_DIR := $(PK_SRCDIR)/$(PPE_TYPE) +OBJS := $(addprefix $(OBJDIR)/, $(TOP_OBJECTS)) +PKLIB := $(OBJDIR)/pk/libpk.a +COMMONLIB := $(OBJDIR)/commonlib/libcommon.a +OCCLIB := $(OBJDIR)/occlib/libocc.a +LIB_DIRS = -L$(OBJDIR)/pk -L$(OBJDIR)/commonlib -L$(OBJDIR)/occlib +LINK_OBJS = $(OBJS) $(PKLIB) $(COMMONLIB) $(OCCLIB) +LINK_SCRIPT = $(addprefix $(OBJDIR)/, linkscript) + +ifdef P2P_ENABLE +P2PLIB := $(OBJDIR)/p2p/libp2p.a +LIB_DIRS += -L$(OBJDIR)/p2p +LINK_OBJS += $(P2PLIB) +endif + +#default target is to make a binary application image +#This removes all unecessary headers from the ELF executable +$(OBJDIR)/$(IMAGE_NAME).bin $(OBJDIR)/$(IMAGE_NAME).dis: $(OBJDIR)/$(IMAGE_NAME).out + $(OBJCOPY) -O binary $< $(OBJDIR)/$(IMAGE_NAME).bin + $(OBJDUMP) -S $< > $(OBJDIR)/$(IMAGE_NAME).dis + +#create a linked ELF executable +$(OBJDIR)/$(IMAGE_NAME).out: $(LINK_OBJS) $(LINK_SCRIPT) + $(LD) -e __system_reset -N -T$(LINK_SCRIPT) -Map $(OBJDIR)/$(IMAGE_NAME).map -Bstatic -o $(OBJDIR)/$(IMAGE_NAME).out $(LIB_DIRS) $(OBJS) -locc -lcommon -lpk -lp2p + +#pass the link command file through the C preprocessor to evaluate macros and remove comments +$(LINK_SCRIPT): link.cmd + $(CPP) -E -x c -P $(DEFS) link.cmd -o $(LINK_SCRIPT) + +#Create an obj directory if needed +$(LINK_OBJS) $(OBJS) $(OBJS:.o=.d): | $(OBJDIR) + +$(OBJDIR): + mkdir -p $(OBJDIR) + +.PHONY: clean $(PKLIB) $(P2PLIB) + +#Build macro-specific kernel code +$(PKLIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(PK_MAKE_DIR) + +#Build the code that is common for all processors (PPEs and 405) +$(COMMONLIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(COMMONLIB_SRCDIR) + +#Build the code that is common for all OCC processors (GPEs and 405) +$(OCCLIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(OCCLIB_SRCDIR) + +ifdef P2P_ENABLE +$(P2PLIB): + $(MAKE) -I $(IMAGE_SRCDIR) -C $(P2P_SRCDIR) +endif + +# collect all of the trace hash files for this image into a single trexStringFile +.PHONY : tracehash +tracehash: + mkdir -p $(OBJDIR) + $(THASH) -c -d $(OBJDIR) -s $(OBJDIR)/trexStringFile + +#clean the kernel directory first, then the application level clean +clean: + rm -fr $(OBJDIR) + +#Add dependencies to header files +ifneq ($(MAKECMDGOALS),clean) +include $(OBJS:.o=.d) +endif diff --git a/src/occ_gpe0/apss_read.c b/src/occ_gpe0/apss_read.c new file mode 100644 index 0000000..ce9e23c --- /dev/null +++ b/src/occ_gpe0/apss_read.c @@ -0,0 +1,45 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/occ_gpe0/apss_read.c $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + + +#include "pk.h" +#include "ppe42_scom.h" +#include "ipc_api.h" + +void apss_start_pwr_meas_read(ipc_msg_t* cmd, void* arg) +{ + //Note: arg was set to 0 in ipc func table (ipc_func_tables.c), so don't use it + + int rc; + + // send back a response + rc = ipc_send_rsp(cmd, IPC_RC_SUCCESS); + + if(rc) + { + pk_halt(); + } +} + diff --git a/src/occ_gpe0/gpe0_main.c b/src/occ_gpe0/gpe0_main.c new file mode 100644 index 0000000..ada93fa --- /dev/null +++ b/src/occ_gpe0/gpe0_main.c @@ -0,0 +1,211 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/occ_gpe0/gpe0_main.c $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +/// \file gpe0_main.c +/// \brief Sample program that creates and starts a thread +/// +/// This file demonstrates how to create a thread and run it. It also provides +/// an example of how to add traces to the code. + +#include "pk.h" +#include "ipc_api.h" +#include "ipc_ping.h" + +#define KERNEL_STACK_SIZE 256 +#define MAIN_THREAD_STACK_SIZE 512 + +uint8_t G_kernel_stack[KERNEL_STACK_SIZE]; +uint8_t G_main_thread_stack[MAIN_THREAD_STACK_SIZE]; +PkThread G_main_thread; + +//statically initialize a ping command message +IPC_PING_CMD_CREATE(G_ping_cmd); + +//statically initialize an IPC message queue +IPC_MSGQ_CREATE(G_gpe0_test_msgq0); + +//statically initialize an IPC message queue message. Responses to +//this message will automatically be placed on the message queue. +IPC_MSGQ_MSG_CREATE(G_test_msg, IPC_ST_TEST_FUNC0, &G_gpe0_test_msgq0); + + +// Continuously ping each OCC instance +void main_thread(void* arg) +{ + uint8_t instance; + int rc; + int func_id; + ipc_msg_t *test_msg; + + PK_TRACE("thread started"); + + PK_TRACE("Waiting for ping response from all instances"); + for(instance = 0; instance < OCCHW_MAX_INSTANCES; instance++) + { + // Wait for each instance (including self) to start accepting IPC commands + do + { + pk_sleep(PK_MILLISECONDS(10)); + rc = ipc_ping(&G_ping_cmd, instance); + }while(rc == IPC_RC_TARGET_BLOCKED); + + if(rc && rc != IPC_RC_TARGET_BLOCKED) + { + PK_TRACE("phase 1 ipc_ping(%u) failed with rc = 0x%08x", instance, rc); + PK_TRACE_BIN("G_ping_cmd:", &G_ping_cmd, sizeof(G_ping_cmd)); + pk_halt(); + } + PK_TRACE("Ping response received from instance(%d)", instance); + } + + PK_TRACE("Starting infinite loop test"); + while(1) + { + for(instance = 0; instance < OCCHW_MAX_INSTANCES; instance++) + { + // Ping each instance (including ourself) + rc = ipc_ping(&G_ping_cmd, instance); + if(rc) + { + PK_TRACE("phase 2 ipc_ping(%u) failed with rc = 0x%08x", instance, rc); + PK_TRACE_BIN("G_ping_cmd:", &G_ping_cmd, sizeof(G_ping_cmd)); + pk_halt(); + } + } + + // Send an IPC_ST_TEST_FUNC0 message (to ourselves) if the message + // isnt' already in-flight. + if(ipc_is_free(&G_test_msg)) + { + rc = ipc_send_cmd(&G_test_msg); + if(rc) + { + pk_halt(); + } + } + + // wait for a IPC_ST_TEST_FUNC0 command or response message to arrive + rc = ipc_msgq_recv(&test_msg, &G_gpe0_test_msgq0, PK_MILLISECONDS(1)); + if(!rc) + { + //verify that the command message type is what we expected + func_id = ipc_get_funcid(test_msg); + if(func_id != IPC_ST_TEST_FUNC0) + { + //unexpected func id + //(probably caused by a mismatch between function table + // and function id ordering) + rc = ipc_send_rsp(test_msg, IPC_RC_CMD_NOT_SUPPORTED); + } + else + { + //Is this a response to the message we sent to ourselves? + if(ipc_is_a_response(test_msg)) + { + //check that the remote end was successful + if(ipc_get_rc(test_msg) != IPC_RC_SUCCESS) + { + pk_halt(); + } + //free up the message for sending again + ipc_free_msg(test_msg); + } + else + { + //successfully recieved the command message. + //Send a response message back. + rc = ipc_send_rsp(test_msg, IPC_RC_SUCCESS); + } + } + if(rc) + { + //failed to send the response back + pk_halt(); + } + } + else + { + //Unless it's a timeout, a non-zero rc is an error + if(rc != IPC_RC_TIMEOUT) + { + //Failure encountered while waiting for a new message + pk_halt(); + } + } + pk_sleep(PK_MILLISECONDS(1)); + } +} + +// The main function is called by the boot code (after initializing some +// registers) +int main(int argc, char **argv) +{ + int rc; + + // initializes kernel data (stack, threads, timebase, timers, etc.) + pk_initialize((PkAddress)G_kernel_stack, + KERNEL_STACK_SIZE, + PK_TIMEBASE_CONTINUES, + PPE_TIMEBASE_HZ); + + PK_TRACE("Kernel init completed"); + + // Disable IPC's and register the IPC interrupt handler + rc = ipc_init(); + if(rc) + { + PK_TRACE("ipc_init failed with rc = 0x%08x", rc); + pk_halt(); + } + + // enable IPC's + rc = ipc_enable(); + if(rc) + { + PK_TRACE("ipc_enable failed with rc = 0x%08x", rc); + pk_halt(); + } + + //Initialize the thread control block for G_main_thread + pk_thread_create(&G_main_thread, + (PkThreadRoutine)main_thread, + (void*)NULL, + (PkAddress)G_main_thread_stack, + (size_t)MAIN_THREAD_STACK_SIZE, + (PkThreadPriority)1); + + //PK_TRACE_BIN("G_main_thread", &G_main_thread, sizeof(G_main_thread)); + + //Make G_main_thread runnable + pk_thread_resume(&G_main_thread); + + PK_TRACE("Starting thread(s)"); + + // Start running the highest priority thread. + // This function never returns + pk_start_threads(); + + return 0; +} diff --git a/src/occ_gpe0/img_defs.mk b/src/occ_gpe0/img_defs.mk new file mode 100644 index 0000000..21c0de7 --- /dev/null +++ b/src/occ_gpe0/img_defs.mk @@ -0,0 +1,258 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/occ_gpe0/img_defs.mk $ +# +# OpenPOWER OnChipController Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +# Make header for GPE PK builds +# +# The application may define the following variables to control the +# build process: +# +# IMG_INCLUDES : Aplication-specific header search paths +# +# DEFS : A string of -D<symbol>[=<value>] to control compilation +# +# PK : Default ..; The path to the PK source code. +# The default is set for building the PK +# subdirectories. +# +# PK_THREAD_SUPPORT : (0/1, default 1); Compile PK thread and +# semaphore suppprt +# +# PK_TIMER_SUPPORT : (0/1, default 1); Compile PK timer suppprt +# +# SIMICS_ENVIRONMENT : (0/1, current default 0); Compile for Simics +# +# SIMICS_MAGIC_PANIC : (0/1, current default 0); Use Simics Magic +# breakpoint for PK_PANIC() instead of PowerPC trap. +# Note that Simics does not model trap correctly in +# external debug mode. +# +# GCC-O-LEVEL : The optimization level passed to GCC (default -Os). May +# also be defined empty (GCC-O-LEVEL=) to disable +# optimization. This variable can also be used to pass +# any other non-default setting to GCC, e.g. +# make GCC-O-LEVEL="-Os -fno-branch-count-reg" +# +# GCC-TOOL-PREFIX : The full path (including executable file prefixes) to +# the GCC cross-development tools to use. The default is +# "ppcnf-mcp5-" +# +# CTEPATH : This variable defaults to the afs/awd CTE tool +# installation - The PORE binutils are stored there. If +# you are not in Austin be sure to define CTEPATH in +# your .profile. +# +# OBJDIR : target directory for all generated files + +IMAGE_NAME := occ_gpe0 + +PPE_TYPE := gpe + +ifndef IMAGE_SRCDIR +export IMAGE_SRCDIR = $(abspath .) +endif + +ifndef IMG_INCLUDES +export IMG_INCLUDES = -I$(IMAGE_SRCDIR) +endif + +ifndef GLOBAL_INCLUDES +export GLOBAL_INCLUDES = -I$(IMAGE_SRCDIR)/.. +endif + +ifndef BASE_OBJDIR +export BASE_OBJDIR = $(abspath ../../../obj) +endif + +export IMG_OBJDIR = $(BASE_OBJDIR)/$(IMAGE_NAME) + +ifndef PK_SRCDIR +export PK_SRCDIR = $(abspath ../ppe/pk) +endif + +ifndef COMMONLIB_SRCDIR +export COMMONLIB_SRCDIR = $(abspath ../lib/common) +endif + +ifndef OCCLIB_SRCDIR +export OCCLIB_SRCDIR = $(abspath ../lib/occlib) +endif + +ifndef GCC-TOOL-PREFIX +GCC-TOOL-PREFIX = $(CTEPATH)/tools/ppcgcc/prod/bin/powerpc-linux- +endif + +ifndef BINUTILS-TOOL-PREFIX +BINUTILS-TOOL-PREFIX = $(CTEPATH)/tools/ppetools/prod/powerpc-eabi/bin/ +endif + +ifndef P2P_SRCDIR +export P2P_SRCDIR = $(abspath ../ppe/tools/PowerPCtoPPE) +endif + +ifndef PPETRACEPP_DIR +export PPETRACEPP_DIR = $(abspath ../ppe/tools/ppetracepp) +endif + +OBJDIR = $(IMG_OBJDIR)$(SUB_OBJDIR) + + +CC_ASM = $(GCC-TOOL-PREFIX)gcc +TCC = $(PPETRACEPP_DIR)/ppetracepp $(GCC-TOOL-PREFIX)gcc +CC = $(GCC-TOOL-PREFIX)gcc +AS = $(BINUTILS-TOOL-PREFIX)as +AR = $(BINUTILS-TOOL-PREFIX)ar +LD = $(BINUTILS-TOOL-PREFIX)ld +OBJDUMP = $(BINUTILS-TOOL-PREFIX)objdump +OBJCOPY = $(BINUTILS-TOOL-PREFIX)objcopy +TCPP = $(PPETRACEPP_DIR)/ppetracepp $(GCC-TOOL-PREFIX)gcc +THASH = $(PPETRACEPP_DIR)/tracehash.pl +CPP = $(GCC-TOOL-PREFIX)gcc + +ifdef P2P_ENABLE +PCP = $(P2P_SRCDIR)/ppc-ppe-pcp.py +endif + + +ifndef CTEPATH +$(warning The CTEPATH variable is not defined; Defaulting to /afs/awd) +export CTEPATH = /afs/awd/projects/cte +endif + +ifeq "$(PK_TIMER_SUPPORT)" "" +PK_TIMER_SUPPORT = 1 +endif + +ifeq "$(PK_THREAD_SUPPORT)" "" +PK_THREAD_SUPPORT = 1 +endif + +ifeq "$(PK_TRACE_SUPPORT)" "" +PK_TRACE_SUPPORT = 1 +endif + +# Generate a 16bit trace string hash prefix value based on the name of this image. This will form +# the upper 16 bits of the 32 bit trace hash values. +ifndef PK_TRACE_HASH_PREFIX +PK_TRACE_HASH_PREFIX := $(shell echo $(IMAGE_NAME) | md5sum | cut -c1-4 | xargs -i printf "%d" 0x{}) +endif + + +ifndef GCC-O-LEVEL +#GCC-O-LEVEL = -Os +GCC-O-LEVEL = -O -g +endif + +GCC-DEFS += -DIMAGE_NAME=$(IMAGE_NAME) +GCC-DEFS += -DPK_TIMER_SUPPORT=$(PK_TIMER_SUPPORT) +GCC-DEFS += -DPK_THREAD_SUPPORT=$(PK_THREAD_SUPPORT) +GCC-DEFS += -DPK_TRACE_SUPPORT=$(PK_TRACE_SUPPORT) +GCC-DEFS += -DPK_TRACE_HASH_PREFIX=$(PK_TRACE_HASH_PREFIX) +GCC-DEFS += -DUSE_PK_APP_CFG_H=1 +GCC-DEFS += -D__PK__=1 +DEFS += $(GCC-DEFS) + +############################################################################ + +INCLUDES += $(IMG_INCLUDES) $(GLOBAL_INCLUDES) \ + -I$(PK_SRCDIR)/kernel -I$(PK_SRCDIR)/ppe42 -I$(PK_SRCDIR)/trace \ + -I$(PK_SRCDIR)/$(PPE_TYPE) -I$(PK_SRCDIR)/../../include \ + -I$(PK_SRCDIR)/../../include/registers -I$(OCCLIB_SRCDIR) -I$(COMMONLIB_SRCDIR) + +PIPE-CFLAGS = -pipe -Wa,-m405 + +GCC-CFLAGS += -Wall -fsigned-char -msoft-float \ + -mcpu=405 -mmulhw -mmultiple \ + -meabi -msdata=eabi -ffreestanding -fno-common -Werror \ + -fno-inline-functions-called-once \ + -ffixed-r11 -ffixed-r12 \ + -ffixed-r14 -ffixed-r15 -ffixed-r16 -ffixed-r17 \ + -ffixed-r18 -ffixed-r19 -ffixed-r20 -ffixed-r21 \ + -ffixed-r22 -ffixed-r23 -ffixed-r24 -ffixed-r25 \ + -ffixed-r26 -ffixed-r27 \ + -ffixed-cr1 -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 \ + -ffixed-cr5 -ffixed-cr6 -ffixed-cr7 + +CFLAGS = -c $(GCC-CFLAGS) $(PIPE-CFLAGS) $(GCC-O-LEVEL) $(INCLUDES) + +CPPFLAGS = -E + +ASFLAGS = -mppe42 + +ifdef P2P_ENABLE +#use this to disable sda optimizations +#PCP-FLAG = + +#use this to enable sda optimizations +PCP-FLAG = -e +endif +############################################################################ + +#override the GNU Make implicit rule for going from a .c to a .o +%.o: %.c + +$(OBJDIR)/%.s: %.c + $(TCC) $(CFLAGS) $(DEFS) -S -o $@ $< + +#override the GNU Make implicit rule for going from a .S to a .o +%.o: %.S + +$(OBJDIR)/%.s: %.S + $(TCPP) $(CFLAGS) $(DEFS) $(CPPFLAGS) -o $@ $< +.PRECIOUS: $(OBJDIR)/%.s + +ifndef P2P_ENABLE + +$(OBJDIR)/%.o: $(OBJDIR)/%.s + $(AS) $(ASFLAGS) -o $@ $< + +else + +$(OBJDIR)/%.es: $(OBJDIR)/%.s + $(PCP) $(PCP-FLAG) -f $< +.PRECIOUS: $(OBJDIR)/%.es + +$(OBJDIR)/%.o: $(OBJDIR)/%.es + $(AS) $(ASFLAGS) -o $@ $< + +endif + +# From the GNU 'Make' manual - these scripts uses the preprocessor to +# create dependency files (*.d), then mungs them slightly to make them +# work as Make targets. The *.d files are include-ed in the +# subdirectory Makefiles. + +$(OBJDIR)/%.d: %.c + @set -e; rm -f $@; \ + echo -n "$(OBJDIR)/" > $@.$$$$; \ + $(CC_ASM) -MM $(INCLUDES) $(CPPFLAGS) $(DEFS) $< >> $@.$$$$; \ + sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \ + rm -f $@.$$$$ + +$(OBJDIR)/%.d: %.S + @set -e; rm -f $@; \ + echo -n "$(OBJDIR)/" > $@.$$$$; \ + $(CC_ASM) -MM $(INCLUDES) $(CPPFLAGS) $(DEFS) $< >> $@.$$$$; \ + sed 's,\($*\)\.o[ :]*,\1.o $@ : ,g' < $@.$$$$ > $@; \ + rm -f $@.$$$$ + diff --git a/src/occ_gpe0/ipc_func_tables.c b/src/occ_gpe0/ipc_func_tables.c new file mode 100644 index 0000000..09e9382 --- /dev/null +++ b/src/occ_gpe0/ipc_func_tables.c @@ -0,0 +1,68 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/occ_gpe0/ipc_func_tables.c $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include "ipc_api.h" +#include "ipc_ping.h" + +void apss_start_pwr_meas_read(ipc_msg_t* cmd, void* arg); + +extern ipc_msgq_t G_gpe0_test_msgq0; + +// Function table for multi target (common) functions +IPC_MT_FUNC_TABLE_START + +#ifdef IPC_ENABLE_PING +IPC_HANDLER(ipc_ping_handler, 0) // 0 - IPC_MT_PING +#else +IPC_HANDLER_DEFAULT // 0 +#endif + +IPC_HANDLER_DEFAULT // 1 +IPC_HANDLER_DEFAULT // 2 +IPC_HANDLER_DEFAULT // 3 +IPC_HANDLER_DEFAULT // 4 +IPC_HANDLER_DEFAULT // 5 +IPC_HANDLER_DEFAULT // 6 +IPC_HANDLER_DEFAULT // 7 +IPC_MT_FUNC_TABLE_END + +// Function table for single target (processor-specific) functions +IPC_ST_FUNC_TABLE_START +IPC_MSGQ_HANDLER(&G_gpe0_test_msgq0) // 0 - IPC_ST_TEST_FUNC0 +IPC_HANDLER(apss_start_pwr_meas_read, 0) // 1 - IPC_ST_APSS_START_PWR_MEAS_READ_FUNCID +IPC_HANDLER_DEFAULT // 2 +IPC_HANDLER_DEFAULT // 3 +IPC_HANDLER_DEFAULT // 4 +IPC_HANDLER_DEFAULT // 5 +IPC_HANDLER_DEFAULT // 6 +IPC_HANDLER_DEFAULT // 7 +IPC_HANDLER_DEFAULT // 8 +IPC_HANDLER_DEFAULT // 9 +IPC_HANDLER_DEFAULT // 10 +IPC_HANDLER_DEFAULT // 11 +IPC_HANDLER_DEFAULT // 12 +IPC_HANDLER_DEFAULT // 13 +IPC_HANDLER_DEFAULT // 14 +IPC_HANDLER_DEFAULT // 15 +IPC_ST_FUNC_TABLE_END diff --git a/src/occ_gpe0/link.cmd b/src/occ_gpe0/link.cmd new file mode 100644 index 0000000..a64a21a --- /dev/null +++ b/src/occ_gpe0/link.cmd @@ -0,0 +1,123 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/occ_gpe0/link.cmd $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ + +// Need to do this so that elf32-powerpc is not modified! +#undef powerpc + +#ifndef INITIAL_STACK_SIZE +#define INITIAL_STACK_SIZE 256 +#endif + +OUTPUT_FORMAT(elf32-powerpc); + +// Shared data segment starts at 0xfff00000 and is 4kb, so GPE0 +// is loaded at 0xfff01000 +#define SRAM_START 0xfff01000 +#define SRAM_LENGTH 0xF000 +#define PPE_DEBUG_PTRS_OFFSET 0x180 + +MEMORY +{ + sram : ORIGIN = SRAM_START, LENGTH = SRAM_LENGTH +} + +// This symbol is only needed by external debug tools, so add this command +// to ensure that table is pulled in by the linker even though PPE code +// never references it. +EXTERN(pk_debug_ptrs); + +SECTIONS +{ + . = SRAM_START; + + . = ALIGN(512); + + _VECTOR_START = .; + + .vectors _VECTOR_START : { *(.vectors) } > sram + + /////////////////////////////////////////////////////////////////////////// + // Debug Pointers Table + // + // We want the debug pointers table to always appear at + // PPE_DEBUG_PTRS_OFFSET from the IVPR address. + /////////////////////////////////////////////////////////////////////////// + + _DEBUG_PTRS_START = _VECTOR_START + PPE_DEBUG_PTRS_OFFSET; + .debug_ptrs _DEBUG_PTRS_START : { *(.debug_ptrs) } > sram + + //////////////////////////////// + // All non-vector code goes here + //////////////////////////////// + .text : { *(.text) } > sram + + //////////////////////////////// + // Read-only Data + //////////////////////////////// + + . = ALIGN(8); + _RODATA_SECTION_BASE = .; + + // SDA2 constant sections .sdata2 and .sbss2 must be adjacent to each + // other. Our SDATA sections are small so we'll use strictly positive + // offsets. + + _SDA2_BASE_ = .; + .sdata2 . : { *(.sdata2) } > sram + .sbss2 . : { *(.sbss2) } > sram + + // Other read-only data. + + .rodata . : { *(.rodata*) *(.got2) } > sram + + _RODATA_SECTION_SIZE = . - _RODATA_SECTION_BASE; + + //////////////////////////////// + // Read-write Data + //////////////////////////////// + + . = ALIGN(8); + _DATA_SECTION_BASE = .; + + // SDA sections .sdata and .sbss must be adjacent to each + // other. Our SDATA sections are small so we'll use strictly positive + // offsets. + + _SDA_BASE_ = .; + .sdata . : { *(.sdata) } > sram + .sbss . : { *(.sbss) } > sram + + // Other read-write data + // It's not clear why boot.S is generating empty .glink,.iplt + + .rela . : { *(.rela*) } > sram + .rwdata . : { *(.data) *(.bss) } > sram +// .iplt . : { *(.iplt) } > sram + + _PK_INITIAL_STACK_LIMIT = .; + . = . + INITIAL_STACK_SIZE; + _PK_INITIAL_STACK = . - 1; + +} diff --git a/src/occ_gpe0/pk_app_cfg.h b/src/occ_gpe0/pk_app_cfg.h new file mode 100644 index 0000000..7d01008 --- /dev/null +++ b/src/occ_gpe0/pk_app_cfg.h @@ -0,0 +1,56 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/occ_gpe0/pk_app_cfg.h $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#ifndef __PK_APP_CFG_H__ +#define __PK_APP_CFG_H__ +//----------------------------------------------------------------------------- +// *! (C) Copyright International Business Machines Corp. 2014 +// *! All Rights Reserved -- Property of IBM +// *! *** IBM Confidential *** +//----------------------------------------------------------------------------- + +/// \file pk_app_cfg.h +/// \brief Application specific overrides go here. +/// + +#include "global_app_cfg.h" + +/// Static configuration data for external interrupts: +/// +/// IRQ#, TYPE, POLARITY, ENABLE +/// +#define APPCFG_EXT_IRQS_CONFIG \ + OCCHW_IRQ_CHECK_STOP_GPE0 OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_IPI0_HI_PRIORITY OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + OCCHW_IRQ_IPI0_LO_PRIORITY OCCHW_IRQ_TYPE_EDGE OCCHW_IRQ_POLARITY_RISING OCCHW_IRQ_MASKED \ + +/// The Instance ID of the occ processor that this application is intended to run on +/// 0-3 -> GPE, 4 -> 405 +#define APPCFG_OCC_INSTANCE_ID 0 + +// This application will statically initialize it's external interrupt table +#define STATIC_IRQ_TABLE + +#define STATIC_IPC_TABLES +#endif /*__PK_APP_CFG_H__*/ diff --git a/src/occ_gpe0/pk_app_irq_table.c b/src/occ_gpe0/pk_app_irq_table.c new file mode 100644 index 0000000..9a3c09b --- /dev/null +++ b/src/occ_gpe0/pk_app_irq_table.c @@ -0,0 +1,93 @@ +/* IBM_PROLOG_BEGIN_TAG */ +/* This is an automatically generated prolog. */ +/* */ +/* $Source: src/occ_gpe0/pk_app_irq_table.c $ */ +/* */ +/* OpenPOWER OnChipController Project */ +/* */ +/* Contributors Listed Below - COPYRIGHT 2015 */ +/* [+] International Business Machines Corp. */ +/* */ +/* */ +/* Licensed under the Apache License, Version 2.0 (the "License"); */ +/* you may not use this file except in compliance with the License. */ +/* You may obtain a copy of the License at */ +/* */ +/* http://www.apache.org/licenses/LICENSE-2.0 */ +/* */ +/* Unless required by applicable law or agreed to in writing, software */ +/* distributed under the License is distributed on an "AS IS" BASIS, */ +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ +/* implied. See the License for the specific language governing */ +/* permissions and limitations under the License. */ +/* */ +/* IBM_PROLOG_END_TAG */ +#include "pk.h" + +EXTERNAL_IRQ_TABLE_START +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_DEBUGGER +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_TRACE_TRIGGER +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_OCC_ERROR +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PBA_ERROR +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_SRT_ERROR +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_GPE0_HALT +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_GPE1_HALT +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_GPE2_HALT +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_GPE3_HALT +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PPC405_HALT +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_OCB_ERROR +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_SPIPSS_ERROR +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_CHECK_STOP_PPC405 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_CHECK_STOP_GPE0 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_CHECK_STOP_GPE1 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_CHECK_STOP_GPE2 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_CHECK_STOP_GPE3 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_OCC_MALF_ALERT +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_ADU_MALF_ALERT +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_EXTERNAL_TRAP +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IVRM_PVREF_ERROR +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_OCC_TIMER0 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_OCC_TIMER1 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_AVS_SLAVE0 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_AVS_SLAVE1 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI0_HI_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI1_HI_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI2_HI_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI3_HI_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI4_HI_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_ADCFSM_ONGOING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_RESERVED_31 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PBAX_OCC_SEND +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PBAX_OCC_PUSH0 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PBAX_OCC_PUSH1 +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PBA_BCDE_ATTN +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PBA_BCUE_ATTN +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM0_PULL +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM0_PUSH +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM1_PULL +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM1_PUSH +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM2_PULL +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM2_PUSH +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM3_PULL +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_STRM3_PUSH +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE0_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE1_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE2_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE3_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE4_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE5_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE6_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_PCB_INTR_TYPE7_PENDING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_O2S_0A_ONGOING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_O2S_0B_ONGOING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_O2S_1A_ONGOING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PMC_O2S_1B_ONGOING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_PSSBRIDGE_ONGOING +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI0_LO_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI1_LO_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI2_LO_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI3_LO_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_IPI4_LO_PRIORITY +IRQ_HANDLER_DEFAULT //OCCHW_IRQ_RESERVED_63 +EXTERNAL_IRQ_TABLE_END + diff --git a/src/occ_gpe0/topfiles.mk b/src/occ_gpe0/topfiles.mk new file mode 100644 index 0000000..d251447 --- /dev/null +++ b/src/occ_gpe0/topfiles.mk @@ -0,0 +1,28 @@ +# IBM_PROLOG_BEGIN_TAG +# This is an automatically generated prolog. +# +# $Source: src/occ_gpe0/topfiles.mk $ +# +# OpenPOWER OnChipController Project +# +# Contributors Listed Below - COPYRIGHT 2015 +# [+] International Business Machines Corp. +# +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or +# implied. See the License for the specific language governing +# permissions and limitations under the License. +# +# IBM_PROLOG_END_TAG +TOP-C-SOURCES = gpe0_main.c pk_app_irq_table.c ipc_func_tables.c apss_read.c +TOP-S-SOURCES = + +TOP_OBJECTS = $(TOP-C-SOURCES:.c=.o) $(TOP-S-SOURCES:.S=.o) |