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* Get NEST DTS readings HWPWilliam Bryan2016-08-115-26/+168
| | | | | | | | | Change-Id: Ia0dff277cc79bb14f65805ffb483458480af89ca Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27776 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Add DIMM temperature validation, update fru flags, and rename dimm sensorChris Cain2016-08-1111-34/+121
| | | | | | | | | Change-Id: Ie201160d92b0d00dd523c78eb1496a1b05e2647a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27836 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Remove IBM Confidential DisclaimersWilliam Bryan2016-08-02230-1591/+366
| | | | | | | | Change-Id: Ie3dcd5b6cee3e6b191cf136d30af634c9966318e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27718 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Delete unused files, update PK, and use new compilersWilliam Bryan2016-07-29413-159476/+608
| | | | | | | | Change-Id: I9e4951a2cebd204d1ea752c63e3f2b532ad3a2db Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27465 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Command Changes for fan control and cappingChris Cain2016-07-134-76/+73
| | | | | | | | | | Change-Id: Ib8ba444674bbf5b5554f12730aaffa3ce7c087e4 RTC: 155693 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26005 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Fix DIMM temperature error handling for poll responseWilliam Bryan2016-06-294-43/+51
| | | | | | | | | | | RTC:155187 Change-Id: I38039dc18de9bfc5b9194f63b3b869bf7c16991f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26067 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Remove non product code filesWilliam Bryan2016-06-2023-5230/+2
| | | | | | | | Change-Id: Ib42630c94b0e0fbed2bd8c5939fde026af87a212 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26055 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Update SSX to latest in EKBWilliam Bryan2016-06-1384-1972/+2762
| | | | | | | | RTC: 132999 Change-Id: I29478c074e3086e0bf09b402d55782e03cb1f787 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23394 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Processor Thermal Control LoopWael El-Essawy2016-06-1313-176/+56
| | | | | | | | | | | | | | | | | | | Enable processor thermal control loop. Enable frequency votes due to thermal and error reading temperatures. Verify The following: *Error log generation when a proc reaches Error limit *Reach throttle points when: -- Processor reached over temperature limit -- Processor temperature sensors timeout enable transition to active mode Change-Id: Iae24f64a872e031e1cf93ff0d9248d3fa3847ed7 RTC: 130210 RTC: 133942 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25458 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Add support for Clear Error Log commandsWael El-Essawy2016-06-011-2/+2
| | | | | | | | | | | | uncommented "clear error log" command, tested command in simics. Change-Id: Id9afe81a58b797713f0aced63428ddd230823935 RTC: 133943 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24983 Tested-by: FSP CI Jenkins Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Pstate Infrastructure & Support config data required for active stateWael El-Essawy2016-05-2525-1443/+436
| | | | | | | | | | | | | | | | | | | | | | | | - Support all config data required for active state. - Set 'active ready' bit in poll response when all config data has been received. - Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist. - Put in TODO call PGPE to enable pstates this will also be telling PGPE how to set PMCR mode register (OCC control pstates or OPAL). - Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard codes until PGPE is available. - Call to "proc_pstate_initialize()" moved to state transition to observation - Cleanup proc_freq2pstate() - rewrite amec_slv_freq_smh() - the calls to proc_set_core_bounds() and proc_set_core_pstate() will be replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores or set pstate for all given cores. - Remove all DCM related code. Change-Id: I449d188b2cffc345afca19717dcbea037f159114 RTC:130224 RTC:150935 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Fix up SRC parsing errorsWilliam Bryan2016-05-1314-3341/+6
| | | | | | | | Change-Id: I4c708fbc0158577ff143462490e7abe8d3795d66 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24382 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Commit the FSP_COMM_INITIALIZED checpoint only if no errors occurWael El-Essawy2016-05-131-2/+5
| | | | | | | | | Change-Id: I4a40950cabc7712f31b776d2a1472e0b4dd7eee8 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24044 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Fix Ping Pong and HOMER addresses, usign new P9 pba_region default value.Wael El-Essawy2016-05-1315-98/+123
| | | | | | | | | | | | | | | | | | | | | | | The new P9 pba_region field in the PBA_MODE register is now 0b10 contrary to the P8 pba_region setting of 0b00. Addresses have been corrected for Ping Pong communications, HOMER Host Data, Sapphire Table, and HTMGT send and receive Buffers. Replaced Sapphire legacy term with OPAL. Defined COMMON_BASE_ADDRESS, and offset addresses relative to it. modified HOMER_HD_OFFSET, OCC_HTMGT_CMD_OFFSET_HOMER, OCC_HTMGT_RSP_OFFSET_HOMER, and OPAL_OFFSET_HOMER according to new P9 specifications. Change-Id: Ib233181c4ad1837b57c45144d1256b87799dc5bc Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24085 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Change combStringFile to occStringFileWilliam Bryan2016-05-101-1/+1
| | | | | | | Change-Id: I996a6475992943674debdc95607432777f3ea151 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24212 Tested-by: FSP CI Jenkins Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Build full OCC image and update build processWilliam Bryan2016-05-0425-436/+1275
| | | | | | | | Change-Id: I8e6d716a48f30021b653e850c74deb7526cfe293 RTC:133001 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22155 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Change attention type default to FSPWael El-Essawy2016-05-039-623/+17
| | | | | | | | | Change-Id: I6661e64e2bb29762ba038bddcebd9e6b4afcf85e RTC: 147814 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23618 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Empath counters collection PPE codeWael El-Essawy2016-05-033-126/+223
| | | | | | | | | Change-Id: Ic17691020a66dffd92e9a685616092043ff05476 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23976 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Create common handling path for FSP and BMC communicationChris Cain2016-04-2910-261/+144
| | | | | | | | | | Change-Id: Ie6eaa2054bb47d1b48d466409ebb44cbae2ea0ad RTC: 150749 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23616 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Poll with sensor support and power accumulator resizeChris Cain2016-04-1913-278/+297
| | | | | | | | | | Change-Id: I64eb18a567e8d899de085903412a9b4fd13e4be7 RTC: 148327 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22365 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Fix occ/ssx_checkpoint_panic_and_save_ffdc bugs and create two deathbedsWael El-Essawy2016-04-121-12/+64
| | | | | | | | | | | | | | | | | | | | | | 1. use r3 to index the lmw instruction. r0 is not a valid index register for this command ((RA|0) in the 405 user's manual). This maintains the integrity of the r1 register, and hence the correct restoration of all registers. 2. store the LR to the stack at the entrance of called functions, and restoring fron the stack before calling the blr return instruction. 3. to avoid infinite loop through the occ/ssx_checkpoint_panic_and_save_ffdc routines, two branch to self (deathbed) locations were created. In multichip systems, this will avoid competing for the FFDC scom registers, which may be causing an FFDC SCOM access timeout due to SCOM_PROTOCOL_ERROR_GETSCOM_BUSY error (0x00726615). Change-Id: Ifc1616212b4abdbce83008c4ba1ea16289ddaab2 CQ: SW324506 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21101 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable Master-slave OCC communicationWael El-Essawy2016-04-0538-2025/+1625
| | | | | | | | | | Change-Id: I445072e20d599e30f80cc8059b3f3b2a956c453e RTC: 133154 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22005 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Moving OCC Common Image from BAR3 to BAR2Wael El-Essawy2016-03-291-6/+6
| | | | | | | | | | Change-Id: Ied1545784fd0f4aa2e0fca0dcc04231795b8a8f2 RTC: 131182 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22481 Tested-by: FSP CI Jenkins Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Write error logs to SRAM for TMGT to collectWael El-Essawy2016-03-011-50/+21
| | | | | | | | | Change-Id: Iafba9e2b35c5ab9044cbea3ee2cf7fdc9c2834b9 RTC: 133943 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/21100 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Implement I2C locking with hostChris Cain2016-03-0119-614/+1081
| | | | | | | | | | Change-Id: I9e99e799e0df442bebef473360ca87d564f5ddaf RTC: 140545 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/12898 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Fix Bug: FFDC_BUFFER_ADDR not matching _LINEAR_RD_WINDOW_SECTION_BASEWael El-Essawy2016-02-162-3/+3
| | | | | | | | | | add comments to stress that these two variables must match Change-Id: I0e1571e1f092a16e142baf6a9d0625731ad0101a Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/24332 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Changed poll response to version 0x20William Bryan2016-01-279-238/+176
| | | | | | | | | RTC: 143441 Change-Id: Ib964b5f8d8b00029971935ffc8eb957975dc6cce Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/23406 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Implement code to read DIMM temperaturesChris Cain2016-01-2729-97/+1900
| | | | | | | | | | Change-Id: I98fc83ab1c78bd40241fe6e47a9ddeae24f78c38 RTC: 140093 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22770 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com>
* OCC GPE0: HWP to read Core/Quad DTSWael El-Essawy2016-01-193-68/+55
| | | | | | | | | | | | Updating the code with HWP, simulated under simics with core and quad DTSs, and verified trace results. Change-Id: I914d65687f7c26d7073edae846de6a2c6f84cc02 RTC: 140095 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22929 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: Wael Elessawy <welessa@us.ibm.com>
* Enabled reading CCSR via OCIWilliam Bryan2016-01-154-44/+40
| | | | | | | | | RTC: 140187 Change-Id: I3ad92658c18e76f58b3e7c9733e97cff437c7cdc Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22581 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Enable state transition to observationWilliam Bryan2015-12-1512-40/+62
| | | | | | | | | | | Enabled DCOM thread RTC:140900 Change-Id: I857e2c4b2a15903ccddc2df5db910dddf155a8e5 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22658 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* CC: Support Thermal Control Threshold Config Data format 0x13Wael El-Essawy2015-12-1117-909/+164
| | | | | | | | | | | | | | | | | | | | | Support thermal control thresholds format 0x13 config data command with new version 0x20 defined in P9 interface spec. All older P8 versions of format 0x13 deleted. Tested in simics. remove thermal thread. fix a dts calculation bug. add a firmware failure error log. Change-Id: I4a9979929292833a5e6f4f7f4e162ea20983b96a RTC: 141647 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22516 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Enable system config command and sensor listWilliam Bryan2015-12-109-152/+328
| | | | | | | | | | | Added configuration data debug command RTC: 141643 Change-Id: I3d98321508780c25795d66a8d353c36593448a6e Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22549 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Fix Timing Discrepancy between OCC and PPEsWael El-Essawy2015-12-093-7/+13
| | | | | | | | | | | | | | Fix the code so that The whole OCC complex runs at the same (nest) frequency. This is the POR, which also solves the timing bug. Change-Id: Ib33c1951384b552fc4a44e07be09e9261a4b133d RTC: 139478 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22554 Tested-by: FSP CI Jenkins Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* P9 change set APSS commandSheldon Bailey2015-12-083-119/+19
| | | | | | | | | RTC: 142759 Change-Id: Ia9032569afa954e58a1989d97de1a4dad4f221e4 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22512 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Change temperature sensor ID to uint32mbroyles2015-12-071-4/+4
| | | | | | | | Change-Id: Ic8e1ae62f203b3e9889ab0c4cd6dcb56226ea6cb Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22515 Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable set role command and retry APSS initWilliam Bryan2015-12-0410-522/+487
| | | | | | | | | | | | | | | Added changes to enable Simics console tracing Enabled memory configuration packet Removed Pstate data config command RTC: 141646 RTC: 142030 Change-Id: I85807a76bb9364b1f3b865fa91c28a3f46446531 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22434 Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Update Proc Core sensors in amec_slv_states for 24 coresWael El-Essawy2015-12-049-99/+815
| | | | | | | | | | | | | | | | | | | | | | | - maintain 8 core data collection states versus 16 rtls ticks core scheduling scheme, utilizing substates to perform 4 ms full 24 cores data collection. - introduce 4 substates, and distribute them over time (1,3,5,7) - spread core data collection over 8 subsates, reading 3 cores data each time. - eliminate gpe_bulk_core_data_t type - reset dts elements using for loop instead of memset - create amec_update_proc_core_group function and G_sensor_update_pattern array to easily modify core data sensors update pattern Change-Id: Idd752c6ea77829ac308e2089f6582db472c8badc RTC: 140094 RTC: 140183 RTC: 140186 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22347 Tested-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable Slave DTS calculation and sensor update.Fadi Kassem2015-11-2522-223/+161
| | | | | | | | Change-Id: I0feb572e650322326ce9a6c7b2affd9e58cd6b8d RTC:140183 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22303 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: Wael Elessawy <welessa@us.ibm.com>
* Miscellaneous core data collection clean-upWilliam Bryan2015-11-246-73/+35
| | | | | | | | Change-Id: I3096b79b1c82ea4457dbf4f3875e8b91b47d8768 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22281 Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: Wael Elessawy <welessa@us.ibm.com>
* OCC GPE0: Core Data Collection infrastructure in GPE0Wael El-Essawy2015-11-2315-406/+532
| | | | | | | | | | | | Create IPC function for core data collection return dummy data at this point to allow 405 to schedule and "use" data back. Change-Id: I520e9333fa25e37127d6af693ad6f21da3431939 RTC: 131183 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22247 Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: Fadi Kassem <fmkassem@us.ibm.com>
* Core data initialization and 24-core supportWilliam Bryan2015-11-2019-556/+286
| | | | | | | | | | RTC: 140187 RTC: 140186 Change-Id: I574acdc3933b4bc181a584226ea432b9abe72592 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22182 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
* Create gpe error codes file, and use general GPE error codesWael El-Essawy2015-11-175-32/+65
| | | | | | | | Change-Id: I5bd957a3267cf7720fbaf5af31d9f6d432e7cd53 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21997 Tested-by: FSP CI Jenkins Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
* Adding structures for core data collectionWilliam Bryan2015-11-174-1/+340
| | | | | | | | | | | RTC: 140186 Change-Id: I2bca70ddae4204ba2d5103e5afc0773e2d482f9f Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22103 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: Fadi Kassem <fmkassem@us.ibm.com>
* Update linkscript and init sectionsWilliam Bryan2015-11-174-17/+39
| | | | | | | | RTC: 134747 Change-Id: I3028b215f5560574e2ad5368f1a861bf46c61eb7 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21961 Reviewed-by: Wael Elessawy <welessa@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable the poll and data configuration commandsWilliam Bryan2015-11-1610-59/+42
| | | | | | | | | RTC: 140898 Change-Id: If9ef2233a631bb857a095746b095a06092e4aff0 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21976 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* Enable Sensor supportWael El-Essawy2015-11-1121-127/+234
| | | | | | | | | | | | | | add necessary sensor, amec, and other files to the build list. add the task_amec_slave to the rtls tick tables modify the gpe request structures to reflect the new P9 design enrich the .dis files contects for better debugging Change-Id: Iae39bb1c430da56310478c24a28aad6dfbc6d6d9 RTC: 133865 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21789 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Fix Powerpc to PPE tool for multiplyWael El-Essawy2015-11-101-12/+27
| | | | | | | | | | | This is a hw/ppe reviewed and merged fix that eleminates a bug in the multiplication call glue code. Change-Id: Ia563a6410042b328dd79d4b1c183aeed08781725 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21878 Tested-by: FSP CI Jenkins Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Implement new tick tableWilliam Bryan2015-11-052-39/+191
| | | | | | | | | | RTC: 140184 Change-Id: Iadf0ead19c1eeb67d71449471a29f96f2b6ecd57 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21740 Tested-by: FSP CI Jenkins Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher Cain <cjcain@us.ibm.com> Reviewed-by: Wael Elessawy <welessa@us.ibm.com>
* remove unused integers i and jWael El-Essawy2015-11-031-3/+0
| | | | | | | | Change-Id: I80962190a3e3babb7f7cc5700d9d1770e51adbbf Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21706 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
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