Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | setup the GPE0/1 Halt and the System Checkstop interrupts properly | Wael El-Essawy | 2017-04-25 | 1 | -7/+9 |
* | AVS Bus divider, loadline and misc changes | Chris Cain | 2017-01-18 | 1 | -1/+65 |
* | Update extended RC to 2 bytes | William Bryan | 2016-09-23 | 1 | -4/+4 |
* | Enable Master-slave OCC communication | Wael El-Essawy | 2016-04-05 | 1 | -1/+1 |
* | Write error logs to SRAM for TMGT to collect | Wael El-Essawy | 2016-03-01 | 1 | -50/+21 |
* | Implement I2C locking with host | Chris Cain | 2016-03-01 | 1 | -9/+2 |
* | Fixed warnings and added -Werror CFLAG | William Bryan | 2015-11-02 | 1 | -7/+12 |
* | OCC405 Stripped Down and Compiles | William Bryan | 2015-08-07 | 1 | -10/+19 |
* | new ssx and lib files | William Bryan | 2015-08-03 | 1 | -0/+974 |