| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: I18a532879deec3a8dd9f84396ac4ed2df1383881
RTC:192844
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59608
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
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RTC:131184
Change-Id: I2582a1eb9d599f700182f17047cc95accad03725
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51407
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Ieac1aa5e608a7ff778c71363756ac6c5ddeead89
RTC: 166206
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55252
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Prevent temperature timeout errors during state transition
Misc state characterization and observation state change fixes
Change-Id: Ideeaab96689b145ed960aef5743b8c3947e4ffeb
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53674
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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-Throttle noisy traces
-Add slave clip history to Call Home log
Change-Id: If498c4c5b7e445d7b1b43fb16a2790f11166e430
CMVC-Prereq: 1045167
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53578
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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RTC: 130217
CQ: SW414505
Change-Id: I9a91b4d3796a672bbdb3ba01c8080174da9d5733
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52281
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: Id7b66bab383d69017469aced62ec23bb7f7faaef
RTC: 133939
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51369
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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-CPU temp PER proc
-DIMM Temp changes
-Memory Bandwidth changes
-VRM VDD
-Error History counts
Change-Id: Ie30f373982a5f3327975d433d508ad2fb27f4fc3
RTC:133944
CMVC-Prereq: 1040415
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49395
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
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Change-Id: I23dd10a7bc78841ecd4382e8ac8667afbb7c2ddd
RTC: 163601
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49871
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: Iff22cd9126a450dc30583946883a7e89cba23345
CQ: SW398240
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50382
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: I2c4be270347c633e5a681d460b0f744982f81bcb
RTC: 180403
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48329
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: I044515d3fbd367c1a292c892ea32eb5b3d133413
CQ:SW397768
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44242
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Stop waiting for APSS data when detected complete but failed
Add history counts for GPEs not idle and APSS collection errors
Change-Id: I2bfaf36ee0b736a958fd41c1c2145f537fc883c5
RTC: 172963
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43052
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I804cdf63879a2b80c9e14149e45ee665240c4a88
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43244
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Correct power cap information in OPAL shared memory
Add non-zero error history counts to poll response
Fix Characterization to Active State change failure
Change-Id: I92b783b631e79786e6190a4def520fee32c2cc7c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43216
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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A subset of OCC sensors are now copied to main memory. Includes sensors
using both the full and counter sensor readings structures.
Also made the following changes to the sensor system:
* Added timestamp field to sensor_t
Change-Id: Ibd3044a1be09160c2d6bdb06ac3c291f874f714b
RTC: 153674
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42016
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: Ic6b8892285610985a80c623b6da35d2766926f4d
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42161
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: Ic2589a9e3fb5bad67ce85fb7a5f2c3e9af9f5047
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41887
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Shawn M. McCarney <shawnmm@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Id58a06378f3c0a7fd9fb436b96823eca15028031
RTC: 160889
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41513
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Ia14aebaf44e9a0a3d2e14a4ff3803793350986b4
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40521
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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- Adjust fmax on slave to account for diff freq
- Remove SIMICS_FLAG_ISSUE (automic registers not working in simics)
- Cleanup traces
Change-Id: Ifc30333463bc5a1e44ec81bd365860460b802e71
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40461
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I9c8aa4e4cd2272c213d063a27c019396928ebd94
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40290
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Ia45f35979077e78d4b5df278f5a7309446409bdf
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40035
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I3ee189b1088ff48ab9743233c1a05072730699b9
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39790
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Performed the following sensor renames required by this RTC story:
FREQA4MSP0Cy -> FREQACy
UTIL4MSP0Cy -> UTILCy
PWR250US -> PWRSYS
PWR250USP0 -> PWRPROC
Also renamed the following related symbols:
* Associated sensor_t field names in the amec_sys_t data structure
* Mini-sensor field names
* Parent sensors that contain a vector iterating over renamed sensors
Change-Id: I1e9e17661e5730ed6309fc7617c61bd973d2e44f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39772
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I7235c414923079701fdf1392960b3fc48363bff0
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38896
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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This resolve issue where master would not see any doorbells from slaves
Change-Id: I8ed37fa5147ba861cd4d4eea2063b76ccf7fba84
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38805
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I37e8174bcc6e99f602a66cff077ef41ad889b19c
RTC:165351
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34949
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: If5b024f031d4b266603720d126fce88bf2362e1a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36528
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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either implement todos or refer to planned RTC
Change-Id: Id9209bd9a89e0d38a56e2999f6e7fe2d16dd6433
RTC: 163361
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35861
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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FIFO4 register requires a 4 byte read or will hang.
OCC will request 4 byte read, but only look at first 2 for temperature.
FIFO register can only read one byte per request which is less efficient.
Change-Id: Ia0bbbc70f5b7de76f1bea64279b2ff7dd5b5a861
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35974
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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- monitor VR Fan (over-temperature) and OC (over-current)
- add VR Fan sensor to poll response (Temperature FRU type: VRM)
- log mfg error for OC
- add error history counters for each
Change-Id: Ia552aa2cc2db8adebcbbd928c146a057bb120c73
RTC: 132561
RTC: 132560
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35358
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: I55b6e59546710a537b65b8fb88ffb1739bccf560
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34008
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Also moved files common to occ_405/, occ_gpe0/,
occ_gpe1/, etc, to a new common directory to keep
src/ clean
Change-Id: Ib45d70d048a135832592953c955a325d20fa19ae
RTC: 163363
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33640
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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update the following in OPAL shared memory when any of these pieces
change:
* OCC State
* CPU Throttle status
* memory throttle status
* quick power drop
* power shifting ratio
* power cap type
* Min power cap
* Max power cap
* current power cap
*** When either throttle status bytes change alert OPAL of shared memory
interface change via setting SCOM bits 3 in the ext_intr_reason field
of OCC Misc register and bit 0 (core_ext_intr) to generate the interrupt.
Change-Id: Ic88a38aba4b84fb247389e712da2e326c2cd9c53
RTC: 130202
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32688
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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RTC:163333
Change-Id: Ide9c51be81fa1e2bb076700203dbeb0b3f341e87
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32134
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Ifd7741e863168584edadb7136aa90e4ec8227997
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31651
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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Change-Id: Ic6e65bcddaefd5213042707feffcf1272133e532
RTC: 161266
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31190
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I7c57c072f4f84f02ce7bbc5f95c80a4901d6c9a2
RTC:160341
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30180
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I2d416da654566747f40df3bed0e122919fc514e7
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29592
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: I98b745ccb56d89d066508d4195250b1bf446dbc6
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29898
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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RTC:148388
Change-Id: Iae66cd0a73032fa908eb96a149d4163397c2e275
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27781
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
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Change-Id: I08d76ac1db6e425a9690864f693f36cb848cead5
RTC: 153965
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28188
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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Change-Id: Ie201160d92b0d00dd523c78eb1496a1b05e2647a
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27836
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
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RTC: 132999
Change-Id: I29478c074e3086e0bf09b402d55782e03cb1f787
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23394
Tested-by: FSP CI Jenkins
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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- Support all config data required for active state.
- Set 'active ready' bit in poll response when all config data has been received.
- Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist.
- Put in TODO call PGPE to enable pstates this will also be telling PGPE how to
set PMCR mode register (OCC control pstates or OPAL).
- Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard
codes until PGPE is available.
- Call to "proc_pstate_initialize()" moved to state transition to observation
- Cleanup proc_freq2pstate()
- rewrite amec_slv_freq_smh()
- the calls to proc_set_core_bounds() and proc_set_core_pstate() will be
replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores
or set pstate for all given cores.
- Remove all DCM related code.
Change-Id: I449d188b2cffc345afca19717dcbea037f159114
RTC:130224
RTC:150935
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977
Tested-by: FSP CI Jenkins
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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Change-Id: I4c708fbc0158577ff143462490e7abe8d3795d66
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24382
Tested-by: FSP CI Jenkins
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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The new P9 pba_region field in the PBA_MODE register is now 0b10
contrary to the P8 pba_region setting of 0b00.
Addresses have been corrected for Ping Pong communications,
HOMER Host Data, Sapphire Table, and HTMGT send and receive Buffers.
Replaced Sapphire legacy term with OPAL.
Defined COMMON_BASE_ADDRESS, and offset addresses relative to it.
modified HOMER_HD_OFFSET, OCC_HTMGT_CMD_OFFSET_HOMER,
OCC_HTMGT_RSP_OFFSET_HOMER, and OPAL_OFFSET_HOMER according
to new P9 specifications.
Change-Id: Ib233181c4ad1837b57c45144d1256b87799dc5bc
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24085
Tested-by: FSP CI Jenkins
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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Change-Id: I445072e20d599e30f80cc8059b3f3b2a956c453e
RTC: 133154
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22005
Tested-by: FSP CI Jenkins
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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Change-Id: Ied1545784fd0f4aa2e0fca0dcc04231795b8a8f2
RTC: 131182
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22481
Tested-by: FSP CI Jenkins
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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