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* GPE Nest Frequency & Amester Name ChangesWilliam Bryan2017-02-146-19/+81
| | | | | | | | | | Change-Id: I46ee2502dcfd532b6ff30a32b0a645aecc285f21 RTC:168527 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36293 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Infrastructure for 24x7 data collectionmbroyles2017-02-1411-16/+324
| | | | | | | | | | Change-Id: I16277d8290f65ba489da1421783f3705be7281f4 RTC: 168729 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36043 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* AVS Bus update to use 32bit register accesses instead of 64Chris Cain2017-02-143-82/+115
| | | | | | | | | Change-Id: Ib31cb6ba5cc23f2599226628d36c7006dc911249 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/36250 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Fix DIMM temperature readsChris Cain2017-02-1410-182/+172
| | | | | | | | | | | | | FIFO4 register requires a 4 byte read or will hang. OCC will request 4 byte read, but only look at first 2 for temperature. FIFO register can only read one byte per request which is less efficient. Change-Id: Ia0bbbc70f5b7de76f1bea64279b2ff7dd5b5a861 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35974 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Fix duplicate SRC description tagsChris Cain2017-02-063-6/+7
| | | | | | | | | | | To prevent in the future, users should run: /esw/bin/bld/occScanForSRCs.pl Change-Id: I98c5bb24a212bd7796ffb8319552fff7cff94f62 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35978 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Sheldon R. Bailey <baileysh@us.ibm.com>
* Oversub polarity reversal fixWilliam Bryan2017-02-022-35/+35
| | | | | | | | | Change-Id: I1c31332bb0e5add0ff261fde1666ea0917f1db2e RTC:165351 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35763 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* WOF: Interface to read out OCC-PGPE shared SRAM and save dataAndres Lugo-Reyes2017-02-014-18/+114
| | | | | | | | Change-Id: I3300b3f2b8f237f2ac0ea74e1729617a3a86f600 RTC:130216 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34958 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
* WOF: Function to calculate the desired VFRT Mainstore addressAndres Lugo-Reyes2017-02-015-7/+363
| | | | | | | | | | | | Function also copies VFRT from Mainstore to SRAM and then sends the WOF VFRT IPC command to the PGPE Change-Id: I94c7d4bcc9179fce3f17c1b974a12186c67547c1 RTC: 130216 Depends-on: I2249777134608d9f79bdc85692a3acbf7907c3f5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34658 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* WOF: Function to calculate the Active Quad step numberAndres Lugo-Reyes2017-02-014-5/+69
| | | | | | | | | Change-Id: I3acafe872623838fa2ad16e8c85288dddb275fb5 RTC: 130216 Depends-on: I2249777134608d9f79bdc85692a3acbf7907c3f5 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34657 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com>
* WOF: Function to calculate VDD/VDN step numberAndres Lugo-Reyes2017-02-018-21/+345
| | | | | | | | | | | | | | | 1. Calculate VDN/VDD step number 2. Extract the WOF header address from the PGPE header 3. Save important data from WOF header into global struct 4. Create global pointer struct to save important addresses to a pinned location in memory. Change-Id: I2249777134608d9f79bdc85692a3acbf7907c3f5 RTC:130216 Depends-on: Ic323321b8c66945732a6b7345ad85d6f41a62edd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34300 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Modify two generic pgpe RCs making them uniqueWael El-Essawy2017-01-312-17/+19
| | | | | | | | | | to avoid firestation failure Change-Id: I90ab849b64f3dfaf732562ca91b29ff6d292f9f3 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35524 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Add VR Fan and OC support via AVSBUSChris Cain2017-01-2722-389/+619
| | | | | | | | | | | | | | | - monitor VR Fan (over-temperature) and OC (over-current) - add VR Fan sensor to poll response (Temperature FRU type: VRM) - log mfg error for OC - add error history counters for each Change-Id: Ia552aa2cc2db8adebcbbd928c146a057bb120c73 RTC: 132561 RTC: 132560 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35358 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Pstates Support in OCCWael El-Essawy2017-01-2731-468/+1843
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. Initialize Pstates global parameters (G_proc_fmax, G_proc_fmin, G_khz_per_pstate and G_proc_pmin from the OCC Pstate Parameter Block) 2. When frequency config data packet is received and OCC is NOT already in Active state: Send IPC command to PGPE to set pState clips to be wide open from min frequency to turbo First verify min/max frequency from TMGT is within what PGPE allows saved in G_proc_fmax and G_proc_fmin if not within bounds trace and clip to G_proc_fmax/fmin) 3. Transition to active state: Send IPC command to PGPE to start pState protocol (give correct data for OCC vs OPAL in control of Pstates) and if OPAL system update OPAL shared memory with Pstate information. 4. amec_slv_freq_smh(): Send IPC command to PGPE to set requested pState (PowerVM) or set clips (OPAL). 5. Address all the TODO/TEMP/#if 0 in amec_freq.c either remove or add RTC# for when it will be addressed Change-Id: Ic323321b8c66945732a6b7345ad85d6f41a62edd RTC: 130201 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33704 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Change weighted core temp to only use one quad DTSmbroyles2017-01-201-8/+20
| | | | | | | | | | | Change-Id: Ifeba5fd584423268bc4752b4c78aabbb40eb3ed1 RTC: 165540 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35106 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* AVS Bus divider, loadline and misc changesChris Cain2017-01-1815-156/+497
| | | | | | | | | | | | | | | - validate CRC in cmd response - read current / voltage on alternating ticks (commands on both bus for each tick) - calculate chip power (with loadline) and power for each tick - update divider value for bus speed - add error history counters and add them to logs Change-Id: I33bce916dc2dffef6a6d616633a5f1266d7baa7e RTC: 163992 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34947 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Initial Wof commitAndres Lugo-Reyes2017-01-068-5/+119
| | | | | | | | | | | Contains initial WOF directory structure Change-Id: I24ec77ca11dc711ff44c0b378f64d96696838ee1 RTC:130216 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34298 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Support for MMU-less systemsWilliam Bryan2016-12-224-13/+92
| | | | | | | | | Change-Id: I33c0b56ce599f512fa686275ba483092897cc5af RTC:165351 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33743 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* GPE IVPRs, disable OCC HW error and simics IOWilliam Bryan2016-12-212-17/+34
| | | | | | | | | | Change-Id: If9688f8dcbd44ab9a5658557ffe4a1b84a2fb1fe RTC:165351 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33745 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Prevent compiler optimization for struct to ensure 256-byte sizeAndres Lugo-Reyes2016-12-161-2/+2
| | | | | | | Change-Id: I55b6e59546710a537b65b8fb88ffb1739bccf560 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/34008 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* dcom/ thread/ rtls/ TODO clean upAndres Lugo-Reyes2016-12-1528-148/+83
| | | | | | | | | | | | | Also moved files common to occ_405/, occ_gpe0/, occ_gpe1/, etc, to a new common directory to keep src/ clean Change-Id: Ib45d70d048a135832592953c955a325d20fa19ae RTC: 163363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33640 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* command handler cleanup and reset prep supportmbroyles2016-12-159-125/+75
| | | | | | | | | | | | Support power off option on reset prep command RTC: 163360 Change-Id: I433584308773d4a5d2c6543514d880ce7e10c6ad Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33796 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* FFDC parsing toolWilliam Bryan2016-12-152-0/+408
| | | | | | | | | Change-Id: Iada745ba30af2b4d6160770b2e2fc82c15b5d523 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33746 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Update DIMM i2c divisor to increase clock rateChris Cain2016-12-121-1/+4
| | | | | | | | | | | | | | | In legacy mode, a divisor of 0x0049 will give approx freq of 391kHZ This value will allow margin for clock variation. For reference: 0x0177 is approx 77kHz 0x0048 is approx 396kHz 0x0049 is approx 391kHz Change-Id: I7ff68f414f5afff8ca6d96f51c0b2f25eeb0841f Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33694 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* pstates_common header file updatembroyles2016-11-181-0/+55
| | | | | | | | | Change-Id: If1af3bfa4c72ca63f31e4d0edc483cf7bdc51c77 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32826 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* OCC-OPAL Shared Memory Interface: Dynamic data updatesWael El-Essawy2016-11-1710-167/+373
| | | | | | | | | | | | | | | | | | | | | | | | | | | update the following in OPAL shared memory when any of these pieces change: * OCC State * CPU Throttle status * memory throttle status * quick power drop * power shifting ratio * power cap type * Min power cap * Max power cap * current power cap *** When either throttle status bytes change alert OPAL of shared memory interface change via setting SCOM bits 3 in the ext_intr_reason field of OCC Misc register and bit 0 (core_ext_intr) to generate the interrupt. Change-Id: Ic88a38aba4b84fb247389e712da2e326c2cd9c53 RTC: 130202 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32688 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Open linear window for SRAM access on OCB channel 2 for secure modeChris Cain2016-11-168-28/+36
| | | | | | | | | | | | Also enabled call home logs and some debug commands Change-Id: Ieac936fd1b259b0165e54ab98e05899e0d2b6912 CQ: SW371042 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32602 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Header files for PGPE IPC supportmbroyles2016-11-117-6/+786
| | | | | | | | | Change-Id: I9073d1bc30917495cdfdce33d6ab6d9f79e4745a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32496 Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Fix occcSrcParse failureChris Cain2016-11-101-1/+1
| | | | | | | | | | Change-Id: Ic40a561b3f10e9bf59d7c71860704654add75a2c RTC: 137620 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32474 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Sheldon R. Bailey <baileysh@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Code updates for AVS Bus data collectionChris Cain2016-11-0923-457/+907
| | | | | | | | | | | | | | | | - add support for reading voltage/current from AVS Bus on Vdd and Vdn rails (on alternating ticks) - remove overcurrent code - remove voltage uplift code - other minor cleanup RTC: 137620 Change-Id: I774a2421059ab3684e3b790938429e9e77ae2b76 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31923 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Implement task_poke_watchdogsWael El-Essawy2016-11-0315-76/+702
| | | | | | | | | | | | | | | | | | | | | | | | | | task_poke_watchdogs() should be called every 2ms (ticks 1 and 9) on both master and slaves while in observation and active state and do the following: 1. Every time called: Enable/Reset the OCC heartbeat: done by a write to OCB OCC Heartbeat Register (set count to 8ms) 2. Every time called: Reset memory deadman timer for 1 MCA (skip if not present and just wait until next call to check next MCA to keep same timing of reset per MCA regardless of # present) Resetting the deadman is done by reading one of the memory performance counters, use one at SCOM offset 0x13C. NOTE: Will take 16ms (8 MCAs x 2ms) to reset all memory timers, this is fine since the shortest time the deadman timeout can be configured to is 28ms 3. Every 4ms (on tick 1 only) : Verify PGPE is still functional by reading PGPE Beacon from SRAM if after 8ms (2 consecutive checks) there is no change to the PGPE Beacon count then log an error and request reset. In addition, this commit adds entries for the PGPE image header and shared SRAM in the TLB, and partially reads PGPE image header parameters. Change-Id: I9906102b3349506612d55c57e9f5c28441eaeb39 RTC: 154960 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31916 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Update SSX/PK time intervalsWilliam Bryan2016-11-024-11/+6
| | | | | | | | | | | RTC:163333 Change-Id: Ide9c51be81fa1e2bb076700203dbeb0b3f341e87 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32134 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Sensor updates for AVS Bus data collectionChris Cain2016-10-277-32/+51
| | | | | | | | | | | RTC: 137620 Change-Id: I2e394fdff7672c0a76c78c5d0f7f57885f1c5cfd Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31757 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Fix call home data for IPS on 4S systemsWilliam Bryan2016-10-251-1/+1
| | | | | | | | | | CQ:SW369415 Change-Id: If04d3bbfb5992dfa4f3314266f2886bcb65706f6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31674 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Changes for GCC 4.9 and OPWilliam Bryan2016-10-2419-89/+80
| | | | | | | | Change-Id: I95ddff4b290fcf3eab617a674afc489698c78a1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31563 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Prevent flood of errors on APSS failureChris Cain2016-10-241-36/+40
| | | | | | | | | Change-Id: Ifd7741e863168584edadb7136aa90e4ec8227997 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31651 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
* Support new APSS Function IDsmbroyles2016-10-2011-216/+103
| | | | | | | | | | | RTC: 162291 Change-Id: I979615313a9c5e860fa570736e0ce598b978f877 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31416 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Sensor List Checking & Make ImprovementsWilliam Bryan2016-10-1422-50/+225
| | | | | | | | | | Change-Id: Id75021aeeb75c8d63b85e8a80bf09646b8bcf215 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30752 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* OCC Active state changes required for SimicsChris Cain2016-10-1414-203/+335
| | | | | | | | | Change-Id: Ic6e65bcddaefd5213042707feffcf1272133e532 RTC: 161266 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/31190 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Use HOMER Init DataWael El-Essawy2016-10-113-112/+55
| | | | | | | | | | | | | Enable reading and usage of HOMER init data. i.e. nest frequency, attention type... Change-Id: Ic9e0bc47fc110983e7e995191eda1ed6578a1ae8 RTC: 145754 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30674 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Save Core & Quad DTS AvgsWilliam Bryan2016-10-1118-222/+342
| | | | | | | | | | Change-Id: I7c57c072f4f84f02ce7bbc5f95c80a4901d6c9a2 RTC:160341 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30180 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* SSX Runtime Environment CheckWilliam Bryan2016-10-118-22/+65
| | | | | | | | | | | RTC: 139829 Change-Id: Ic43ab936fd9d9b0d41270bbea50cd3969d9f8432 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30063 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Move LICENSE and README to top levelWilliam Bryan2016-10-062-0/+0
| | | | | | | | Change-Id: I4d31e04a165b3f661fff85e51654f3271f00a9be Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30682 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Fix Centaur Control Module IDWael El-Essawy2016-10-052-2/+3
| | | | | | | | | | | Even though the code is commented out, it has to be fixed to pass the firestation test. Change-Id: I6ed3829cb8ae0a329f9e4d78d6c7aba9cd69a71d Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30737 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Implement Current Mode and Idle State in the Poll ResponseWael El-Essawy2016-10-041-1/+6
| | | | | | | | | | Change-Id: Ib2197e2197fae41455b4a8c39861eb891e1f0838 RTC: 161994 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30632 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Enable APSS Composite ModeWilliam Bryan2016-09-306-74/+51
| | | | | | | | | | RTC:132559 Change-Id: Id66a6ee7083031f0a6a3364f4f01bdc9886ca638 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29070 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Sync HW SSX with OCC FW SSXWilliam Bryan2016-09-298-137/+150
| | | | | | | | Change-Id: I2d416da654566747f40df3bed0e122919fc514e7 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29592 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Collect Nest DTS AverageWilliam Bryan2016-09-2922-49/+294
| | | | | | | | | | RTC:133842 Change-Id: I565a6f2e848652b7eddd3b319f9c3a411913074a Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29804 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
* Enable power capping and oversubscription. RTC:137621 RTC:133156mbroyles2016-09-2923-403/+319
| | | | | | | | Change-Id: I98b745ccb56d89d066508d4195250b1bf446dbc6 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29898 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
* Enable FW Timing SensorsWael El-Essawy2016-09-2311-68/+158
| | | | | | | | | | | Enable scheduling of the GPE NOP task to do GPE timings and verify all sensors being updated in amec_update_fw_sensors() are being populated correctly. Change-Id: I623dd7518be9a8736e601c7d2fa748097a4d773a RTC: 141299 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29849 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
* Update extended RC to 2 bytesWilliam Bryan2016-09-234-99/+101
| | | | | | | | | RTC: 148702 Change-Id: I4e0c7486333a17009061c52c42bb1c96367879ae Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29331 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
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