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-rw-r--r--src/occ_405/firdata/ast_mboxdd.c63
-rw-r--r--src/occ_405/firdata/ast_mboxdd.h16
-rw-r--r--src/occ_405/firdata/lpc.c297
-rw-r--r--src/occ_405/firdata/lpc.h12
-rw-r--r--src/occ_405/firdata/native.h1
-rw-r--r--src/occ_405/firdata/nor_micron.c73
-rw-r--r--src/occ_405/firdata/pnor_mboxdd.c129
-rw-r--r--src/occ_405/firdata/pnor_util.c33
-rw-r--r--src/occ_405/firdata/sbe_fifo.c22
-rw-r--r--src/occ_405/firdata/scom_util.c5
-rwxr-xr-xsrc/occ_405/main.c10
-rw-r--r--src/occ_405/occLinkInputFile4
-rw-r--r--src/occ_405/topfiles.mk11
13 files changed, 348 insertions, 328 deletions
diff --git a/src/occ_405/firdata/ast_mboxdd.c b/src/occ_405/firdata/ast_mboxdd.c
index 4541a76..064bcca 100644
--- a/src/occ_405/firdata/ast_mboxdd.c
+++ b/src/occ_405/firdata/ast_mboxdd.c
@@ -35,20 +35,6 @@
#include <norflash.h>
#include <ast_mboxdd.h>
#include <lpc.h>
-extern int TRACE_LPC;
-int TRACE_MBOX = 0;
-
-/*****************************************************************************/
-/* C o n s t a n t s */
-/*****************************************************************************/
-
-/*****************************************************************************/
-/* G l o b a l s */
-/*****************************************************************************/
-
-/*****************************************************************************/
-/* M e t h o d s */
-/*****************************************************************************/
errorHndl_t writeRegSIO(uint8_t i_regAddr, uint8_t i_data)
{
@@ -110,7 +96,7 @@ errorHndl_t mboxOut(uint64_t i_addr, uint8_t i_byte)
errorHndl_t mboxIn(uint64_t i_addr, uint8_t *o_byte)
{
- size_t len = sizeof(o_byte);
+ size_t len = sizeof(uint8_t);
return lpc_read( LPC_TRANS_IO,
i_addr + MBOX_IO_BASE,
@@ -120,15 +106,13 @@ errorHndl_t mboxIn(uint64_t i_addr, uint8_t *o_byte)
errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
{
- uint8_t* l_data = ((uint8_t*)((char*)&io_msg));
+ uint8_t* l_data = (uint8_t*)io_msg;
errorHndl_t l_err = NO_ERROR;
uint8_t l_stat1;
- uint8_t l_flags;
uint32_t l_loops = 0;
bool l_prot_error = false;
int i;
- TRAC_INFO( "doMessage(0x%02x)", io_msg->iv_cmd );
io_msg->iv_seq = io_mbox->iv_mboxMsgSeq++;
do
@@ -160,8 +144,6 @@ errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
break;
}
- TRAC_INFO( "Command sent, waiting for response...");
-
/* Wait for response */
while ( l_loops++ < MBOX_MAX_RESP_WAIT_US && !l_err )
{
@@ -169,13 +151,7 @@ errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
if ( l_err )
{
- break;
- }
-
- l_err = mboxIn(MBOX_FLAG_REG, &l_flags);
-
- if ( l_err )
- {
+ TRAC_ERR("doMessage error from MBOX_STATUS_1");
break;
}
@@ -183,29 +159,26 @@ errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
{
break;
}
-
sleep(1000);
}
if ( l_err )
{
- TRAC_INFO( "Got error waiting for response !");
+ TRAC_ERR( "Got error waiting for response !");
break;
}
if ( !(l_stat1 & MBOX_STATUS1_RESP) )
{
- TRAC_INFO( "Timeout waiting for response !");
+ TRAC_ERR( "Timeout waiting for response !");
// Don't try to interrupt the BMC anymore
l_err = mboxOut(MBOX_HOST_CTRL, 0);
-
if ( l_err)
{
//Note the command failed
- TRAC_INFO( "Error communicating with MBOX daemon");
- TRAC_INFO( "Mbox status 1 reg: %x", l_stat1);
- TRAC_INFO( "Mbox flag reg: %x", l_flags);
+ TRAC_ERR( "Error communicating with MBOX daemon");
+ TRAC_ERR( "Mbox status 1 reg: %x", l_stat1);
}
// Tell the code below that we generated the error
@@ -216,10 +189,9 @@ errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
/* Clear status */
l_err = mboxOut(MBOX_STATUS_1, MBOX_STATUS1_RESP);
-
if (l_err)
{
- TRAC_INFO( "Got error clearing status");
+ TRAC_ERR( "Got error clearing status");
break;
}
@@ -228,8 +200,6 @@ errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
uint8_t old_seq = io_msg->iv_seq;
// Read response
- TRAC_INFO( "Reading response data...");
-
for (i = 0; i < BMC_MBOX_DATA_REGS && !l_err; i++)
{
l_err = mboxIn(i, &l_data[i]);
@@ -237,27 +207,21 @@ errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
if ( l_err )
{
- TRAC_INFO( "Got error reading response !");
+ TRAC_ERR( "Got error reading response !");
break;
}
- TRAC_INFO( "Message: cmd:%02x seq:%02x a:%02x %02x %02x %02x %02x..resp:%02x",
- io_msg->iv_cmd, io_msg->iv_seq, io_msg->iv_args[0],
- io_msg->iv_args[1], io_msg->iv_args[2], io_msg->iv_args[3],
- io_msg->iv_args[4], io_msg->iv_resp);
-
if (old_seq != io_msg->iv_seq)
{
- TRAC_INFO( "bad sequence number in mbox message, got %d want %d",
+ TRAC_ERR( "bad sequence number in mbox message, got %d want %d",
io_msg->iv_seq, old_seq);
-
l_err = -1;
break;
}
if (io_msg->iv_resp != MBOX_R_SUCCESS)
{
- TRAC_INFO( "BMC mbox command failed with err %d",
+ TRAC_ERR( "BMC mbox command failed with err %d",
io_msg->iv_resp);
l_err = -1;
// Tell code below that we generated the error (not an LPC error)
@@ -271,10 +235,9 @@ errorHndl_t doMessage( astMbox_t *io_mbox, mboxMessage_t *io_msg )
// If we got an LPC error, commit it and generate our own
if ( l_err && !l_prot_error )
{
+ l_err = -1;
}
- TRAC_INFO( "doMessage() resp=0x%02x",
- io_msg->iv_resp );
return l_err;
}
@@ -282,8 +245,6 @@ errorHndl_t initializeMbox(void)
{
errorHndl_t l_errl = NO_ERROR;
- TRAC_INFO("initializeMBOX()");
-
do
{
size_t reg_size = sizeof(uint8_t);
diff --git a/src/occ_405/firdata/ast_mboxdd.h b/src/occ_405/firdata/ast_mboxdd.h
index a9a8f5e..64ea40a 100644
--- a/src/occ_405/firdata/ast_mboxdd.h
+++ b/src/occ_405/firdata/ast_mboxdd.h
@@ -116,7 +116,7 @@ errorHndl_t readRegSIO(uint8_t i_regAddr,
*
* @return data requested
*/
-inline uint8_t get8( mboxMessage_t *i_msg, uint8_t i_index)
+static inline uint8_t get8( mboxMessage_t *i_msg, uint8_t i_index)
{
if ( i_index >= BMC_MBOX_ARGS_REGS )
{
@@ -133,7 +133,7 @@ inline uint8_t get8( mboxMessage_t *i_msg, uint8_t i_index)
* @param[in] i_index: Index into args section to be written to
* @param[in] i_value: data to be written
*/
-inline void put8( mboxMessage_t *i_msg, uint8_t i_index, uint8_t i_value )
+static inline void put8(mboxMessage_t *i_msg, uint8_t i_index, uint8_t i_value)
{
if ( i_index >= BMC_MBOX_ARGS_REGS )
{
@@ -150,7 +150,7 @@ inline void put8( mboxMessage_t *i_msg, uint8_t i_index, uint8_t i_value )
*
* @return data requested
*/
-inline uint16_t get16( mboxMessage_t *i_msg, uint8_t i_index )
+static inline uint16_t get16( mboxMessage_t *i_msg, uint8_t i_index )
{
if ( i_index >= (BMC_MBOX_ARGS_REGS-1) )
{
@@ -167,7 +167,9 @@ inline uint16_t get16( mboxMessage_t *i_msg, uint8_t i_index )
* @param[in] i_index: Index into args section to be written to
* @param[in] i_value: data to be written
*/
-inline void put16( mboxMessage_t *i_msg, uint8_t i_index, uint16_t i_value )
+static inline void put16(mboxMessage_t *i_msg,
+ uint8_t i_index,
+ uint16_t i_value)
{
if ( i_index >= (BMC_MBOX_ARGS_REGS-1) )
{
@@ -186,7 +188,7 @@ inline void put16( mboxMessage_t *i_msg, uint8_t i_index, uint16_t i_value )
*
* @return data requested
*/
-inline uint32_t get32( mboxMessage_t *i_msg, uint8_t i_index )
+static inline uint32_t get32( mboxMessage_t *i_msg, uint8_t i_index )
{
if ( i_index >= (BMC_MBOX_ARGS_REGS-3) )
{
@@ -205,7 +207,9 @@ inline uint32_t get32( mboxMessage_t *i_msg, uint8_t i_index )
* @param[in] i_msg: mboxMessage_t pointer to access args section
* @param[in] i_index: Index into args section to be read from
*/
-inline void put32( mboxMessage_t *i_msg, uint8_t i_index, uint32_t i_value )
+static inline void put32(mboxMessage_t *i_msg,
+ uint8_t i_index,
+ uint32_t i_value)
{
if ( i_index >= (BMC_MBOX_ARGS_REGS-3) )
{
diff --git a/src/occ_405/firdata/lpc.c b/src/occ_405/firdata/lpc.c
index fe69efc..ffe2b48 100644
--- a/src/occ_405/firdata/lpc.c
+++ b/src/occ_405/firdata/lpc.c
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/occ/firdata/lpc.C $ */
+/* $Source: src/occ_405/firdata/lpc.c $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -26,14 +26,19 @@
#include <native.h>
#include <lpc.h>
#include <trac_interface.h>
+#include <scom_util.h>
#define LPCHC_FW_SPACE 0xF0000000 /**< LPC Host Controller FW Space */
#define LPCHC_MEM_SPACE 0xE0000000 /**< LPC Host Controller Mem Space */
#define LPCHC_IO_SPACE 0xD0010000 /**< LPC Host Controller I/O Space */
#define LPCHC_REG_SPACE 0xC0012000 /**< LPC Host Ctlr Register Space */
-
#define ECCB_NON_FW_RESET_REG 0x000B0001 /**< ECCB Reset Reg (non-FW) */
+#define LPC_BASE_REG 0x00090040 /**< LPC Base Address Register */
+#define LPC_CMD_REG 0x00090041 /**< LPC Command Register */
+#define LPC_DATA_REG 0x00090042 /**< LPC Data Register */
+#define LPC_STATUS_REG 0x00090043 /**< LPC Status Register */
+
#define ECCB_CTL_REG 0x000B0020 /**< ECCB Control Reg (FW) */
#define ECCB_RESET_REG 0x000B0021 /**< ECCB Reset Reg (FW) */
#define ECCB_STAT_REG 0x000B0022 /**< ECCB Status Reg (FW) */
@@ -43,8 +48,8 @@
1101.0100.0000.000x.0000.0001.0000.0000.<address> */
#define ECCB_CTL_REG_DEFAULT 0xD400010000000000
-/* Error bits: 41-43 56 (52cmd complete) (not 57: only non-fw use) */
-#define ECCB_STAT_REG_ERROR_MASK 0x0000000000700080 /**< Error Bits */
+/* Error bits: wh_todo comments here */
+#define LPC_STAT_REG_ERROR_MASK 0x0000000000000000 /**< Error Bits */ //wh_todo correctly set mask
/**< OPB LPCM Sync FIR Reg - used to read the FIR*/
#define OPB_LPCM_FIR_REG 0x01010C00
@@ -63,67 +68,65 @@
#define ECCB_RESET_LPC_FAST_RESET (1ULL << 62) /**< bit 1 Fast reset */
-#define ECCB_POLL_TIME_NS 400000 /**< max time should be 400ms */
-//dc99 #define ECCB_POLL_INCR_NS 10 /**< minimum increment during poll */
-#define ECCB_POLL_INCR_NS 100000 /**< increase for testing */
+#define LPC_POLL_TIME_NS 400000 /**< max time should be 400ms */
+#define LPC_POLL_INCR_NS 100000 /**< increase for testing */
#define LPCHC_SYNC_CYCLE_COUNTER_INFINITE 0xFF000000
-int TRACE_LPC = 0;
-#define TRACZCOMP(args...) if(TRACE_LPC){TRACFCOMP(args);}
+/**
+ * @brief LPC Base Register Layout
+*/
+typedef union
+{
+
+ uint64_t data64;
-/* Set to enable LPC tracing. */
-/* #define LPC_TRACING 1 */
-#ifdef LPC_TRACING
-#define LPC_TRACFCOMP(des,printf_string,args...) \
- TRACFCOMP(des,printf_string,##args) /* FIX FIRDATA */
-#else
-#define LPC_TRACFCOMP(args...)
-#endif
+ struct
+ {
+ /* unused sections should be set to zero */
+ uint64_t unused0 : 8; /**< 0:7 */
+ uint64_t base_addr : 24; /**< 8:31 */
+ uint64_t unused1 : 31; /**< 32:62 */
+ uint64_t disable : 1; /**< 63 */
+ };
+} BaseReg_t;
/**
- * @brief ECCB Control Register Layout
+ * @brief LPC Control Register Layout
*/
typedef union
{
+
uint64_t data64;
+
struct
{
/* unused sections should be set to zero */
- uint64_t magic1 : 4; /**< 0:3 = b1101 per spec */
- uint64_t data_len : 4; /**< 4:7 = b0100 means 4 byte */
- uint64_t unused1 : 7; /**< 8:14 */
- uint64_t read_op : 1; /**< 15 = set for read operation */
- uint64_t unused2 : 7; /**< 16:22 */
- uint64_t addr_len : 3; /**< 23:25 = b100 means 4 byte */
- uint64_t unused3 : 6; /**< 26:31 */
- uint64_t address : 32; /**< 32:63 = LPC Address */
+ // rnw == read not write
+ uint64_t rnw : 1; /**< 0 = Setting to 1 causes read */
+ uint64_t unused0 : 4; /**< 1:4 */
+ uint64_t size : 7; /**< 5:11 */
+ uint64_t unused1 : 20; /**< 12:31 */
+ uint64_t address : 32; /**< 32:63 = LPC Address */
};
-} ControlReg_t;
+} CommandReg_t;
/**
- * @brief ECCB Status Register Layout
+ * @brief LPC Status Register Layout
*/
typedef union
{
uint64_t data64;
struct
{
- uint64_t unused : 6; /**< 0:5 */
- uint64_t read_data : 32; /**< 6:37 */
- uint64_t unused1 : 3; /**< 38:40 */
- uint64_t eccb_err : 3; /**< 41:43 = ECCB_Error_Info */
- uint64_t busy : 1; /**< 44 = Operation Busy */
- uint64_t unused2 : 7; /**< 45:51 */
- uint64_t op_done : 1; /**< 52 = Command Complete */
- uint64_t unused3 : 3; /**< 53:55 */
- uint64_t addr_parity_err : 1; /**< 56 = ECC Address Register
- Parity Error */
- uint64_t unused4 : 7; /**< 57:63 */
+ uint64_t op_done : 1; /**< 0 */
+ uint64_t unused0 : 9; /**< 1:9 */
+ uint64_t opb_valid : 1; /**< 10 */
+ uint64_t opb_ack : 1; /**< 11 */
+ uint64_t unused1 : 52; /**< 12:63 */
};
} StatusReg_t;
-
uint32_t checkAddr(LpcTransType i_type,
uint32_t i_addr)
{
@@ -141,8 +144,8 @@ uint32_t checkAddr(LpcTransType i_type,
}
-errorHndl_t pollComplete(const ControlReg_t* i_ctrl,
- StatusReg_t* o_stat)
+errorHndl_t pollComplete(CommandReg_t* i_ctrl,
+ StatusReg_t* o_stat)
{
errorHndl_t l_err = NO_ERROR;
@@ -151,11 +154,11 @@ errorHndl_t pollComplete(const ControlReg_t* i_ctrl,
uint64_t loop = 0;
do
{
- xscom_read( ECCB_STAT_REG, &(o_stat->data64) );
- LPC_TRACFCOMP( "writeLPC> Poll on ECCB Status, "
- "poll_time=0x%.16x, stat=0x%.16x",
- poll_time,
- o_stat->data64 );
+ SCOM_Trgt_t l_target;
+ l_target.type = TRGT_PROC;
+ l_target.isMaster = TRUE;
+ l_err = SCOM_getScom(l_target, LPC_STATUS_REG, &(o_stat->data64));
+
if( l_err )
{
break;
@@ -166,19 +169,19 @@ errorHndl_t pollComplete(const ControlReg_t* i_ctrl,
break;
}
- /* want to start out incrementing by small numbers then get bigger
+ /* Want to start out incrementing by small numbers then get bigger
to avoid a really tight loop in an error case so we'll increase
the wait each time through */
- sleep( ECCB_POLL_INCR_NS*(++loop) );
- poll_time += ECCB_POLL_INCR_NS * loop;
- } while ( poll_time < ECCB_POLL_TIME_NS );
+ sleep( LPC_POLL_INCR_NS*(++loop) );
+ poll_time += LPC_POLL_INCR_NS * loop;
+ } while ( poll_time < LPC_POLL_TIME_NS );
/* Check for hw errors or timeout if no previous logs */
if( (l_err == NO_ERROR) &&
- ((o_stat->data64 & ECCB_STAT_REG_ERROR_MASK)
+ ((o_stat->data64 & LPC_STAT_REG_ERROR_MASK)
|| (!o_stat->op_done)) )
{
- TRACFCOMP( "LpcDD::pollComplete> LPC error or timeout: addr=0x%.8X, status=0x%.8X%.8X",
+ TRAC_ERR( "LpcDD::pollComplete> LPC error or timeout: addr=0x%.8X, status=0x%.8X%.8X",
i_ctrl->address, (uint32_t)(o_stat->data64>>32), (uint32_t)o_stat->data64 );
l_err = -1;
break;
@@ -186,6 +189,7 @@ errorHndl_t pollComplete(const ControlReg_t* i_ctrl,
} while(0);
return l_err;
+
}
@@ -197,7 +201,10 @@ errorHndl_t lpc_read( LpcTransType i_type,
size_t i_size )
{
errorHndl_t l_err = NO_ERROR;
- uint32_t l_addr = 0;
+ int32_t l_addr = 0;
+ uint64_t l_ret;
+ uint32_t l_shift_amount;
+ uint64_t l_temp_data;
do {
if( o_data == NULL )
@@ -207,40 +214,85 @@ errorHndl_t lpc_read( LpcTransType i_type,
break;
}
+
/* Generate the full absolute LPC address */
l_addr = checkAddr( i_type, i_addr );
- /* Execute command. */
- ControlReg_t eccb_cmd;
- eccb_cmd.data64 = ECCB_CTL_REG_DEFAULT;
- eccb_cmd.data_len = i_size;
- eccb_cmd.read_op = 1;
- eccb_cmd.addr_len = sizeof(l_addr);
- eccb_cmd.address = l_addr;
- xscom_write( ECCB_CTL_REG, eccb_cmd.data64 );
+ /* Setup command */
+ CommandReg_t lpc_cmd;
+ lpc_cmd.rnw = 1; //Indicate read not write
+ lpc_cmd.size = i_size;
+ lpc_cmd.address = l_addr;
+
+ /* Execute command via Scom */
+ SCOM_Trgt_t l_target;
+ l_target.type = TRGT_PROC;
+ l_target.isMaster = TRUE;
+
+ //First write the address we want to read from in the
+ //LPC_CMD_REG scom address
+ l_err = SCOM_putScom(l_target, LPC_CMD_REG, lpc_cmd.data64);
+ if(l_err != SUCCESS)
+ {
+ TRAC_ERR("lpc_read: SCOM_putScom failed to write to LPC_CMD_REG command rc=0x%08x",
+ (uint32_t)l_err);
+ break;
+ }
/* Poll for completion */
- StatusReg_t eccb_stat;
- l_err = pollComplete( &eccb_cmd, &eccb_stat );
+ StatusReg_t lpc_status;
+ l_err = pollComplete( &lpc_cmd, &lpc_status );
if( l_err ) { break; }
- /* Copy data out to caller's buffer. */
- if( i_size <= sizeof(uint32_t) )
+ // Read data from the LPC_DATA_REG
+ l_err = SCOM_getScom(l_target, LPC_DATA_REG, &l_ret);
+ if(l_err != SUCCESS)
+ {
+ TRAC_ERR("lpc_read: SCOM_getScom failed rc=0x%08x", (uint32_t)l_err);
+ break;
+ }
+
+ //The scom returns the data in the byte offset represented by last
+ //3 bits of the address. For example, addr 0x21 will have have data
+ //starting in byte1 on value returned from scom.
+ //addr & 0x7 <-- this gives the byte offset
+ //7 - (addr & 0x7) <-- subratcing from 7 as the data is left aligned
+ //adding (size - 1) <-- to incorporate reading more than one byte
+ //multiply by 8 to convert from byte to bits
+ l_shift_amount = (7 - ((l_addr & 0x7) + (i_size-1))) * 8;
+ l_temp_data = l_ret >> l_shift_amount;
+
+ //Had some weird problems with memcpy, that's why typecasting
+ //to the size of data asked.
+ if (i_size == sizeof(uint8_t))
+ {
+ uint8_t* l_temp_ptr = (uint8_t*)(o_data);
+ *l_temp_ptr = l_temp_data;
+ }
+ else if (i_size == sizeof(uint16_t))
+ {
+ uint16_t* l_temp_ptr = (uint16_t*)(o_data);
+ *l_temp_ptr = l_temp_data;
+ }
+ else if (i_size == sizeof(uint32_t))
+ {
+ uint32_t* l_temp_ptr = (uint32_t*)(o_data);
+ *l_temp_ptr = l_temp_data;
+ }
+ else if (i_size == sizeof(uint64_t))
{
- uint32_t tmpbuf = eccb_stat.read_data;
- memcpy( o_data, &tmpbuf, i_size );
+ uint64_t* l_temp_ptr = (uint64_t*)(o_data);
+ *l_temp_ptr = l_temp_data;
}
else
{
- TRACFCOMP( "readLPC> Unsupported buffer size : %d", i_size );
+ TRAC_ERR("lpc_read: unsupported size length");
l_err = -1;
break;
}
} while(0);
- LPC_TRACFCOMP( "readLPC> %08X[%d] = %08X", l_addr, i_size, *reinterpret_cast<uint32_t*>( o_data ) >> (8 * (4 - i_size)) );
-
return l_err;
}
@@ -251,51 +303,88 @@ errorHndl_t lpc_write( LpcTransType i_type,
{
errorHndl_t l_err = NO_ERROR;
uint32_t l_addr = 0;
+ uint64_t l_write_data = 0;
+ uint64_t l_data = 0;
+ uint32_t l_shift_amount;
do {
/* Generate the full absolute LPC address */
l_addr = checkAddr( i_type, i_addr );
- uint64_t eccb_data = 0;
- /* Left-justify user data into data register. */
- switch ( i_size )
+ /* Setup Write Command */
+ CommandReg_t lpc_cmd;
+ lpc_cmd.rnw = 0; //Indicate write
+ lpc_cmd.size = i_size;
+ lpc_cmd.address = l_addr;
+
+ /* Setup Write command via Scom */
+ SCOM_Trgt_t l_target;
+ l_target.type = TRGT_PROC;
+ l_target.isMaster = TRUE;
+
+ //First write the address we want to write to in LPC_CMD_REG
+ l_err = SCOM_putScom(l_target, LPC_CMD_REG, lpc_cmd.data64);
+ if(l_err != SUCCESS)
{
- case 1:
- eccb_data = (uint64_t)
- (*(const uint8_t*)(i_data)) << 56;
- break;
- case 2:
- eccb_data = (uint64_t)
- (*(const uint16_t*)( i_data ) ) << 48;
- break;
- case 4:
- eccb_data = (uint64_t)
- (*(const uint32_t*)( i_data ) ) << 32;
- break;
- default:
- TRACFCOMP( "writeLPC> Unsupported buffer size : %d", i_size );
- break;
+ TRAC_ERR("ERROR> lpc_write: SCOM_putScom failed to write to LPC_CMD_REG command: rc=0x%08x",
+ (uint32_t)l_err);
+ break;
}
- /* Write data out */
- TRACZCOMP("ECCB_DATA_REG=%.8X%.8X",(uint32_t)(eccb_data>>32),(uint32_t)eccb_data);
- xscom_write( ECCB_DATA_REG, eccb_data );
+ //There were some weird memcpy problems. That's why, typecasting
+ //to the size of data requested to write
+ if (i_size == sizeof(uint8_t))
+ {
+ l_write_data = (*i_data);
+ }
+ else if (i_size == sizeof(uint16_t))
+ {
+ uint16_t* l_temp_ptr = (uint16_t*)(i_data);
+ l_write_data = *l_temp_ptr;
+ }
+ else if (i_size == sizeof(uint32_t))
+ {
+ uint32_t* l_temp_ptr = (uint32_t*)(i_data);
+ l_write_data = *l_temp_ptr;
+ }
+ else if (i_size == sizeof(uint64_t))
+ {
+ uint64_t* l_temp_ptr = (uint64_t*)(i_data);
+ l_write_data = *l_temp_ptr;
+ }
+ else
+ {
+ TRAC_ERR("lpc_write: unsupported size length");
+ l_err = -1;
+ break;
+ }
- /* Execute command. */
- ControlReg_t eccb_cmd;
- eccb_cmd.data64 = ECCB_CTL_REG_DEFAULT;
- eccb_cmd.data_len = i_size;
- eccb_cmd.read_op = 0;
- eccb_cmd.addr_len = sizeof(l_addr);
- eccb_cmd.address = l_addr;
- xscom_write( ECCB_CTL_REG, eccb_cmd.data64 );
- TRACZCOMP("ECCB_CTL_REG=%.8X%.8X",(uint32_t)(eccb_cmd.data64>>32),(uint32_t)eccb_cmd.data64);
+ //The scom expects the data in the byte offset represented by last
+ //3 bits of the address. For example, addr 0x21 will have have data
+ //starting in byte1 on value returned from scom.
+ //addr & 0x7 <-- this gives the byte offset
+ //7 - (addr & 0x7) <-- subratcing from 7 as the data in the scom reg
+ //is expected to be left aligned
+ //adding (size - 1) <-- to incorporate reading more than one byte
+ //multiply by 8 to convert from byte to bits
+ l_shift_amount = (7 - ((l_addr & 0x7) + (i_size-1))) * 8;
+ l_data = (l_write_data << l_shift_amount);
+
+ //Write the value to the LPC_DATA_REG
+ l_err = SCOM_putScom(l_target, LPC_DATA_REG, l_data);
+ if(l_err != SUCCESS)
+ {
+ TRAC_ERR("ERROR> lpc_write: SCOM_putScom failed to write to LPC_DATA_REG data: rc=0x%08x",
+ (uint32_t)l_err);
+ break;
+ }
/* Poll for completion */
- StatusReg_t eccb_stat;
- l_err = pollComplete( &eccb_cmd, &eccb_stat );
+ StatusReg_t lpc_stat;
+ l_err = pollComplete( &lpc_cmd, &lpc_stat );
if( l_err ) { break; }
+
} while(0);
return l_err;
diff --git a/src/occ_405/firdata/lpc.h b/src/occ_405/firdata/lpc.h
index 11290cc..177deda 100644
--- a/src/occ_405/firdata/lpc.h
+++ b/src/occ_405/firdata/lpc.h
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/occ/firdata/lpc.H $ */
+/* $Source: src/occ_405/firdata/lpc.h $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
+/* Contributors Listed Below - COPYRIGHT 2015,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -34,8 +34,8 @@
* @brief LPC Transaction Types
*/
typedef enum {
- LPC_TRANS_IO = 1, /* LPC IO Space */
- LPC_TRANS_FW = 2, /* LPC Firmware Space */
+ LPC_TRANS_IO = 0, /* LPC IO Space */
+ LPC_TRANS_FW = 1, /* LPC Firmware Space */
} LpcTransType;
errorHndl_t lpc_read( LpcTransType i_type,
@@ -48,4 +48,8 @@ errorHndl_t lpc_write( LpcTransType i_type,
uint8_t* i_data,
size_t i_size );
+uint32_t checkAddr(LpcTransType i_type,
+ uint32_t i_addr);
+
+
#endif
diff --git a/src/occ_405/firdata/native.h b/src/occ_405/firdata/native.h
index 160668e..dd0daa7 100644
--- a/src/occ_405/firdata/native.h
+++ b/src/occ_405/firdata/native.h
@@ -76,7 +76,6 @@ typedef uint32_t errorHndl_t;
#define TERABYTE (GIGABYTE * 1024ul) /**< 1 TB */
#define PAGESIZE (4*KILOBYTE) /**< 4 KB */
-#define PAGE_SIZE PAGESIZE
#undef SUCCESS
#define SUCCESS 0
diff --git a/src/occ_405/firdata/nor_micron.c b/src/occ_405/firdata/nor_micron.c
deleted file mode 100644
index 3d0329a..0000000
--- a/src/occ_405/firdata/nor_micron.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/occ/firdata/nor_micron.C $ */
-/* */
-/* OpenPOWER OnChipController Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-#include "norflash.h"
-#include "sfc_ast2400.h"
-#include <native.h>
-
-
-
-
-/**
- * @brief Check flag status bit on Micron NOR chips
- * Some versions of Micron parts require the Flag
- * Status register be read after a write or erase operation,
- * otherwise all future operations won't work..
- */
-errorHndl_t micronFlagStatus( Sfc_t* i_sfc )
-{
- errorHndl_t l_err = NO_ERROR;
- /*TRACDCOMP( g_trac_pnor, "micronFlagStatus>" ); */
-
- do {
- /*Read Micron 'flag status' register */
- uint8_t flagstat = 0;
- l_err = sendSpiCmd( i_sfc,
- SPI_MICRON_FLAG_STAT,
- NO_ADDRESS,
- 0, NULL,
- sizeof(flagstat), &flagstat );
- if(l_err) { break; }
-
- /*TRACDCOMP(g_trac_pnor, */
- /* "micronFlagStatus> (0x%.2X)", */
- /* flagstat); */
-
- /* check for ready and no errors */
- /* bit 0 = ready, bit 2=erase fail, bit 3=Program (Write) failure */
- if( (flagstat & 0xB0) != 0x80)
- {
- /*TRACFCOMP(g_trac_pnor, "micronFlagStatus> Error or timeout from Micron Flag Status Register (0x%.2X)", flagstat); */
- l_err = -1;
- break;
- }
-
-
- }while(0);
-
- return l_err;
-
-}
-
diff --git a/src/occ_405/firdata/pnor_mboxdd.c b/src/occ_405/firdata/pnor_mboxdd.c
index 5253ccf..463e950 100644
--- a/src/occ_405/firdata/pnor_mboxdd.c
+++ b/src/occ_405/firdata/pnor_mboxdd.c
@@ -36,61 +36,79 @@
#include <norflash.h>
#include <pnor_mboxdd.h>
#include <lpc.h>
-extern int TRACE_PNOR_MBOX;
-int TRACE_PNOR_MBOX = 0;
errorHndl_t hwInit(pnorMbox_t* i_pnorMbox)
{
errorHndl_t l_err = NO_ERROR;
-
- //Current window starts closed
- i_pnorMbox->iv_curWindowOpen = false;
- i_pnorMbox->iv_mbox.iv_mboxMsgSeq = 1;
- initializeMbox();
-
- //Send message to BMC Mbox to get MBOX info
- // This message gets the MBOX protocol version
- mboxMessage_t l_getInfoMsg;
- l_getInfoMsg.iv_cmd = MBOX_C_GET_MBOX_INFO;
- put8(&l_getInfoMsg, 0, 2);
- doMessage(&i_pnorMbox->iv_mbox, &l_getInfoMsg);
- i_pnorMbox->iv_protocolVersion = get8(&l_getInfoMsg, 0);
-
- if (i_pnorMbox->iv_protocolVersion == 1)
- {
- i_pnorMbox->iv_blockShift = 12;
- i_pnorMbox->iv_readWindowSize = get16(&l_getInfoMsg, 1)
- << i_pnorMbox->iv_blockShift;
- i_pnorMbox->iv_writeWindowSize = get16(&l_getInfoMsg, 3)
- << i_pnorMbox->iv_blockShift;
- }
- else
+ uint8_t* l_data;
+ int i;
+ do
{
- i_pnorMbox->iv_blockShift = get8(&l_getInfoMsg, 5);
- }
+ //Current window starts closed
+ i_pnorMbox->iv_curWindowOpen = false;
+ i_pnorMbox->iv_mbox.iv_mboxMsgSeq = 1;
+ l_err = initializeMbox();
+ if (l_err)
+ {
+ TRAC_ERR("initializeMbox failed rc:0x%x", l_err);
+ break;
+ }
- TRAC_INFO("mboxPnor: protocolVersion=%d blockShift=%d",
- i_pnorMbox->iv_protocolVersion,
- i_pnorMbox->iv_blockShift);
+ //Send message to BMC Mbox to get MBOX info
+ // This message gets the MBOX protocol version
+ mboxMessage_t l_getInfoMsg;
+ l_data = (uint8_t*)(&l_getInfoMsg);
+ for (i = 0; i < BMC_MBOX_DATA_REGS; i++)
+ {
+ l_data[i] = 0;
+ }
- //Now get the size of the flash
- mboxMessage_t l_getSizeMsg;
- l_getSizeMsg.iv_cmd = MBOX_C_GET_FLASH_INFO;
- doMessage(&i_pnorMbox->iv_mbox, &l_getSizeMsg);
+ l_getInfoMsg.iv_cmd = MBOX_C_GET_MBOX_INFO;
+ put8(&l_getInfoMsg, 0, 2);
+ l_err = doMessage(&i_pnorMbox->iv_mbox, &l_getInfoMsg);
+ if (l_err)
+ {
+ TRAC_ERR("doMessage to ping BMC failed with rc=0x%x", l_err);
+ break;
+ }
- if (i_pnorMbox->iv_protocolVersion == 1)
- {
- i_pnorMbox->iv_flashSize = get32(&l_getSizeMsg, 0);
- i_pnorMbox->iv_flashEraseSize = get32(&l_getSizeMsg, 4);
- }
- else
- {
- i_pnorMbox->iv_flashSize = get16(&l_getSizeMsg, 0)
- << i_pnorMbox->iv_blockShift;
- i_pnorMbox->iv_flashEraseSize = get16(&l_getSizeMsg, 2)
- << i_pnorMbox->iv_blockShift;
- }
+ i_pnorMbox->iv_protocolVersion = get8(&l_getInfoMsg, 0);
+ if (i_pnorMbox->iv_protocolVersion == 1)
+ {
+ i_pnorMbox->iv_blockShift = 12;
+ i_pnorMbox->iv_readWindowSize = get16(&l_getInfoMsg, 1)
+ << i_pnorMbox->iv_blockShift;
+ i_pnorMbox->iv_writeWindowSize = get16(&l_getInfoMsg, 3)
+ << i_pnorMbox->iv_blockShift;
+ }
+ else
+ {
+ i_pnorMbox->iv_blockShift = get8(&l_getInfoMsg, 5);
+ }
+
+ //Now get the size of the flash
+ mboxMessage_t l_getSizeMsg;
+ l_getSizeMsg.iv_cmd = MBOX_C_GET_FLASH_INFO;
+ l_err = doMessage(&i_pnorMbox->iv_mbox, &l_getSizeMsg);
+ if (l_err)
+ {
+ TRAC_ERR("doMessage failed to get flash size rc=0x%x", l_err);
+ break;
+ }
+ if (i_pnorMbox->iv_protocolVersion == 1)
+ {
+ i_pnorMbox->iv_flashSize = get32(&l_getSizeMsg, 0);
+ i_pnorMbox->iv_flashEraseSize = get32(&l_getSizeMsg, 4);
+ }
+ else
+ {
+ i_pnorMbox->iv_flashSize = get16(&l_getSizeMsg, 0)
+ << i_pnorMbox->iv_blockShift;
+ i_pnorMbox->iv_flashEraseSize = get16(&l_getSizeMsg, 2)
+ << i_pnorMbox->iv_blockShift;
+ }
+ } while (0);
return l_err;
}
@@ -105,14 +123,12 @@ errorHndl_t readFlash(pnorMbox_t* i_pnorMbox,
do
{
// Ensure we are operating on a 4-byte boundary
- if (i_size % 4 != 0)
+ if ((i_size % 4 != 0) && (i_addr % 4 != 0))
{
TRAC_ERR("readFlash: not on 4-byte boundary");
return FAIL;
}
- TRAC_INFO("readFlash(i_addr=0x%.8X)> ", i_addr);
-
while (i_size)
{
uint32_t l_lpcAddr;
@@ -170,7 +186,6 @@ errorHndl_t writeFlash(pnorMbox_t* i_pnorMbox,
return FAIL;
}
- TRAC_INFO(ENTER_MRK"writeFlash(i_address=0x%llx)> ", i_addr);
errorHndl_t l_flushErr = NO_ERROR;
@@ -229,9 +244,6 @@ errorHndl_t writeFlash(pnorMbox_t* i_pnorMbox,
i_size = 0;
}
- TRAC_INFO("writeFlash(i_address=0x%llx)> i_size=%.8X",
- i_addr, i_size);
-
if(l_err)
{
break;
@@ -289,8 +301,6 @@ errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox,
* Then open the new one at the right position. The required
* alignment differs between protocol versions
*/
- TRAC_INFO("astMboxDD::adjustMboxWindow using protocol version: %d",
- i_pnorMbox->iv_protocolVersion);
if (i_pnorMbox->iv_protocolVersion == 1)
{
l_wSize = i_isWrite ? i_pnorMbox->iv_writeWindowSize
@@ -307,10 +317,6 @@ errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox,
- l_pos;
}
- TRAC_INFO("adjustMboxWindow opening %s window at 0x%08x"
- " for addr 0x%08x req_size 0x%08x",
- i_isWrite ? "write" : "read", l_pos, i_reqAddr, l_reqSize);
-
mboxMessage_t winMsg;
if (i_isWrite)
{
@@ -353,11 +359,6 @@ errorHndl_t adjustMboxWindow(pnorMbox_t* i_pnorMbox,
i_pnorMbox->iv_curWindowOpen = true;
i_pnorMbox->iv_curWindowWrite = i_isWrite;
- TRAC_INFO(" curWindowOffset = %08x", i_pnorMbox->iv_curWindowOffset);
- TRAC_INFO(" curWindowSize = %08x", i_pnorMbox->iv_curWindowSize);
- TRAC_INFO(" curWindowLpcOffset = %08x",
- i_pnorMbox->iv_curWindowLpcOffset);
-
}
while (true);
diff --git a/src/occ_405/firdata/pnor_util.c b/src/occ_405/firdata/pnor_util.c
index c7841cb..2c48179 100644
--- a/src/occ_405/firdata/pnor_util.c
+++ b/src/occ_405/firdata/pnor_util.c
@@ -58,26 +58,33 @@ int32_t pnor_write_8B( uint64_t i_data )
return FAIL;
}
+//@TODO: Do we need ECC, or does the BMC handle that for us now?
/* Create 9-byte ECC-ified version */
- uint8_t data9[9];
- injectECC( (uint8_t*)(&i_data), 8, data9 );
+// uint8_t data9[9];
+// injectECC( (uint8_t*)(&i_data), 8, data9 );
/* Copy data into the write cache until we queue up
a big chunk of data to write. This is more efficient
and avoids handling the write boundary of the PP
command internally. */
- size_t cpsz = 9;
+// size_t cpsz = 9;
+
+ uint8_t data8[8];
+ size_t cpsz = 8;
+
if( (g_write_cache_index + cpsz) > PAGE_PROGRAM_BYTES )
{
cpsz = PAGE_PROGRAM_BYTES - g_write_cache_index;
}
- memcpy( &(g_write_cache[g_write_cache_index]), data9, cpsz );
+ memcpy( &(g_write_cache[g_write_cache_index]), data8, cpsz );
+// memcpy( &(g_write_cache[g_write_cache_index]), data9, cpsz );
+
g_write_cache_index += cpsz;
/* Write a complete chunk into the flash */
if( g_write_cache_index == PAGE_PROGRAM_BYTES )
{
- errorHndl_t tmp = writeFlash( &g_pnorMbox,
+ errorHndl_t tmp = writeFlash( g_pnorMbox,
g_next_byte,
PAGE_PROGRAM_BYTES,
g_write_cache );
@@ -93,12 +100,18 @@ int32_t pnor_write_8B( uint64_t i_data )
memset( g_write_cache, 0xFF, PAGE_PROGRAM_BYTES );
g_write_cache_index = 0;
- /* Handle the overflow */
- if( (9 - cpsz) > 0 )
+ if( (8 - cpsz) > 0 )
{
- memcpy( &(g_write_cache[0]), &(data9[cpsz]), 9 - cpsz );
- g_write_cache_index = 9 - cpsz;
+ memcpy( &(g_write_cache[0]), &(data8[cpsz]), 8 - cpsz );
+ g_write_cache_index = 8 - cpsz;
}
+
+ /* Handle the overflow */
+// if( (9 - cpsz) > 0 )
+// {
+// memcpy( &(g_write_cache[0]), &(data9[cpsz]), 9 - cpsz );
+// g_write_cache_index = 9 - cpsz;
+// }
}
return rc;
@@ -120,7 +133,7 @@ errorHndl_t pnor_prep( HOMER_PnorInfo_t* i_pnorInfo )
memset( g_write_cache, 0xFF, PAGE_PROGRAM_BYTES );
/* Can we rely on skiboot leaving things in a good state? */
- l_err = hwInit(&g_pnorMbox);
+ l_err = hwInit(g_pnorMbox);
if( l_err )
{
TRACFCOMP("hwInit failed");
diff --git a/src/occ_405/firdata/sbe_fifo.c b/src/occ_405/firdata/sbe_fifo.c
index b3316ce..9a2099a 100644
--- a/src/occ_405/firdata/sbe_fifo.c
+++ b/src/occ_405/firdata/sbe_fifo.c
@@ -100,7 +100,7 @@ uint32_t waitDnFifoReady(SCOM_Trgt_t* i_target, uint32_t* o_status)
}
else
{
- TRAC_INFO("SBE status reg returned fifo empty or dequeued eot flag 0x%.8X",
+ TRAC_IMP("SBE status reg returned fifo empty or dequeued eot flag 0x%.8X",
*o_status);
}
@@ -130,7 +130,7 @@ uint32_t writeRequest(SCOM_Trgt_t* i_target, uint32_t* i_fifoRequest)
{
uint32_t l_rc = SUCCESS;
- TRAC_INFO("Enter writeRequest");
+ TRAC_IMP("Enter writeRequest");
// Ensure Downstream Max Transfer Counter is 0 non-0 can cause
// protocol issues)
@@ -186,7 +186,7 @@ uint32_t writeRequest(SCOM_Trgt_t* i_target, uint32_t* i_fifoRequest)
TRAC_ERR("writeRequest: failed to putfsi to addr 0x%08x", l_addr);
}
- TRAC_INFO("Exit writeRequest");
+ TRAC_IMP("Exit writeRequest");
return l_rc;
}
@@ -206,7 +206,7 @@ uint32_t readResponse(SCOM_Trgt_t* i_target,
uint32_t l_rc = SUCCESS;
uint32_t l_readBuffer[READ_BUFFER_SIZE];
- TRAC_INFO("Enter readResponse");
+ TRAC_IMP("Enter readResponse");
// EOT is expected before the response buffer is full. Room for
// the PCBPIB status or FFDC is included, but is only returned
@@ -341,7 +341,7 @@ uint32_t readResponse(SCOM_Trgt_t* i_target,
l_rc = FAIL;
}
- TRAC_INFO("Exit readResponse");
+ TRAC_IMP("Exit readResponse");
return l_rc;
}
@@ -359,7 +359,7 @@ uint32_t performFifoChipOp(SCOM_Trgt_t* i_target,
{
uint32_t l_rc = SUCCESS;
- TRAC_INFO("Enter performFifoChipOp");
+ TRAC_IMP("Enter performFifoChipOp");
l_rc = writeRequest(i_target, i_fifoRequest);
if(l_rc != SUCCESS)
@@ -372,7 +372,7 @@ uint32_t performFifoChipOp(SCOM_Trgt_t* i_target,
i_fifoResponse,
i_responseSize);
- TRAC_INFO("Exit performFifoChioOp");
+ TRAC_IMP("Exit performFifoChioOp");
return l_rc;
}
@@ -387,7 +387,7 @@ int32_t putFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t i_data)
{
uint32_t l_rc = SUCCESS;
- TRAC_INFO("Enter putFifoScom");
+ TRAC_IMP("Enter putFifoScom");
struct fifoPutScomRequest l_fifoRequest;
struct fifoPutScomResponse l_fifoResponse;
@@ -404,7 +404,7 @@ int32_t putFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t i_data)
(uint32_t*)&l_fifoResponse,
sizeof(struct fifoPutScomResponse));
- TRAC_INFO("Exit putFifoScom");
+ TRAC_IMP("Exit putFifoScom");
return l_rc;
}
@@ -419,7 +419,7 @@ int32_t getFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t* o_data)
{
uint32_t l_rc = SUCCESS;
- TRAC_INFO("Enter getFifoScom");
+ TRAC_IMP("Enter getFifoScom");
struct fifoGetScomRequest l_fifoRequest;
struct fifoGetScomResponse l_fifoResponse;
@@ -438,7 +438,7 @@ int32_t getFifoScom(SCOM_Trgt_t* i_target, uint64_t i_addr, uint64_t* o_data)
//Always return data even if there is an error
*o_data = l_fifoResponse.data;
- TRAC_INFO("Exit getFifoScom");
+ TRAC_IMP("Exit getFifoScom");
return l_rc;
}
diff --git a/src/occ_405/firdata/scom_util.c b/src/occ_405/firdata/scom_util.c
index 61a7a8e..7709017 100644
--- a/src/occ_405/firdata/scom_util.c
+++ b/src/occ_405/firdata/scom_util.c
@@ -372,6 +372,7 @@ int32_t getscomraw( SCOM_Trgt_t i_chip, uint32_t i_addr, uint64_t * o_val )
ASYNC_REQUEST_BLOCKING); //Options
if(l_rc)
{
+ TRAC_ERR("getscomraw: failed to create gpe request, rc=0x%08X", l_rc);
return l_rc;
}
else
@@ -387,6 +388,7 @@ int32_t getscomraw( SCOM_Trgt_t i_chip, uint32_t i_addr, uint64_t * o_val )
l_rc = gpe_request_schedule(&G_request);
if(l_rc)
{
+ TRAC_ERR("getscomraw: failed to schedule gpe request, rc=0x%08X", l_rc);
return l_rc;
}
@@ -434,6 +436,7 @@ int32_t putscomraw( SCOM_Trgt_t i_chip, uint32_t i_addr, uint64_t i_val )
ASYNC_REQUEST_BLOCKING); //Options
if(l_rc)
{
+ TRAC_ERR("putscomraw gpe request create failed, rc = 0x%08x", l_rc);
return l_rc;
}
else
@@ -450,6 +453,7 @@ int32_t putscomraw( SCOM_Trgt_t i_chip, uint32_t i_addr, uint64_t i_val )
l_rc = gpe_request_schedule(&G_request);
if(l_rc)
{
+ TRAC_ERR("putscomraw gpe request schedule failed, rc=0x%08X", l_rc);
return l_rc;
}
@@ -457,6 +461,7 @@ int32_t putscomraw( SCOM_Trgt_t i_chip, uint32_t i_addr, uint64_t i_val )
//time, then a timeout has occurred.
if(G_request.request.completion_state != ASYNC_REQUEST_STATE_COMPLETE)
{
+ TRAC_ERR("putscomraw gpe request failed to complete, rc = 0x%08x", l_rc);
l_rc = FAIL;
}
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index 61f9f99..ded10ed 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -53,7 +53,7 @@
#include <amec_health.h>
#include <amec_freq.h>
#include "scom.h"
-//#include <fir_data_collect.h>
+#include <fir_data_collect.h>
#include <pss_service_codes.h>
#include <dimm.h>
#include "occhw_shared_data.h"
@@ -62,6 +62,12 @@
#include <p9_pstates_occ.h>
#include <wof.h>
#include "pgpe_service_codes.h"
+//#include <lpc.h>
+#include <native.h>
+#include <ast_mboxdd.h>
+#include <pnor_mboxdd.h>
+
+pnorMbox_t l_pnorMbox;
extern uint32_t __ssx_boot; // Function address is 32 bits
extern uint32_t G_occ_phantom_critical_count;
@@ -117,8 +123,6 @@ SimicsStdio G_simics_stderr;
uint8_t G_noncritical_stack[NONCRITICAL_STACK_SIZE];
uint8_t G_critical_stack[CRITICAL_STACK_SIZE];
-
-
//NOTE: Three semaphores are used so that if in future it is decided
// to move health monitor and FFDC into it's own threads, then
// it can be done easily without more changes.
diff --git a/src/occ_405/occLinkInputFile b/src/occ_405/occLinkInputFile
index 378fe57..aafd59b 100644
--- a/src/occ_405/occLinkInputFile
+++ b/src/occ_405/occLinkInputFile
@@ -18,6 +18,7 @@ INPUT ( amec_amester.o
amec_slave_smh.o
amec_tasks.o
apss.o
+ ast_mboxdd.o
avsbus.o
centaur_control.o
centaur_data.o
@@ -44,6 +45,7 @@ INPUT ( amec_amester.o
ffdc.o
homer.o
ll_ffdc.o
+ lpc.o
lock.o
main.o
memory.o
@@ -61,6 +63,7 @@ INPUT ( amec_amester.o
occhw_ocb.o
occhw_pba.o
pgpe_interface.o
+ pnor_mboxdd.o
ppc405_boot.o
ppc405_breakpoint.o
ppc405_cache_core.o
@@ -104,6 +107,7 @@ INPUT ( amec_amester.o
fir_data_collect.o
fsi.o
native.o
+ pnor_util.o
scom_trgt.o
scom_util.o
scom_addr_util.o
diff --git a/src/occ_405/topfiles.mk b/src/occ_405/topfiles.mk
index ca38569..48bc052 100644
--- a/src/occ_405/topfiles.mk
+++ b/src/occ_405/topfiles.mk
@@ -104,7 +104,16 @@ TOP-C-SOURCES = amec/amec_analytics.c \
thread/threadSch.c \
timer/timer.c \
trac/trac_interface.c \
- wof/wof.c
+ wof/wof.c \
+ firdata/scom_addr_util.c \
+ firdata/firData.c \
+ firdata/fir_data_collect.c \
+ firdata/fsi.c \
+ firdata/lpc.c \
+ firdata/native.c \
+ firdata/pnor_util.c \
+ firdata/scom_trgt.c \
+ firdata/scom_util.c
TOP-S-SOURCES = cmdh/ll_ffdc.S \
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