diff options
Diffstat (limited to 'src/ppe/hwp/perv/pervasive.act')
-rw-r--r-- | src/ppe/hwp/perv/pervasive.act | 472 |
1 files changed, 0 insertions, 472 deletions
diff --git a/src/ppe/hwp/perv/pervasive.act b/src/ppe/hwp/perv/pervasive.act deleted file mode 100644 index 9c19ccc..0000000 --- a/src/ppe/hwp/perv/pervasive.act +++ /dev/null @@ -1,472 +0,0 @@ -# ============================================================================= -# Simics action for p9_sbe_arrayinit and p9_sbe_chiplet_init -# ============================================================================= - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for N0] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x02030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x02030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x02030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x02030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x02000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x02000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for N0] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x02030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x02030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x02000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for N1] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x03030002)] -# # OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x03030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x03030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x03030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x03000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x03000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for N1] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x03030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x03030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x03000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for N2] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x04030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x04030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x04030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x04030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x04000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x04000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for N2] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x04030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x04030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x04000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for N3] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x05030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x05030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x05030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x05030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x05000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x05000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for N3] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x05030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x05030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x05000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for XB] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x06030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x06030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x06030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x06030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x06000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x06000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for XB] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x06030002)] -OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x06030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x06000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for MC01] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x07030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x07030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x07030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x07030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x07000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x07000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for MC01] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x07030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x07030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x07000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for MC029] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x08030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x08030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x08030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x08030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x08000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x08000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for MC029] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x08030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x08030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x08000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for OB0] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x09030002)] -#OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x09030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x09030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x09030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x09000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x09000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for OB0] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x09030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x09030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x09000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for OB1] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0A030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x0A030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x0A030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x0A030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0A000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x0A000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for OB1] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0A030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x0A030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0A000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for OB2] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0B030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x0B030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x0B030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x0B030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0B000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x0B000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for OB2] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0B030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x0B030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0B000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for OB3] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0C030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x0C030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x0C030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x0C030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0C000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x0C000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for OB3] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0C030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x0C030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0C000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for PCI0] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0D030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x0D030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x0D030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x0D030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0D000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x0D000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for PCI0] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0D030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x0D030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0D000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for PCI1] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0E030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x0E030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x0E030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x0E030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0E000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x0E000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for PCI1] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0E030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x0E030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0E000100)] OP=[BIT,ON] BIT=[8] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT for PCI2] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0F030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x0F030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x0F030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x0F030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0F000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x0F000100)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for PCI2] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x0F030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x0F030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x0F000100)] OP=[BIT,ON] BIT=[8] -} - - -# ============================================================================= -# Simics action for p9_sbe_tp_arrayinit -# ============================================================================= - -CAUSE_EFFECT{ -LABEL=[SEEPROM ARRAY INIT] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x01030002)] -# OPCG_REG0.RUNN_MODE = 1 -CAUSE: TARGET=[REG(0x01030002)] OP=[BIT,ON] BIT=[0] -# OPCG_REG0.OPCG_STARTS_BIST = 1 -CAUSE: TARGET=[REG(0x01030002)] OP=[BIT,ON] BIT=[14] -# OPCG_REG0.OPCG_GO = 1 -CAUSE: TARGET=[REG(0x01030002)] OP=[BIT,ON] BIT=[1] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x01000100)] OP=[BIT,ON] BIT=[8] -# SRAM Abist Done -EFFECT: TARGET=[REG(0x01000100)] OP=[BIT,ON] BIT=[0] -} - -# This cause-effect block is also used for "p9_sbe_tp_chiplet_init2.C" -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x01030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x01030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x01000100)] OP=[BIT,ON] BIT=[8] -} - - -# ============================================================================= -# Simics action for p9_sbe_tp_chiplet_init3 -# ============================================================================= - -CAUSE_EFFECT{ -LABEL=[Common_Clock_Start_AllRegions] -# Watch PERV_CLK_REGION register -WATCH=[REG(0x01030006)] -# Setup all Clock Domains and Clock Types -CAUSE: TARGET=[REG(0x01030006)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0x4FFF0000 0x0000E000)] -# Clock running status for SL type should match with expected values. -EFFECT: TARGET=[REG(0x01030008)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0xF001FFFF 0xFFFFFFFF)] -# Clock running status for NSL type should match with expected values. -EFFECT: TARGET=[REG(0x01030009)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0xF001FFFF 0xFFFFFFFF]) -# Clock running status for ARY type should match with expected values. -EFFECT: TARGET=[REG(0x0103000A)] OP=[EQUALTO,BUF] DATA=[LITERAL(64,0xF001FFFF 0xFFFFFFFF)] -} - - -# ============================================================================= -# Simics action for p9_sbe_npll_setup -# ============================================================================= - -CAUSE_EFFECT{ -LABEL=[SS PLL lock] -#Watch PERV_ROOT_CTRL8_SCOM register -WATCH=[REG(0x00050018)] -# PIB.ROOT_CTRL8.TP_PLL_TEST_ENABLE_DC = 0 -CAUSE: TARGET=[REG(0x00050018)] OP=[BIT,OFF] BIT=[12] -# PIB.ROOT_CTRL8.TP_SSPLL_PLL_RESET0_DC = 0 -CAUSE: TARGET=[REG(0x00050018)] OP=[BIT,OFF] BIT=[0] -# Check SS PLL lock -EFFECT: TARGET=[REG(0x010F0019)] OP=[BIT,ON] BIT=[0] -} - -CAUSE_EFFECT{ -LABEL=[CP and IO PLL lock] -# Watch PERV_ROOT_CTRL8_SCOM register -WATCH=[REG(0x00050018)] -# PIB.ROOT_CTRL8.TP_FILTPLL_PLL_RESET1_DC = 0 -CAUSE: TARGET=[REG(0x00050018)] OP=[BIT,OFF] BIT=[4] -# Check PLL_LOCK_REG register value -EFFECT: TARGET=[REG(0x010F0019)] OP=[BIT,ON] BIT=[1] -EFFECT: TARGET=[REG(0x010F0019)] OP=[BIT,ON] BIT=[2] -} - -CAUSE_EFFECT{ -LABEL=[NEST PLL LOCK] -# Watch PERV_ROOT_CTRL8_SCOM register -WATCH=[REG(0x00050018)] -# PIB.PERV_CTRL0.TP_PLLRST_DC = 0 -CAUSE: TARGET=[REG(0x00050018)] OP=[BIT,OFF] BIT=[4] -# Check NEST PLL lock -EFFECT: TARGET=[REG(0x010F0019)] OP=[BIT,ON] BIT=[3] -} - -# ============================================================================= -# Simics action for istep 4 shared modules -# ============================================================================= - -CAUSE_EFFECT{ -LABEL=[SEEPROM SCAN0 MODULE for EQ/CORE target] -# Watch PERV_OPCG_REG0 -WATCH=[REG(0x00030002)] -# OPCG_REG0.RUN_SCAN0 = 1 -CAUSE: TARGET=[REG(0x00030002)] OP=[BIT,ON] BIT=[2] -# OPCG_DONE for CPLT_STAT0 register -EFFECT: TARGET=[REG(0x00000100)] OP=[BIT,ON] BIT=[8] -} - - |