diff options
-rw-r--r-- | src/common/global_app_cfg.h | 5 | ||||
-rwxr-xr-x | src/occ_405/amec/amec_sensors_power.c | 4 | ||||
-rwxr-xr-x | src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c | 21 | ||||
-rwxr-xr-x | src/occ_405/dcom/dcom.c | 4 | ||||
-rwxr-xr-x | src/occ_405/dcom/dcom.h | 53 | ||||
-rw-r--r-- | src/occ_405/dcom/dcomSlaveRx.c | 14 | ||||
-rwxr-xr-x | src/occ_405/dcom/dcomSlaveTx.c | 6 | ||||
-rwxr-xr-x | src/occ_405/occ_sys_config.c | 4 | ||||
-rwxr-xr-x | src/occ_405/occ_sys_config.h | 16 | ||||
-rwxr-xr-x | src/occ_405/occbuildname.c | 2 |
10 files changed, 77 insertions, 52 deletions
diff --git a/src/common/global_app_cfg.h b/src/common/global_app_cfg.h index 859186e..81cf4db 100644 --- a/src/common/global_app_cfg.h +++ b/src/common/global_app_cfg.h @@ -34,6 +34,11 @@ // Turn off periodic GPE traces #define PK_TRACE_TIMER_OUTPUT 0 +// Redefine the default MSR to mask off SIB errors and avoid data machine checks +// These SIB errors probably occur due to contention on the PIB +#define PK_THREAD_MACHINE_CONTEXT_DEFAULT (MSR_SEM | MSR_UIE | MSR_EE | MSR_ME) +#define PPE42_MSR_INITIAL (MSR_SEM | MSR_ME) + // If we are using the OCB timebase then assume // a frequency of 37.5Mhz. Otherwise, the default is to use // the decrementer as a timebase and assume a frequency of diff --git a/src/occ_405/amec/amec_sensors_power.c b/src/occ_405/amec/amec_sensors_power.c index f110ce4..543a917 100755 --- a/src/occ_405/amec/amec_sensors_power.c +++ b/src/occ_405/amec/amec_sensors_power.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -185,7 +185,7 @@ void amec_update_apss_sensors(void) // via slave inbox first if (G_slv_inbox_received) { - uint8_t l_proc = G_pbax_id.module_id; + uint8_t l_proc = G_pbax_id.chip_id; uint32_t temp32 = 0; uint8_t l_idx = 0; uint32_t l_bulk_current_sum = 0; diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c index dd97bd2..7d24785 100755 --- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c +++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c @@ -626,7 +626,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co void apss_store_ipmi_sensor_id(const uint16_t i_channel, const apss_cfg_adc_v20_t *i_adc) { // Get current processor id. - uint8_t l_proc = G_pbax_id.module_id; + uint8_t l_proc = G_pbax_id.chip_id; switch (i_adc->assignment) { @@ -846,6 +846,24 @@ errlHndl_t apss_store_gpio_pin(const eApssGpioAssignments i_func_id, const uint8 case DOM_D_OC_LATCH: l_gpio_function = &G_sysConfigData.apss_gpio_map.dom_oc_latch[i_func_id-DOM_A_OC_LATCH]; break; + + case PSU_FAN_DISABLE_N: + l_gpio_function = &G_sysConfigData.apss_gpio_map.psu_fan_disable; + break; + + case GPU_0_0_PRSNT_N: + case GPU_0_1_PRSNT_N: + case GPU_0_2_PRSNT_N: + case GPU_1_0_PRSNT_N: + case GPU_1_1_PRSNT_N: + case GPU_1_2_PRSNT_N: + l_gpio_function = &G_sysConfigData.apss_gpio_map.gpu[i_func_id-GPU_0_0_PRSNT_N]; + break; + + case NVDIMM_EPOW_N: + l_gpio_function = &G_sysConfigData.apss_gpio_map.nvdimm_epow; + break; + default: // It should never happen CMDH_TRAC_ERR("apss_store_gpio_pin: Invalid function ID: 0x%x", i_func_id); @@ -1367,7 +1385,6 @@ errlHndl_t data_store_power_cap(const cmdh_fsp_cmd_t * i_cmd_ptr, G_master_pcap_data.max_pcap = l_cmd2_ptr->pcap_config.sys_max_pcap; G_master_pcap_data.oversub_pcap = l_cmd2_ptr->pcap_config.qpd_pcap; G_master_pcap_data.system_pcap = l_cmd2_ptr->pcap_config.sys_max_pcap; - G_master_pcap_data.unthrottle = 0; // NOTE: The customer power cap will be set via a separate command // from BMC/(H)TMGT or OPAL. diff --git a/src/occ_405/dcom/dcom.c b/src/occ_405/dcom/dcom.c index 5cfea36..f6d2ac8 100755 --- a/src/occ_405/dcom/dcom.c +++ b/src/occ_405/dcom/dcom.c @@ -124,10 +124,8 @@ void dcom_initialize_roles(void) pbax_cfg_reg.fields.rcv_chipid, pbax_cfg_reg.fields.rcv_groupid); - G_pbax_id.valid = 1; G_pbax_id.node_id = pbax_cfg_reg.fields.rcv_groupid; G_pbax_id.chip_id = pbax_cfg_reg.fields.rcv_chipid; - G_pbax_id.module_id = G_pbax_id.chip_id; // Always start as OCC Slave G_occ_role = OCC_SLAVE; rtl_set_run_mask(RTL_FLAG_NOTMSTR); @@ -175,8 +173,6 @@ void dcom_initialize_roles(void) G_sysConfigData.proc_huid, ERRL_CALLOUT_PRIORITY_LOW); - G_pbax_id.valid = 0; // Invalid Chip/Node ID - CHECKPOINT_FAIL_AND_HALT(l_errl); } diff --git a/src/occ_405/dcom/dcom.h b/src/occ_405/dcom/dcom.h index 9eace60..24d3909 100755 --- a/src/occ_405/dcom/dcom.h +++ b/src/occ_405/dcom/dcom.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -111,14 +111,20 @@ #define DCOM_4MS_GAP 8 #define DCOM_1S_GAP 4000 +// Doorbell error flag bits +#define DCOM_DOORBELL_TIMEOUT_ERR 0x80 +#define DCOM_DOORBELL_INCOMPLETE_ERR 0x40 +#define DCOM_DOORBELL_BAD_SEQ_ERR 0x20 +#define DCOM_DOORBELL_BAD_MAGIC_NUM_ERR 0x10 +#define DCOM_DOORBELL_PACKET_DROP_ERR 0x08 +#define DCOM_DOORBELL_HW_ERR 0x04 +#define DCOM_DOORBELL_RX_TIMEOUT_ERR 0x02 + // POB Id structure typedef struct { - uint8_t module_id :2; - uint8_t valid :1; // Valid chip/node id? - uint8_t node_id :2; - uint8_t reserved :1; - uint8_t chip_id :2; + uint8_t node_id; + uint8_t chip_id; } pob_id_t; // For now pbax structure is same as pob id structure @@ -242,39 +248,39 @@ typedef struct { struct { - // PowerBus ID (= pbax_id) so that the slave knows who the master is - pob_id_t pob_id; // 1 byte // Magic Number denoting the start of the packet - uint32_t magic1 :24; // 3 bytes + uint32_t magic1; // 4 bytes + // PowerBus ID (= pbax_id) so that the slave knows who the master is + pob_id_t pob_id; // 2 bytes + // PowerPreservingBoundry Fmax to throttle all OCCs the same + uint16_t ppb_fmax; // 2 bytes // OCI Address where the Slave Inbox Buffer was placed uint32_t addr_slv_inbox_buffer0; // 4 bytes // PowerCap data sent from master to slaves pcap_config_data_t pcap; // 14 bytes - // PowerPreservingBoundry Fmax to throttle all OCCs the same - uint16_t ppb_fmax; // 2 bytes + // Reserved + uint8_t _reserved0[2]; // 2 bytes // GPIO pins from APSS uint16_t gpio[2]; // 4 bytes // Raw ADC Channels from APSS uint16_t adc[MAX_APSS_ADC_CHANNELS]; // 32 bytes - // Reserved - uint8_t _reserved_0[4]; // 4 bytes // Time of Day Clock from the last APSS reading uint64_t tod; // 8 bytes // Reserved - uint8_t _reserved_1[52]; // 52 bytes + uint8_t _reserved_1[51]; // 51 bytes // Counter in case we want to determine sequence errors uint8_t magic_counter; // 1 byte // Magic Number for denoting the end of the packet - uint32_t magic2 :24; // 3 bytes - }; // -------- + uint32_t magic2; // 4 bytes + } __attribute__ ((packed)); // -------- uint64_t words[16]; // Total = 128 bytes }; -} __attribute__ ((packed)) dcom_slv_inbox_doorbell_t; +} dcom_slv_inbox_doorbell_t; // Slave Outbox Doorbell typedef struct { - pob_id_t pob_id; + uint8_t chip_id; uint8_t pcap_valid; uint16_t active_node_pcap; uint32_t addr_slv_outbox_buffer; @@ -357,16 +363,7 @@ typedef struct // Most Recent Sequence number received from Master Doorbell uint8_t doorbellSeq; // Error Flags for receiving Master Doorbell (never cleared) - struct - { - uint8_t timeout :1; - uint8_t incomplete :1; - uint8_t badSequence :1; - uint8_t badMagicNumEnd :1; - uint8_t dropPacket :1; - uint8_t hwError :1; - uint8_t timeoutRx :1; - } doorbellErrorFlags; + uint8_t doorbellErrorFlags; } slave; // General Timing diff --git a/src/occ_405/dcom/dcomSlaveRx.c b/src/occ_405/dcom/dcomSlaveRx.c index a9e5ce8..43c9829 100644 --- a/src/occ_405/dcom/dcomSlaveRx.c +++ b/src/occ_405/dcom/dcomSlaveRx.c @@ -297,7 +297,7 @@ void task_dcom_rx_slv_inbox( task_t *i_self) else { - G_dcomTime.slave.doorbellErrorFlags.timeoutRx = 1; + G_dcomTime.slave.doorbellErrorFlags |= DCOM_DOORBELL_RX_TIMEOUT_ERR; G_dcomTime.slave.doorbellTimeoutWaitRx = ssx_timebase_get(); // Let's signal that master is not ready, and then @@ -356,7 +356,7 @@ uint32_t dcom_rx_slv_inbox_doorbell( void ) // We got an error reading from the PBAX, return to caller if ( l_pbarc != 0 ) { - G_dcomTime.slave.doorbellErrorFlags.hwError = 1; + G_dcomTime.slave.doorbellErrorFlags |= DCOM_DOORBELL_HW_ERR; // Failure occurred TRAC_ERR("Slave PBAX Read Failure in receiving multicast doorbell from master - RC[%08X]", l_pbarc); @@ -372,11 +372,11 @@ uint32_t dcom_rx_slv_inbox_doorbell( void ) if ((ssx_timebase_get() - l_start) > SSX_MICROSECONDS(3)) { if(l_bytes_so_far){ - G_dcomTime.slave.doorbellErrorFlags.incomplete = 1; + G_dcomTime.slave.doorbellErrorFlags |= DCOM_DOORBELL_INCOMPLETE_ERR; DCOM_DBG("dcom_rx_slv_inbox_doorbell: incomplete data"); } else{ - G_dcomTime.slave.doorbellErrorFlags.timeout = 1; + G_dcomTime.slave.doorbellErrorFlags |= DCOM_DOORBELL_TIMEOUT_ERR; DCOM_DBG("dcom_rx_slv_inbox_doorbell: timeout"); } break; @@ -398,7 +398,7 @@ uint32_t dcom_rx_slv_inbox_doorbell( void ) { l_read = 0; l_bytes_so_far = 0; - G_dcomTime.slave.doorbellErrorFlags.dropPacket = 1; + G_dcomTime.slave.doorbellErrorFlags |= DCOM_DOORBELL_PACKET_DROP_ERR; TRAC_INFO("Slave Inbox - Start Magic Number Mismatch [0x%08X]", G_dcom_slv_inbox_doorbell_rx.magic1); @@ -411,7 +411,7 @@ uint32_t dcom_rx_slv_inbox_doorbell( void ) { TRAC_INFO("Slave Inbox - End Magic Number Mismatch [0x%08X]", G_dcom_slv_inbox_doorbell_rx.magic2); - G_dcomTime.slave.doorbellErrorFlags.badMagicNumEnd = 1; + G_dcomTime.slave.doorbellErrorFlags |= DCOM_DOORBELL_BAD_MAGIC_NUM_ERR; // Decrement the number of bytes we return so it fails // any valid length checks, but still indicates to us that @@ -423,7 +423,7 @@ uint32_t dcom_rx_slv_inbox_doorbell( void ) { if(G_dcom_slv_inbox_doorbell_rx.magic_counter != (G_dcomTime.slave.doorbellSeq + 1)) { - G_dcomTime.slave.doorbellErrorFlags.badSequence = 1; + G_dcomTime.slave.doorbellErrorFlags |= DCOM_DOORBELL_BAD_SEQ_ERR; } G_dcomTime.slave.doorbellSeq = G_dcom_slv_inbox_doorbell_rx.magic_counter; } diff --git a/src/occ_405/dcom/dcomSlaveTx.c b/src/occ_405/dcom/dcomSlaveTx.c index a92bb69..a7060cb 100755 --- a/src/occ_405/dcom/dcomSlaveTx.c +++ b/src/occ_405/dcom/dcomSlaveTx.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -84,7 +84,7 @@ uint32_t dcom_build_slv_outbox(void) l_addr_of_slv_outbox_in_main_mem += G_pbax_id.chip_id*sizeof(dcom_slv_outbox_t); - G_dcom_slv_outbox_doorbell_tx.pob_id = G_pbax_id; + G_dcom_slv_outbox_doorbell_tx.chip_id = G_pbax_id.chip_id; G_dcom_slv_outbox_doorbell_tx.pcap_valid = g_amec->pcap_valid; G_dcom_slv_outbox_doorbell_tx.active_node_pcap = g_amec->pcap.active_node_pcap; G_dcom_slv_outbox_doorbell_tx.addr_slv_outbox_buffer = l_addr_of_slv_outbox_in_main_mem; @@ -128,7 +128,7 @@ uint32_t dcom_which_buffer_slv_outbox(void) // End Function Specification uint32_t dcom_calc_slv_outbox_addr( const dcom_slv_outbox_doorbell_t * i_doorbell, uint8_t * o_occ_id ) { - *o_occ_id = i_doorbell->pob_id.chip_id; + *o_occ_id = i_doorbell->chip_id; return i_doorbell->addr_slv_outbox_buffer; } diff --git a/src/occ_405/occ_sys_config.c b/src/occ_405/occ_sys_config.c index a5db1a1..f92010a 100755 --- a/src/occ_405/occ_sys_config.c +++ b/src/occ_405/occ_sys_config.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -175,7 +175,6 @@ occSysConfigData_t G_sysConfigData = .max_pcap = 0, .oversub_pcap = 0, .system_pcap = 0, - .unthrottle = 0, .source = 0, }, @@ -242,7 +241,6 @@ pcap_config_data_t G_master_pcap_data = .max_pcap = 0, .oversub_pcap = 0, .system_pcap = 0, - .unthrottle = 0, .pcap_data_count = 0, }; diff --git a/src/occ_405/occ_sys_config.h b/src/occ_405/occ_sys_config.h index abd92c9..40416a7 100755 --- a/src/occ_405/occ_sys_config.h +++ b/src/occ_405/occ_sys_config.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* Contributors Listed Below - COPYRIGHT 2011,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -47,6 +47,8 @@ #define MAX_NUM_MEM_CONTROLLERS 8 #define MAX_NUM_CENTAURS 8 #define NUM_PROC_VRMS 2 +#define MAX_GPU_PRES_SIGNALS 6 +#define GPU_PRES_SIGN_PER_OCC 3 #define MAX_NUM_MCU_PORTS 4 @@ -165,6 +167,14 @@ typedef enum DOM_B_OC_LATCH = 0x0010, DOM_C_OC_LATCH = 0x0011, DOM_D_OC_LATCH = 0x0012, + PSU_FAN_DISABLE_N = 0x0013, + GPU_0_0_PRSNT_N = 0x0014, //GPU0_PRSNT_N + GPU_0_1_PRSNT_N = 0x0015, //GPU1_PRSNT_N + GPU_0_2_PRSNT_N = 0x0016, //GPU2_PRSNT_N + GPU_1_0_PRSNT_N = 0x0017, //GPU3_PRSNT_N + GPU_1_1_PRSNT_N = 0x0018, //GPU4_PRSNT_N + GPU_1_2_PRSNT_N = 0x0019, //GPU5_PRSNT_N + NVDIMM_EPOW_N = 0x001A, NUM_GPIO_ASSIGNMENT_TYPES // This should always be the last member } eApssGpioAssignments; @@ -189,6 +199,9 @@ typedef struct uint8_t fans_full_speed; uint8_t fans_error; uint8_t fans_reserved; + uint8_t psu_fan_disable; + uint8_t gpu[MAX_GPU_PRES_SIGNALS]; + uint8_t nvdimm_epow; } apssGpioPinData_t; typedef struct @@ -246,7 +259,6 @@ typedef struct uint16_t max_pcap; // Maximum customer settable node power cap in 1W units uint16_t oversub_pcap; // Node power cap to be used for oversubscripion in 1W units uint16_t system_pcap; // Fixed node power cap required by the system in 1W units - uint8_t unthrottle; // Only used on ITEs -- is indicated from CMM uint8_t pcap_data_count; // Used by OCC only. Initialized to 0 and incremented by 1 with every new packet. uint8_t source; // source of PCAP value currently in use } pcap_config_data_t; diff --git a/src/occ_405/occbuildname.c b/src/occ_405/occbuildname.c index ac39297..b41a88f 100755 --- a/src/occ_405/occbuildname.c +++ b/src/occ_405/occbuildname.c @@ -34,6 +34,6 @@ volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = #else -volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/ "op_occ_170504a\0" /*</BuildName>*/ ; +volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/ "op_occ_170510a\0" /*</BuildName>*/ ; #endif |