summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp.c2
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds.c14
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c71
-rwxr-xr-xsrc/occ_405/errl/errl.c19
-rwxr-xr-xsrc/occ_405/errl/errl.h4
-rwxr-xr-xsrc/occ_405/homer.c3
-rwxr-xr-xsrc/occ_405/incl/occ_common.h8
-rwxr-xr-xsrc/occ_405/main.c27
-rw-r--r--src/occ_405/occ_defs.mk3
-rwxr-xr-xsrc/occ_405/pss/apss.c2
-rwxr-xr-xsrc/occ_405/reset.c11
-rwxr-xr-xsrc/occ_405/rtls/rtls.c15
-rwxr-xr-xsrc/occ_405/state.c15
-rwxr-xr-xsrc/occ_405/thread/threadSch.c4
-rwxr-xr-xsrc/occ_405/thread/thrm_thread.c15
-rwxr-xr-xsrc/occ_405/timer/timer.c6
-rwxr-xr-xsrc/occ_405/trac/trac_interface.c137
-rwxr-xr-xsrc/occ_405/trac/trac_interface.h19
-rw-r--r--src/occ_gpe0/apss_init.c24
-rw-r--r--src/occ_gpe0/apss_util.c26
-rw-r--r--src/occ_gpe0/apss_util.h26
-rw-r--r--src/occ_gpe0/img_defs.mk2
-rw-r--r--src/occ_gpe0/pk_app_cfg.h2
-rw-r--r--src/occ_gpe1/img_defs.mk26
-rw-r--r--src/occ_gpe1/pk_app_cfg.h26
25 files changed, 254 insertions, 253 deletions
diff --git a/src/occ_405/cmdh/cmdh_fsp.c b/src/occ_405/cmdh/cmdh_fsp.c
index 054fc0b..b427433 100755
--- a/src/occ_405/cmdh/cmdh_fsp.c
+++ b/src/occ_405/cmdh/cmdh_fsp.c
@@ -193,7 +193,7 @@ int cmdh_fsp_fsi2host_mbox_wait4free(void)
int rc,rc2 = 0;
int l_do_once = 0;
int l_timeout = FSI2HOST_TIMEOUT_IN_SECONDS;
- ChipConfigCores l_cores, l_swup_timedout;
+ ChipConfigCores l_cores, l_swup_timedout = 0;
pmc_core_deconfiguration_reg_t l_pcdr;
bool l_disable_swup;
errlHndl_t l_errl;
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.c b/src/occ_405/cmdh/cmdh_fsp_cmds.c
index 0b9728f..36d937a 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds.c
@@ -209,9 +209,9 @@ errlHndl_t cmdh_tmgt_poll (const cmdh_fsp_cmd_t * i_cmd_ptr,
ERRL_RC cmdh_poll_v10(cmdh_fsp_rsp_t * o_rsp_ptr)
{
ERRL_RC l_rc = ERRL_RC_INTERNAL_FAIL;
- uint8_t k = 0;
/* TEMP -- NOT SUPPORTED YET (NEED DCOM/AMEC) */
#if 0
+ uint8_t k = 0;
cmdh_poll_sensor_db_t l_sensorHeader;
// Clear response buffer
@@ -874,9 +874,12 @@ void cmdh_dbug_peek (const cmdh_fsp_cmd_t * i_cmd_ptr,
uint8_t l_type = l_cmd_ptr->type;
uint32_t l_addr = l_cmd_ptr->oci_address;
+// Needed because otherwise we get warnings about
+// unused variables when building for Simics
+#if !SIMICS_ENVIRONMENT
static Ppc405MmuMap L_mmuMapHomer;
static Ppc405MmuMap L_mmuMapCommon;
-
+#endif
switch(l_type)
{
@@ -1064,12 +1067,13 @@ void cmdh_dbug_get_apss_data (const cmdh_fsp_cmd_t * i_cmd_ptr,
void cmdh_dbug_cmd (const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
+// TEMP / TODO : Uncomment these when needed, they cause unused var warning
uint8_t l_rc = 0;
uint8_t l_sub_cmd = 0;
- uint8_t l_block_num = 0;
+// uint8_t l_block_num = 0;
errl_generic_resp_t * l_err_rsp_ptr = (errl_generic_resp_t *) o_rsp_ptr;
- errlHndl_t l_errl = NULL;
- cmdhDbugCmdArg_t l_cmdh_dbug_args;
+// errlHndl_t l_errl = NULL;
+// cmdhDbugCmdArg_t l_cmdh_dbug_args;
// Sub Command for debug is always first byte of data
l_sub_cmd = i_cmd_ptr->data[0];
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
index c3d44f6..82b3aed 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
@@ -253,7 +253,8 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
uint16_t l_req_freq;
cmdh_store_mode_freqs_t* l_cmdp = (cmdh_store_mode_freqs_t*)i_cmd_ptr;
uint8_t* l_buf = ((uint8_t*)(l_cmdp)) + sizeof(cmdh_store_mode_freqs_t);
@@ -349,7 +350,7 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr,
* @userdata2 frequency used
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc OCC recieved an invalid FFO frequency
- */ /*
+ */
l_err = createErrl(DATA_STORE_FREQ_DATA,
INVALID_INPUT_DATA,
OCC_NO_EXTENDED_RC,
@@ -429,7 +430,7 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr,
G_sysConfigData.sys_mode_freq.update_count++;
G_data_cnfg->data_mask |= DATA_MASK_FREQ_PRESENT;
}
-*/
+#endif // #if 0
return l_err;
}
@@ -443,7 +444,8 @@ errlHndl_t data_store_freq_data(const cmdh_fsp_cmd_t * i_cmd_ptr,
errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, const uint8_t i_channel_num )
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
// Check function ID and channel number
if ( (i_func_id >= NUM_ADC_ASSIGNMENT_TYPES) ||
(i_channel_num >= MAX_APSS_ADC_CHANNELS) )
@@ -458,7 +460,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co
* @userdata2 channel number
* @userdata4 ERC_APSS_ADC_OUT_OF_RANGE_FAILURE
* @devdesc Invalid function ID or channel number
- */ /*
+ */
l_err = createErrl(DATA_STORE_APSS_DATA,
INVALID_INPUT_DATA,
ERC_APSS_ADC_OUT_OF_RANGE_FAILURE,
@@ -576,7 +578,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co
* @userdata2 channel number
* @userdata4 ERC_APSS_ADC_DUPLICATED_FAILURE
* @devdesc Function ID is duplicated
- */ /*
+ */
l_err = createErrl(DATA_STORE_APSS_DATA,
INVALID_INPUT_DATA,
ERC_APSS_ADC_DUPLICATED_FAILURE,
@@ -594,7 +596,7 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co
}
}
}
-*/
+#endif // #if 0
return l_err;
}
@@ -608,7 +610,8 @@ errlHndl_t apss_store_adc_channel(const eApssAdcChannelAssignments i_func_id, co
// End Function Specification
void apss_store_ipmi_sensor_id(const uint16_t i_channel, const apss_cfg_adc_v10_t *i_adc)
{
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
// Get current processor id.
uint8_t l_proc = G_pob_id.module_id;
@@ -715,7 +718,7 @@ void apss_store_ipmi_sensor_id(const uint16_t i_channel, const apss_cfg_adc_v10_
AMECSENSOR_PTR(PWRAPSSCH0 + i_channel)->ipmi_sid = i_adc->ipmisensorId;
}
}
-*/
+#endif // #if 0
}
// Function Specification
@@ -1120,7 +1123,8 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_errlHndl = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
uint8_t l_new_role = OCC_SLAVE;
uint8_t l_old_role = G_occ_role;
ERRL_RC l_rc = ERRL_RC_SUCCESS;
@@ -1235,7 +1239,7 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr,
* @userdata2 Requested role
* @userdata4 ERC_INVALID_INPUT_DATA
* @devdesc Bad config data passed to OCC
- */ /*
+ */
l_errlHndl = createErrl(DATA_STORE_GENERIC_DATA, //modId
INVALID_INPUT_DATA, //reasoncode
ERC_INVALID_INPUT_DATA, //Extended reason code
@@ -1260,7 +1264,7 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr,
* @userdata2 current state
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc Bad config data passed to OCC
- */ /*
+ */
l_errlHndl = createErrl(DATA_STORE_GENERIC_DATA, //modId
INVALID_INPUT_DATA, //reasoncode
OCC_NO_EXTENDED_RC, //Extended reason code
@@ -1276,7 +1280,7 @@ errlHndl_t data_store_role(const cmdh_fsp_cmd_t * i_cmd_ptr,
// Send back an error response to TMGT
cmdh_build_errl_rsp(i_cmd_ptr, o_rsp_ptr, l_rc, &l_errlHndl);
}
-*/
+#endif // #if 0
return l_errlHndl;
}
@@ -1292,7 +1296,8 @@ errlHndl_t data_store_power_cap(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * i_rsp_ptr)
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
// Cast the command to the struct for this format
cmdh_pcap_config_t * l_cmd_ptr = (cmdh_pcap_config_t *)i_cmd_ptr;
uint16_t l_data_length = 0;
@@ -1338,7 +1343,7 @@ errlHndl_t data_store_power_cap(const cmdh_fsp_cmd_t * i_cmd_ptr,
* @userdata2 packet version (Bytes 0-1) / role (Bytes 2-3)
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc OCC recieved an invalid data packet from the FSP or OCC role is not MASTER
- */ /*
+ */
l_err = createErrl(DATA_STORE_PCAP_DATA,
INVALID_INPUT_DATA,
OCC_NO_EXTENDED_RC,
@@ -1389,7 +1394,7 @@ errlHndl_t data_store_power_cap(const cmdh_fsp_cmd_t * i_cmd_ptr,
// will update data mask when slave code acquires data
TRAC_IMP("data store pcap: Got valid PCAP Config data via TMGT. Count:%i, Data Cfg mask[%x]",G_master_pcap_data.pcap_data_count, G_data_cnfg->data_mask);
}
-*/
+#endif // #if 0
return l_err;
}
@@ -1404,7 +1409,8 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
// Cast the command to the struct for this format
cmdh_sys_config_t * l_cmd_ptr = (cmdh_sys_config_t *)i_cmd_ptr;
uint16_t l_data_length = 0;
@@ -1446,7 +1452,7 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
* @userdata2 packet version
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc OCC recieved an invalid data packet from the FSP
- */ /*
+ */
l_err = createErrl(DATA_STORE_SYS_DATA,
INVALID_INPUT_DATA,
OCC_NO_EXTENDED_RC,
@@ -1495,7 +1501,7 @@ errlHndl_t data_store_sys_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
G_data_cnfg->data_mask |= DATA_MASK_SYS_CNFG;
TRAC_IMP("Got valid System Config data via TMGT for system type: 0x%02X", l_cmd_ptr->sys_config.system_type);
}
-*/
+#endif // #if 0
return l_err;
}
@@ -1511,7 +1517,8 @@ errlHndl_t data_store_thrm_thresholds(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
cmdh_thrm_thresholds_t* l_cmd_ptr = (cmdh_thrm_thresholds_t*)i_cmd_ptr;
uint16_t i = 0;
uint16_t l_data_length = 0;
@@ -1679,7 +1686,7 @@ errlHndl_t data_store_thrm_thresholds(const cmdh_fsp_cmd_t * i_cmd_ptr,
// Notify thermal thread to update its local copy of the thermal thresholds
THRM_thread_update_thresholds();
}
-*/
+#endif // #if 0
return l_err;
}
@@ -1696,7 +1703,8 @@ errlHndl_t data_store_mem_cfg(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
cmdh_mem_cfg_t* l_cmd_ptr = (cmdh_mem_cfg_t*)i_cmd_ptr;
uint16_t l_data_length = 0;
uint16_t l_exp_data_length = 0;
@@ -1852,7 +1860,7 @@ errlHndl_t data_store_mem_cfg(const cmdh_fsp_cmd_t * i_cmd_ptr,
TRAC_IMP("data_store_mem_cfg: Got valid mem cfg packet. cent#=%d, dimm#=%d",
l_num_centaurs, l_num_dimms);
}
-*/
+#endif // #if 0
return l_err;
}
@@ -1869,7 +1877,8 @@ errlHndl_t data_store_mem_throt(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
cmdh_mem_throt_t* l_cmd_ptr = (cmdh_mem_throt_t*)i_cmd_ptr;
uint16_t l_data_length = 0;
uint16_t l_exp_data_length = 0;
@@ -2031,7 +2040,7 @@ errlHndl_t data_store_mem_throt(const cmdh_fsp_cmd_t * i_cmd_ptr,
// Update the configured mba bitmap
G_configured_mbas = l_configured_mbas;
}
-*/
+#endif // #if 0
return l_err;
}
@@ -2046,7 +2055,8 @@ errlHndl_t data_store_ips_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_err = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
cmdh_ips_config_t *l_cmd_ptr = (cmdh_ips_config_t *)i_cmd_ptr; // Cast the command to the struct for this format
uint16_t l_data_length = CMDH_DATALEN_FIELD_UINT16(l_cmd_ptr);
uint32_t l_ips_data_sz = sizeof(cmdh_ips_config_t) - sizeof(cmdh_fsp_cmd_header_t);
@@ -2067,7 +2077,7 @@ errlHndl_t data_store_ips_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
* @userdata2 packet version
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc OCC recieved an invalid data packet from the FSP
- */ /*
+ */
l_err = createErrl(DATA_STORE_IPS_DATA,
INVALID_INPUT_DATA,
OCC_NO_EXTENDED_RC,
@@ -2098,7 +2108,7 @@ errlHndl_t data_store_ips_config(const cmdh_fsp_cmd_t * i_cmd_ptr,
l_cmd_ptr->iv_ips_config.iv_utilizationForEntry,
l_cmd_ptr->iv_ips_config.iv_utilizationForExit );
}
-*/
+#endif // #if 0
return l_err;
}
@@ -2211,7 +2221,8 @@ errlHndl_t DATA_store_cnfgdata (const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
errlHndl_t l_errlHndl = NULL;
-/* TEMP -- NOT SUPPORTED IN PHASE1
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
UINT32 l_new_data = 0;
ERRL_RC l_rc = ERRL_RC_INTERNAL_FAIL;
@@ -2404,7 +2415,7 @@ errlHndl_t DATA_store_cnfgdata (const cmdh_fsp_cmd_t * i_cmd_ptr,
o_rsp_ptr->data_length[1] = 0;
o_rsp_ptr->rc = ERRL_RC_SUCCESS;
}
-*/
+#endif // #if 0
return(l_errlHndl);
}
diff --git a/src/occ_405/errl/errl.c b/src/occ_405/errl/errl.c
index 3e80d05..2192665 100755
--- a/src/occ_405/errl/errl.c
+++ b/src/occ_405/errl/errl.c
@@ -277,7 +277,7 @@ errlHndl_t createErrl(
const uint8_t i_reasonCode,
const uint32_t i_extReasonCode,
const ERRL_SEVERITY i_sev,
- const tracDesc_t i_trace,
+ const trace_descriptor_array_t* i_trace,
const uint16_t i_traceSz,
const uint32_t i_userData1,
const uint32_t i_userData2
@@ -357,7 +357,7 @@ errlHndl_t createErrl(
//
// End Function Specification
void addTraceToErrl(
- const tracDesc_t i_trace,
+ const trace_descriptor_array_t* i_trace,
const uint16_t i_traceSz,
errlHndl_t io_err)
{
@@ -366,9 +366,10 @@ void addTraceToErrl(
uint16_t l_actualSizeOfUsrDtls = 0;
// TEMP -- NO MORE PORE
// pore_status_t l_gpe0_status;
- ocb_oisr0_t l_oisr0_status;
- static bool L_gpe_halt_traced = FALSE;
- static bool L_sys_checkstop_traced = FALSE;
+// TEMP / TODO -- Commented out due to unused var warning
+// ocb_oisr0_t l_oisr0_status;
+// static bool L_gpe_halt_traced = FALSE;
+// static bool L_sys_checkstop_traced = FALSE;
// check if GPE was frozen due to a checkstop
@@ -403,7 +404,10 @@ void addTraceToErrl(
(io_err->iv_userDetails.iv_committed == 0) &&
(i_traceSz != 0) &&
((io_err->iv_userDetails.iv_entrySize + sizeof(ErrlUserDetailsEntry_t)) < MAX_ERRL_ENTRY_SZ ) &&
- ((i_trace==g_trac_inf)||(i_trace==g_trac_err)||(i_trace==g_trac_imp)||(i_trace==NULL)) )
+ ((i_trace==&g_des_array[INF_TRACE_DESCRIPTOR]) ||
+ (i_trace==&g_des_array[ERR_TRACE_DESCRIPTOR]) ||
+ (i_trace==&g_des_array[IMP_TRACE_DESCRIPTOR]) ||
+ (i_trace==NULL)) )
{
//local copy of the usr details entry
ErrlUserDetailsEntry_t l_usrDtlsEntry;
@@ -576,7 +580,8 @@ void commitErrl( errlHndl_t *io_err )
{
// TEMP -- NO MORE PORE
// pore_status_t l_gpe0_status;
- ocb_oisr0_t l_oisr0_status;
+// TEMP -- Commented out due to unused var warning
+// ocb_oisr0_t l_oisr0_status;
static bool L_log_commits_suspended_by_safe_mode = FALSE;
if (!L_log_commits_suspended_by_safe_mode && io_err != NULL)
diff --git a/src/occ_405/errl/errl.h b/src/occ_405/errl/errl.h
index 107a3f3..ec75aca 100755
--- a/src/occ_405/errl/errl.h
+++ b/src/occ_405/errl/errl.h
@@ -281,7 +281,7 @@ errlHndl_t createErrl(
const uint8_t i_reasonCode,
const uint32_t i_extReasonCode,
const ERRL_SEVERITY i_sev,
- const tracDesc_t i_trace,
+ const trace_descriptor_array_t* i_trace,
const uint16_t i_traceSz,
const uint32_t i_userData1,
const uint32_t i_userData2
@@ -290,7 +290,7 @@ errlHndl_t createErrl(
/* Add Trace Data to Error Log */
void addTraceToErrl(
- const tracDesc_t i_trace,
+ const trace_descriptor_array_t* i_trace,
const uint16_t i_traceSz,
errlHndl_t io_errl
);
diff --git a/src/occ_405/homer.c b/src/occ_405/homer.c
index 1ab014b..e78a82c 100755
--- a/src/occ_405/homer.c
+++ b/src/occ_405/homer.c
@@ -61,7 +61,8 @@ homer_rc_t __attribute__((optimize("O1"))) homer_hd_map_read_unmap(const homer_r
void * const o_host_data,
int * const o_ssx_rc)
{
- Ppc405MmuMap l_mmuMapHomer = 0;
+// TEMP / TODO -- Commented out due to unused var warning
+// Ppc405MmuMap l_mmuMapHomer = 0;
homer_rc_t l_rc = HOMER_SUCCESS;
occHostConfigDataArea_t *l_hdcfg_data = 0x00000000;
diff --git a/src/occ_405/incl/occ_common.h b/src/occ_405/incl/occ_common.h
index abd8942..fbf6dd5 100755
--- a/src/occ_405/incl/occ_common.h
+++ b/src/occ_405/incl/occ_common.h
@@ -30,12 +30,12 @@
#include <comp_ids.h>
// From Linker Script
-extern void _LINEAR_WR_WINDOW_SECTION_BASE;
+extern char _LINEAR_WR_WINDOW_SECTION_BASE[];
extern void _LINEAR_WR_WINDOW_SECTION_SIZE;
-extern void _LINEAR_RD_WINDOW_SECTION_BASE;
+extern char _LINEAR_RD_WINDOW_SECTION_BASE[];
extern void _LINEAR_RD_WINDOW_SECTION_SIZE;
-extern void _FIR_PARMS_SECTION_BASE;
-extern void _FIR_HEAP_SECTION_BASE;
+extern char _FIR_PARMS_SECTION_BASE[];
+extern char _FIR_HEAP_SECTION_BASE[];
// Declare aligned data structures for Async access in a noncacheable section
//
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index 4217085..845b68a 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -58,7 +58,7 @@
//#include <fir_data_collect.h>
#include <pss_service_codes.h>
-extern void __ssx_boot;
+extern uint32_t __ssx_boot; // Function address is 32 bits
extern uint32_t G_occ_phantom_critical_count;
extern uint32_t G_occ_phantom_noncritical_count;
extern uint8_t G_occ_interrupt_type;
@@ -132,7 +132,8 @@ SSX_IRQ_FAST2FULL(pmc_hw_error_fast, pmc_hw_error_isr);
*/
void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority)
{
- errlHndl_t l_err;
+ // TEMP / TODO -- Unused var
+ //errlHndl_t l_err;
//pmc_ffdc_data_t l_pmc_ffdc;
SsxMachineContext ctx;
@@ -449,9 +450,10 @@ void occ_ipc_setup()
*
* End Function Specification
*/
-/* TEMP -- NOT SUPPORTED IN PHASE1
void hmon_routine()
{
+/* TEMP -- NOT SUPPORTED IN PHASE1 */
+#if 0
static uint32_t L_critical_phantom_count = 0;
static uint32_t L_noncritical_phantom_count = 0;
static bool L_c_phantom_logged = FALSE;
@@ -497,7 +499,7 @@ void hmon_routine()
* @userdata2 non-critical count
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc interrupt with unknown source was detected
- */ /*
+ */
errlHndl_t l_err = createErrl(HMON_ROUTINE_MID, //modId
INTERNAL_FAILURE, //reasoncode
OCC_NO_EXTENDED_RC, //Extended reason code
@@ -528,8 +530,9 @@ void hmon_routine()
amec_health_check_dimm_timeout();
amec_health_check_dimm_temp();
}
+#endif
}
-*/
+
/*
@@ -570,7 +573,7 @@ void master_occ_init()
gpe_request_create(&l_request, // request
&G_async_gpe_queue0, // queue
IPC_ST_APSS_INIT_GPIO_FUNCID, // Function ID
- (uint32_t)&G_gpe_apss_initialize_gpio_args, // GPE argument_ptr
+ &G_gpe_apss_initialize_gpio_args, // GPE argument_ptr
SSX_SECONDS(5), // timeout
NULL, // callback
NULL, // callback arg
@@ -618,7 +621,7 @@ void master_occ_init()
gpe_request_create(&l_request, // request
&G_async_gpe_queue0, // queue
IPC_ST_APSS_INIT_MODE_FUNCID, // Function ID
- (uint32_t)&G_gpe_apss_set_mode_args, // GPE argument_ptr
+ &G_gpe_apss_set_mode_args, // GPE argument_ptr
SSX_SECONDS(5), // timeout
NULL, // callback
NULL, // callback arg
@@ -649,7 +652,7 @@ void master_occ_init()
gpe_request_create(&G_meas_start_request,
&G_async_gpe_queue0, // queue
IPC_ST_APSS_START_PWR_MEAS_READ_FUNCID, // entry_point
- (uint32_t)&G_gpe_start_pwr_meas_read_args, // entry_point arg
+ &G_gpe_start_pwr_meas_read_args, // entry_point arg
SSX_WAIT_FOREVER, // no timeout
NULL, // callback
NULL, // callback arg
@@ -660,7 +663,7 @@ void master_occ_init()
gpe_request_create(&G_meas_cont_request,
&G_async_gpe_queue0, // request
IPC_ST_APSS_CONTINUE_PWR_MEAS_READ_FUNCID, // entry_point
- (uint32_t)&G_gpe_continue_pwr_meas_read_args, // entry_point arg
+ &G_gpe_continue_pwr_meas_read_args, // entry_point arg
SSX_WAIT_FOREVER, // no timeout
NULL, // callback
NULL, // callback arg
@@ -671,7 +674,7 @@ void master_occ_init()
gpe_request_create(&G_meas_complete_request,
&G_async_gpe_queue0, // queue
IPC_ST_APSS_COMPLETE_PWR_MEAS_READ_FUNCID, // entry_point
- (uint32_t)&G_gpe_complete_pwr_meas_read_args, // entry_point arg
+ &G_gpe_complete_pwr_meas_read_args, // entry_point arg
SSX_WAIT_FOREVER, // no timeout
(AsyncRequestCallback)reformat_meas_data, // callback,
(void*)NULL, // callback arg
@@ -1172,8 +1175,8 @@ void Main_thread_routine(void *private)
*/
int main(int argc, char **argv)
{
- int l_ssxrc;
- int l_ssxrc2;
+ int l_ssxrc = 0;
+ int l_ssxrc2 = 0;
// ----------------------------------------------------
// Initialize TLB for Linear Window access here so we
diff --git a/src/occ_405/occ_defs.mk b/src/occ_405/occ_defs.mk
index 4c276e0..c87c44a 100644
--- a/src/occ_405/occ_defs.mk
+++ b/src/occ_405/occ_defs.mk
@@ -22,6 +22,9 @@
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG
+
+GCC-CFLAGS += -Werror
+
%.o: %.c
$(OBJDIR)/%.o: %.c
$(THCC) $(CFLAGS) $(DEFS) -o $@ $<
diff --git a/src/occ_405/pss/apss.c b/src/occ_405/pss/apss.c
index 92eda15..02cea58 100755
--- a/src/occ_405/pss/apss.c
+++ b/src/occ_405/pss/apss.c
@@ -806,9 +806,9 @@ bool apss_gpio_get(uint8_t i_pin_number, uint8_t *o_pin_value)
// Check if G_dcom_slv_inbox_rx is valid.
// The default value is all 0, so check if it's no-zero
bool l_dcom_data_valid = FALSE;
- int i=0;
// TEMP -- NO DCOM IN PHASE1
/*
+ int i=0;
for(;i<sizeof(G_dcom_slv_inbox_rx);i++)
{
if( ((char*)&G_dcom_slv_inbox_rx)[i] != 0 )
diff --git a/src/occ_405/reset.c b/src/occ_405/reset.c
index 5ec2e81..5d970b8 100755
--- a/src/occ_405/reset.c
+++ b/src/occ_405/reset.c
@@ -150,8 +150,10 @@ void reset_state_request(uint8_t i_request)
// End Function Specification
void task_check_for_checkstop(task_t *i_self)
{
-// TEMP -- NO MORE PORE
-// pore_status_t l_gpe0_status;
+/* TEMP -- NO MORE PORE / check_stop field no longer exists */
+#if 0
+ pore_status_t l_gpe0_status;
+
ocb_oisr0_t l_oisr0_status;
static bool L_checkstop_traced = FALSE;
uint8_t l_reason_code = 0;
@@ -167,7 +169,6 @@ void task_check_for_checkstop(task_t *i_self)
// Looked for a frozen GPE, a sign that the chip has stopped working or
// check-stopped. This check also looks for an interrupt status flag that
// indicates if the system has check-stopped.
-/* TEMP -- NO MORE PORE / check_stop field no longer exists
l_gpe0_status.value = in64(PORE_GPE0_STATUS);
l_oisr0_status.value = in32(OCB_OISR0);
@@ -206,7 +207,7 @@ void task_check_for_checkstop(task_t *i_self)
* @userdata1 High order word of PORE_GPE0_STATUS
* @userdata2 OCB_OISR0
* @devdesc OCC detected system checkstop
- */ /*
+ */
l_err = createErrl(MAIN_SYSTEM_HALTED_MID,
l_reason_code,
OCC_NO_EXTENDED_RC,
@@ -220,8 +221,8 @@ void task_check_for_checkstop(task_t *i_self)
// checkstop conditions and take appropriate actions.
commitErrl(&l_err);
}
-*/
}
while(0);
+#endif // #if 0
}
diff --git a/src/occ_405/rtls/rtls.c b/src/occ_405/rtls/rtls.c
index b0f7bbf..ae838bc 100755
--- a/src/occ_405/rtls/rtls.c
+++ b/src/occ_405/rtls/rtls.c
@@ -78,7 +78,7 @@ extern void arl_test(void);
void rtl_start_task(const task_id_t i_task_id)
{
errlHndl_t l_err = NULL; // Error handler
- tracDesc_t l_trace = NULL; // Temporary trace descriptor
+ const trace_descriptor_array_t* l_trace = NULL; // Temporary trace descriptor
if ( i_task_id < TASK_END )
{
@@ -126,7 +126,7 @@ void rtl_stop_task(const task_id_t i_task_id)
{
errlHndl_t l_err = NULL; // Error handler
- tracDesc_t l_trace = NULL; // Temporary trace descriptor
+ const trace_descriptor_array_t* l_trace = NULL; // Temporary trace descriptor
if ( i_task_id < TASK_END )
{
@@ -173,7 +173,7 @@ bool rtl_task_is_runnable(const task_id_t i_task_id)
{
bool task_can_run = FALSE; // Default: task can NOT run
errlHndl_t l_err = NULL; // Error handler
- tracDesc_t l_trace = NULL; // Temporary trace descriptor
+ const trace_descriptor_array_t* l_trace = NULL; // Temporary trace descriptor
if ( i_task_id < TASK_END )
{
@@ -232,7 +232,7 @@ void rtl_ocb_init(void)
{
int rc = 0;
errlHndl_t l_err = NULL;
- tracDesc_t l_trace = NULL; // Temporary trace descriptor
+ const trace_descriptor_array_t* l_trace = NULL; // Temporary trace descriptor
// Setup an OCB timer and interrupt handler
// The ocb_timer_setup will do the following:
@@ -284,12 +284,13 @@ void rtl_ocb_init(void)
// End Function Specification
void rtl_do_tick( void *private, SsxIrqId irq, int priority )
{
- uint64_t l_start = ssx_timebase_get();
+// TEMP / TODO -- Unused var warning
+// uint64_t l_start = ssx_timebase_get();
uint8_t *l_taskid_ptr = NULL; // Pointer to the current task ID in the current tick sequence
task_t *l_task_ptr = NULL; // Pointer to the currently executing task
errlHndl_t l_err = NULL; // Error handler
- tracDesc_t l_trace = NULL; // Temporary trace descriptor (replace this when tracing is implemented)
+ const trace_descriptor_array_t* l_trace = NULL; // Temporary trace descriptor (replace this when tracing is implemented)
bool l_bad_id_reported = FALSE; // Has an invalid task ID already been reported?
SsxMachineContext ctx;
@@ -409,7 +410,7 @@ void rtl_do_tick( void *private, SsxIrqId irq, int priority )
void rtl_set_task_data( const task_id_t i_task_id, void * i_data_ptr )
{
errlHndl_t l_err = NULL;
- tracDesc_t l_trace = NULL; // Temporary trace descriptor
+ const trace_descriptor_array_t* l_trace = NULL; // Temporary trace descriptor
if ( i_task_id >= TASK_END )
{
diff --git a/src/occ_405/state.c b/src/occ_405/state.c
index 1e133ad..0786c15 100755
--- a/src/occ_405/state.c
+++ b/src/occ_405/state.c
@@ -246,7 +246,8 @@ errlHndl_t SMGR_observation_to_standby()
errlHndl_t SMGR_observation_to_active()
{
errlHndl_t l_errlHndl = NULL;
-/* TEMP -- UNNECCESSARY IN PHASE1
+/* TEMP -- UNNECCESSARY IN PHASE1 */
+#if 0
static bool l_error_logged = FALSE; // To prevent trace and error log happened over and over
int l_extRc = OCC_NO_EXTENDED_RC;
int l_rc = 0;
@@ -287,8 +288,7 @@ errlHndl_t SMGR_observation_to_active()
l_extRc = ERC_GENERIC_TIMEOUT;
break;
}
-// TEMP -- We don't support Pstates in Phase1
-// proc_gpsm_dcm_sync_enable_pstates_smh();
+ proc_gpsm_dcm_sync_enable_pstates_smh();
ssx_sleep(SSX_MICROSECONDS(500));
}
if(proc_is_hwpstate_enabled() && G_sysConfigData.system_type.kvm)
@@ -313,7 +313,6 @@ errlHndl_t SMGR_observation_to_active()
rtl_clr_run_mask_deferred(RTL_FLAG_OBS);
rtl_set_run_mask_deferred(RTL_FLAG_ACTIVE);
-/* TEMP -- NOT SUPPORTED IN PHASE1
// Ensure that the dpll override (enabled when mfg biases freq) has been disabled.
int l_core;
uint32_t l_configured_cores;
@@ -332,7 +331,6 @@ errlHndl_t SMGR_observation_to_active()
break;
}
}
-*/ /*
if(!l_rc)
{
@@ -353,7 +351,6 @@ errlHndl_t SMGR_observation_to_active()
TRAC_IMP("OCC configuration view: G_present_hw_cores=0x%8.8x, G_present_cores=0x%8.8x",
G_present_hw_cores, G_present_cores);
-/* TEMP -- NOT SUPPORTED IN PHASE1
// Setup the pcbs heartbeat timer
l_rc = pcbs_hb_config(1, // enable = yes
l_cfgd_cores,
@@ -376,7 +373,7 @@ errlHndl_t SMGR_observation_to_active()
PCBS_HEARBEAT_TIME_US,
l_actual_pcbs_hb_time);
}
-*/ /*
+
// TODO: #state_c_001 Manually configuring the PMC
// heartbeat until pmc_hb_config is shown to be working
// Reference SW238882 for more information on updates needed in
@@ -434,7 +431,7 @@ errlHndl_t SMGR_observation_to_active()
* @userdata2 valid states
* @userdata4 ERC_STATE_FROM_OBS_TO_STB_FAILURE
* @devdesc Failed changing from observation to standby
- */ /*
+ */
l_errlHndl = createErrl(MAIN_STATE_TRANSITION_MID, //modId
INTERNAL_FAILURE, //reasoncode
l_extRc, //Extended reason code
@@ -450,7 +447,7 @@ errlHndl_t SMGR_observation_to_active()
ERRL_COMPONENT_ID_FIRMWARE,
ERRL_CALLOUT_PRIORITY_HIGH);
}
-*/
+#endif
return l_errlHndl;
}
diff --git a/src/occ_405/thread/threadSch.c b/src/occ_405/thread/threadSch.c
index 47df432..78310ce 100755
--- a/src/occ_405/thread/threadSch.c
+++ b/src/occ_405/thread/threadSch.c
@@ -195,7 +195,7 @@ void initThreadScheduler(void)
// Create error log and log it
// TODO use correct trace
- tracDesc_t l_trace = NULL;
+ const trace_descriptor_array_t* l_trace = NULL;
/* @
* @errortype
@@ -249,7 +249,7 @@ void threadSwapcallback(void * arg)
if(G_threadSwapErrlCounter == 0)
{
// TODO use correct trace
- tracDesc_t l_trace = NULL;
+ const trace_descriptor_array_t* l_trace = NULL;
/*
* @errortype
diff --git a/src/occ_405/thread/thrm_thread.c b/src/occ_405/thread/thrm_thread.c
index b7a6100..853cf0e 100755
--- a/src/occ_405/thread/thrm_thread.c
+++ b/src/occ_405/thread/thrm_thread.c
@@ -83,8 +83,10 @@ uint8_t THRM_thread_get_cooling_request()
// End Function Specification
errlHndl_t thrm_thread_load_thresholds()
{
-/* TEMP -- THRM THREAD NOT YET ENABLED (NEED SENSOR / AMEC)
errlHndl_t l_err = NULL;
+
+/* TEMP -- THRM THREAD NOT YET ENABLED (NEED SENSOR / AMEC) */
+#if 0
cmdh_thrm_thresholds_t *l_data = NULL;
uint8_t i = 0;
@@ -150,9 +152,9 @@ errlHndl_t thrm_thread_load_thresholds()
i);
}
}while(0);
+#endif
- return(l_err);
-*/
+ return l_err;
}
@@ -330,7 +332,8 @@ BOOLEAN thrm_thread_vrm_fan_control(const uint16_t i_vrfan)
// End Function Specification
void thrm_thread_main()
{
-/* TEMP -- THRM THREAD NOT ENABLED YET (NEED SENSOR / AMEC)
+/* TEMP -- THRM THREAD NOT ENABLED YET (NEED SENSOR / AMEC) */
+#if 0
errlHndl_t l_err = NULL;
BOOLEAN l_IncreaseFans = FALSE;
sensor_t *l_sensor = NULL;
@@ -434,7 +437,7 @@ void thrm_thread_main()
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc Request a fan increase and fan is already in full speed
*
- */ /*
+ */
l_err = createErrl(THRD_THERMAL_MAIN, //modId
FAN_FULL_SPEED, //reasoncode
OCC_NO_EXTENDED_RC, //Extended reason code
@@ -458,5 +461,5 @@ void thrm_thread_main()
}
}
}
-*/
+#endif
}
diff --git a/src/occ_405/timer/timer.c b/src/occ_405/timer/timer.c
index 6f435aa..4b0e1b1 100755
--- a/src/occ_405/timer/timer.c
+++ b/src/occ_405/timer/timer.c
@@ -170,11 +170,13 @@ void initWatchdogTimers()
// End Function Specification
void task_poke_watchdogs(struct task * i_self)
{
+/* TEMP/TODO: Not Ready yet: PMC => PGPE */
+#if 0
// Read the PMC status register on every RTL, this is how the OCC
// generates a PMC hearbeat.
pmc_status_reg_t psr;
-// TMP: Not Ready yet: PMC => PGPE
-// psr.value = in32(PMC_STATUS_REG);
+ psr.value = in32(PMC_STATUS_REG);
+#endif
}
// Function Specification
diff --git a/src/occ_405/trac/trac_interface.c b/src/occ_405/trac/trac_interface.c
index 3479244..a0b4d3a 100755
--- a/src/occ_405/trac/trac_interface.c
+++ b/src/occ_405/trac/trac_interface.c
@@ -444,7 +444,7 @@ UINT trac_write_int(const trace_descriptor_array_t *io_td,const trace_hash_val i
// Save to Circular Buffer
l_rc = trac_write_data_to_circular(&l_cir_data_in);
- g_isr_circular_header.head = (++g_isr_circular_header.head) % CIRCULAR_BUFFER_SIZE;
+ g_isr_circular_header.head = (g_isr_circular_header.head + 1) % CIRCULAR_BUFFER_SIZE;
g_isr_circular_header.entryCount++;
if(l_rc != SUCCESS)
@@ -585,140 +585,7 @@ UINT trac_write_int(const trace_descriptor_array_t *io_td,const trace_hash_val i
return(l_rc);
}
-
-// Function Specification
-//
-// Name: trac_write_bin
-//
-// Description:
-//
-// End Function Specification
-UINT trac_write_bin(const trace_descriptor_array_t *io_td,const trace_hash_val i_hash,
- const ULONG i_line,
- const void *i_ptr,
- const ULONG i_size)
-{
- /*------------------------------------------------------------------------*/
- /* Local Variables */
- /*------------------------------------------------------------------------*/
- UINT l_rc = 0;
- ULONG l_entry_size = 0;
- trace_bin_entry_t l_entry;
- SsxMachineContext l_ctx = 0;
- /*------------------------------------------------------------------------*/
- /* Code */
- /*------------------------------------------------------------------------*/
-
- if((io_td == NULL) || (i_ptr == NULL) || (i_size == 0))
- {
- l_rc = TRAC_INVALID_PARM;
- }
- else
- {
- // Calculate total space needed
- l_entry_size = sizeof(trace_entry_stamp_t);
- l_entry_size += sizeof(trace_entry_head_t);
-
- // We always add the size of the entry at the end of the trace entry
- // so the parsing tool can easily walk the trace buffer stack so we
- // need to add that on to total size
- l_entry_size += sizeof(ULONG);
-
- // Now add on size for actual size of the binary data
- l_entry_size += i_size;
-
- // Word align the entry
- l_entry_size = (l_entry_size + 3) & ~3;
-
- // Fill in the entry structure
- //l_entry.stamp.tid = (ULONG)tx_thread_identify(); // What is response to this in AME code?
- l_entry.stamp.tid = 0; // What is response to this in AME code?
-
- // Length is equal to size of data
- l_entry.head.length = i_size;
- l_entry.head.tag = TRACE_FIELDBIN;
- l_entry.head.hash = i_hash;
- l_entry.head.line = i_line;
-
- // We now have total size and need to reserve a part of the trace
- // buffer for this
-
- // CRITICAL REGION START
- // Disable non-critical interrupts if thread context
- if (__ssx_kernel_context_thread())
- ssx_critical_section_enter(SSX_NONCRITICAL, &l_ctx);
-
- l_rc = ssx_semaphore_pend(io_td->sem,TRAC_INTF_MUTEX_TIMEOUT);
-
- if(l_rc != SSX_OK)
- {
- // Badness
- FIELD("trac_write_bin: Failed to get mutex");
- }
- else
- {
- // Capture the time. Note the time stamp is split into tbh (upper) and
- // tbl (lower), both of which are 32 bits each. The ssx_timebase_get
- // call returns a uint64_t
-
- uint64_t l_time = ssx_timebase_get();
- l_entry.stamp.tbh = l_time / SSX_TIMEBASE_FREQUENCY_HZ; // seconds
- l_entry.stamp.tbl = ((l_time % SSX_TIMEBASE_FREQUENCY_HZ)*1000000000) // nanoseconds
- /SSX_TIMEBASE_FREQUENCY_HZ;
-
- // Increment trace counter
- (*io_td->entry)->te_count++;;
-
- // First write the header
- l_rc = trac_write_data(io_td,
- (void *)&l_entry,
- sizeof(l_entry));
- do
- {
- if(l_rc != SUCCESS)
- {
- // Badness - Not much we can do on trace failure. Can't log error
- // because of recursion concerns. Luckily a trace error is not critical.
- FIELD("trac_write_bin: Failed in call to trac_write_data - 1()");
- break;
- }
-
- // Now write the actual binary data
- l_rc = trac_write_data(io_td,
- i_ptr,
- i_size);
- if(l_rc != SUCCESS)
- {
- // Badness - Not much we can do on trace failure. Can't log error
- // because of recursion concerns. Luckily a trace error is not critical.
- FIELD("trac_write_bin: Failed in call to trac_write_data - 2()");
- break;
- }
-
- // Now write the size at the end
- l_rc = trac_write_data(io_td,
- (void *)&l_entry_size,
- sizeof(l_entry_size));
- if(l_rc != SUCCESS)
- {
- // Badness - Not much we can do on trace failure. Can't log error
- // because of recursion concerns. Luckily a trace error is not critical.
- FIELD("trac_write_bin: Failed in call to trac_write_data - 3()");
- break;
- }
- }
- while(FALSE);
-
- ssx_semaphore_post(io_td->sem);
- // Re-enable non-critical interrupts if thread context
- if (__ssx_kernel_context_thread())
- ssx_critical_section_exit(&l_ctx);
- }
- // CRITICAL REGION END
- }
-
- return(l_rc);
-}
+// NOTE: Removed trac_write_bin because it was unused and unsafe
// Function Specification
//
diff --git a/src/occ_405/trac/trac_interface.h b/src/occ_405/trac/trac_interface.h
index 5fd880a..6016f69 100755
--- a/src/occ_405/trac/trac_interface.h
+++ b/src/occ_405/trac/trac_interface.h
@@ -292,25 +292,6 @@ UINT trac_write_int(const trace_descriptor_array_t *io_td,const trace_hash_val i
const ULONG i_4,const ULONG i_5
);
-
-/*
- * Trace binary data to buffer.
- *
- * This function assumes i_td has been initialized.
- *
- * param io_td Initialized trace descriptor pointer to buffer to trace to.
- * param i_hash Hash value to be recorded for this trace.
- * param i_line Line number trace is occurring on.
- * param i_ptr Pointer to binary data to trace.
- * param i_size Size of data to copy from i_ptr.
- *
- * return Non-zero return code on error.
- */
-UINT trac_write_bin(const trace_descriptor_array_t *io_td,const trace_hash_val i_hash,
- const ULONG i_line,
- const void *i_ptr,
- const ULONG i_size);
-
//*************************************************************************
// Functions
//*************************************************************************
diff --git a/src/occ_gpe0/apss_init.c b/src/occ_gpe0/apss_init.c
index 39aeb79..f72f776 100644
--- a/src/occ_gpe0/apss_init.c
+++ b/src/occ_gpe0/apss_init.c
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_gpe0/apss_init.c $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
#include "pk.h"
#include "ppe42_scom.h"
#include "ipc_api.h"
diff --git a/src/occ_gpe0/apss_util.c b/src/occ_gpe0/apss_util.c
index 04e9879..824d8dc 100644
--- a/src/occ_gpe0/apss_util.c
+++ b/src/occ_gpe0/apss_util.c
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_gpe0/apss_util.c $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
#include "pk.h"
#include "ppe42_scom.h"
@@ -51,7 +75,7 @@ void apss_set_ffdc(GpeErrorStruct *o_error, uint32_t i_addr, uint32_t i_rc, uint
int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint8_t timeout)
{
- int i;
+ int i = 0;
int rc;
uint64_t status;
diff --git a/src/occ_gpe0/apss_util.h b/src/occ_gpe0/apss_util.h
index 1c53cde..9d0a763 100644
--- a/src/occ_gpe0/apss_util.h
+++ b/src/occ_gpe0/apss_util.h
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_gpe0/apss_util.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef _APSS_UTIL_H
#define _APSS_UTIL_H
@@ -16,4 +40,6 @@ asm volatile \
: [dec_var]"=r"(reg_var) \
);
+void busy_wait(uint32_t t_microseconds);
+
#endif //_APSS_UTIL_H
diff --git a/src/occ_gpe0/img_defs.mk b/src/occ_gpe0/img_defs.mk
index 674765d..ade3c6b 100644
--- a/src/occ_gpe0/img_defs.mk
+++ b/src/occ_gpe0/img_defs.mk
@@ -191,7 +191,7 @@ GCC-CFLAGS += -Wall -fsigned-char -msoft-float \
-ffixed-r22 -ffixed-r23 -ffixed-r24 -ffixed-r25 \
-ffixed-r26 -ffixed-r27 \
-ffixed-cr1 -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 \
- -ffixed-cr5 -ffixed-cr6 -ffixed-cr7
+ -ffixed-cr5 -ffixed-cr6 -ffixed-cr7 -Werror
CFLAGS = -c $(GCC-CFLAGS) $(PIPE-CFLAGS) $(GCC-O-LEVEL) $(INCLUDES)
diff --git a/src/occ_gpe0/pk_app_cfg.h b/src/occ_gpe0/pk_app_cfg.h
index e022118..8f1feec 100644
--- a/src/occ_gpe0/pk_app_cfg.h
+++ b/src/occ_gpe0/pk_app_cfg.h
@@ -38,7 +38,7 @@
#ifndef SIMICS_ENVIRONMENT
#define SIMICS_ENVIRONMENT 1
-#warning Building for Simics!
+#pragma message "Building for Simics!"
#endif
/// Static configuration data for external interrupts:
diff --git a/src/occ_gpe1/img_defs.mk b/src/occ_gpe1/img_defs.mk
index 041279f..fec6d69 100644
--- a/src/occ_gpe1/img_defs.mk
+++ b/src/occ_gpe1/img_defs.mk
@@ -1,3 +1,27 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/occ_gpe1/img_defs.mk $
+#
+# OpenPOWER OnChipController Project
+#
+# Contributors Listed Below - COPYRIGHT 2015
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
# Make header for GPE PK builds
#
# The application may define the following variables to control the
@@ -167,7 +191,7 @@ GCC-CFLAGS += -Wall -fsigned-char -msoft-float \
-ffixed-r22 -ffixed-r23 -ffixed-r24 -ffixed-r25 \
-ffixed-r26 -ffixed-r27 \
-ffixed-cr1 -ffixed-cr2 -ffixed-cr3 -ffixed-cr4 \
- -ffixed-cr5 -ffixed-cr6 -ffixed-cr7
+ -ffixed-cr5 -ffixed-cr6 -ffixed-cr7 -Werror
CFLAGS = -c $(GCC-CFLAGS) $(PIPE-CFLAGS) $(GCC-O-LEVEL) $(INCLUDES)
diff --git a/src/occ_gpe1/pk_app_cfg.h b/src/occ_gpe1/pk_app_cfg.h
index c5e72eb..2b7806a 100644
--- a/src/occ_gpe1/pk_app_cfg.h
+++ b/src/occ_gpe1/pk_app_cfg.h
@@ -1,3 +1,27 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_gpe1/pk_app_cfg.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
#ifndef __PK_APP_CFG_H__
#define __PK_APP_CFG_H__
//-----------------------------------------------------------------------------
@@ -14,7 +38,7 @@
#ifndef SIMICS_ENVIRONMENT
#define SIMICS_ENVIRONMENT 1
-#warning Building for Simics!
+#pragma message "Building for Simics!"
#endif
/// Static configuration data for external interrupts:
OpenPOWER on IntegriCloud