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-rwxr-xr-xsrc/common/gpe_export.h2
-rwxr-xr-xsrc/occ_405/main.c7
-rw-r--r--src/occ_gpe0/gpe_util.c33
-rw-r--r--src/ppe/pk/ppe42/ppe42_core.c4
4 files changed, 21 insertions, 25 deletions
diff --git a/src/common/gpe_export.h b/src/common/gpe_export.h
index 2cc9191..0957175 100755
--- a/src/common/gpe_export.h
+++ b/src/common/gpe_export.h
@@ -58,7 +58,7 @@ typedef struct nop
typedef struct gpe_shared_data
{
- uint32_t nest_freq_div; // Nest freq / 4
+ uint32_t nest_freq_div; // Nest freq / 64
uint32_t spipss_spec_p9; // Which APSS spec to use
uint32_t fir_heap_buffer_ptr;
uint32_t fir_params_buffer_ptr;
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index 35267b7..ad09280 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -2071,9 +2071,10 @@ int main(int argc, char **argv)
0,
l_tb_freq_hz);
- // Store the nest / 4 frequency in shared SRAM so the GPEs
- // can be initialized with the correct timebase as well.
- G_shared_gpe_data.nest_freq_div = l_tb_freq_hz;
+ // The GPEs are configured to use the OCB_OTBR as a timebase.
+ // This counter runs at (nest freq)/64. The 405 timebase frequency runs at
+ // (nest freq)/4, so divide this by 16 to get the gpe timebase frequency.
+ G_shared_gpe_data.nest_freq_div = l_tb_freq_hz/16;
CHECKPOINT(SSX_INITIALIZED);
// TRAC_XXX needs ssx services, traces can only be done after ssx_initialize
diff --git a/src/occ_gpe0/gpe_util.c b/src/occ_gpe0/gpe_util.c
index 59e44c1..2606a3d 100644
--- a/src/occ_gpe0/gpe_util.c
+++ b/src/occ_gpe0/gpe_util.c
@@ -159,29 +159,24 @@ int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint32_t i_timeout)
*/
void busy_wait(uint32_t i_microseconds)
{
- uint32_t start_decrementer_value; // The decrementer register value at the beginning
- uint32_t end_decrementer_value; // The decrementer register value at the end
- uint32_t current_decrementer_value; // The current decrementer register value
- uint32_t duration;
- MFDEC(start_decrementer_value); // get the decrementer register value at the beginning
- current_decrementer_value = start_decrementer_value;
+ uint32_t current_count = pk_timebase32_get();
+ uint32_t end_count = current_count +
+ PK_INTERVAL_SCALE((uint32_t)PK_MICROSECONDS(i_microseconds));
- // multiply the delay time by the external clock frequency (~37.5 MHz)
- duration = (i_microseconds * 37);
- duration += (i_microseconds >> 1);
-
- // Calculate the decrementer register value at the end of the busy wait period
- end_decrementer_value = start_decrementer_value - duration;
-
- if(start_decrementer_value < end_decrementer_value) // decrementer overflows during the busy wait?
+ // Handle wrap case
+ if(current_count > end_count)
{
- MFDEC(current_decrementer_value);
- while(current_decrementer_value < end_decrementer_value) // Wait until Decrementer overflows
- MFDEC(current_decrementer_value);
+ // let counter roll over
+ while(current_count > end_count)
+ {
+ current_count = pk_timebase32_get();
+ }
}
- while (current_decrementer_value > end_decrementer_value) // Wait until end_decrementer_value is reached
- MFDEC(current_decrementer_value);
+ while (current_count < end_count)
+ {
+ current_count = pk_timebase32_get();
+ }
}
/*
diff --git a/src/ppe/pk/ppe42/ppe42_core.c b/src/ppe/pk/ppe42/ppe42_core.c
index 36a153d..b659aa6 100644
--- a/src/ppe/pk/ppe42/ppe42_core.c
+++ b/src/ppe/pk/ppe42/ppe42_core.c
@@ -128,9 +128,9 @@ __pk_schedule_hardware_timeout(PkTimebase timeout)
{
diff = (timeout - now);
- if (diff > 0xfffffffful)
+ if (diff > 0xffff0000ull)
{
- new_dec = 0xffffffff;
+ new_dec = 0xffff0000;
}
else
{
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