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authormbroyles <mbroyles@us.ibm.com>2017-02-27 11:53:37 -0600
committerMartha Broyles <mbroyles@us.ibm.com>2017-02-27 17:44:41 -0500
commit525318b3a87d45d1158b720264cbce84095809d4 (patch)
treeb904c05ce85d773d7e36f8a558d2c8c1734c5aa4 /src
parent77007965fd05df5175b7b56ef6a6410f1b8a47c2 (diff)
downloadtalos-occ-525318b3a87d45d1158b720264cbce84095809d4.tar.gz
talos-occ-525318b3a87d45d1158b720264cbce84095809d4.zip
Mode support with WOF
Change-Id: I5f58a2b8444f151d4c7b0367137dd8c700442538 RTC: 168025 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/37109 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Diffstat (limited to 'src')
-rwxr-xr-xsrc/occ_405/amec/amec_freq.c12
-rwxr-xr-xsrc/occ_405/amec/amec_slave_smh.c59
-rwxr-xr-xsrc/occ_405/mode.c223
-rwxr-xr-xsrc/occ_405/mode.h21
-rwxr-xr-xsrc/occ_405/thread/chom.c14
-rw-r--r--src/occ_405/wof/wof.h4
6 files changed, 204 insertions, 129 deletions
diff --git a/src/occ_405/amec/amec_freq.c b/src/occ_405/amec/amec_freq.c
index 916b319..b7417ef 100755
--- a/src/occ_405/amec/amec_freq.c
+++ b/src/occ_405/amec/amec_freq.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -172,13 +172,19 @@ errlHndl_t amec_set_freq_range(const OCC_MODE i_mode)
{
l_freq_min = G_sysConfigData.sys_mode_freq.table[OCC_MODE_MIN_FREQUENCY];
- // Set Max frequency (ultra turbo freq if wof enabled, to turbo freq otherwise)
+ // Set Max frequency (ultra turbo freq if wof enabled, to turbo freq otherwise)
l_freq_max = G_proc_fmax_mhz;
}
else if( VALID_MODE(i_mode) ) // Set to Max Freq Range for this mode
{
l_freq_min = G_sysConfigData.sys_mode_freq.table[OCC_MODE_MIN_FREQUENCY];
- l_freq_max = G_sysConfigData.sys_mode_freq.table[i_mode];
+
+ // Use max frequency for performance modes and FMF
+ if( (i_mode == OCC_MODE_NOM_PERFORMANCE) || (i_mode == OCC_MODE_MAX_PERFORMANCE) ||
+ (i_mode == OCC_MODE_FMF) )
+ l_freq_max = G_proc_fmax_mhz;
+ else
+ l_freq_max = G_sysConfigData.sys_mode_freq.table[i_mode];
}
if( (l_freq_min == 0) || (l_freq_max == 0) )
diff --git a/src/occ_405/amec/amec_slave_smh.c b/src/occ_405/amec/amec_slave_smh.c
index 2f28289..c2daa54 100755
--- a/src/occ_405/amec/amec_slave_smh.c
+++ b/src/occ_405/amec/amec_slave_smh.c
@@ -248,7 +248,6 @@ void amec_slv_check_apss_fail(void)
l_pstate = proc_freq2pstate(l_pmax_rail_freq);
// Set the Pmax clip via PGPE
- // There is no Pmax "rail" in P9, just set clips via PGPE
amec_set_pmax_clip(l_pstate);
L_lower_pmax_rail = TRUE;
@@ -368,11 +367,7 @@ void amec_slv_state_0(void)
{
AMEC_DBG("\tAMEC Slave State 0\n");
- //-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
- //-------------------------------------------------------
-
-/* Not yet supported
+/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
@@ -417,12 +412,7 @@ void amec_slv_state_1(void)
{
AMEC_DBG("\tAMEC Slave State 1\n");
- //-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
- //-------------------------------------------------------
-
-
-/* Not yet supported
+/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
@@ -447,11 +437,7 @@ void amec_slv_state_2(void)
{
AMEC_DBG("\tAMEC Slave State 2\n");
- //-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
- //-------------------------------------------------------
-
-/* Not yet supported
+/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
@@ -474,13 +460,9 @@ void amec_slv_state_3(void)
AMEC_DBG("\tAMEC Slave State 3\n");
//-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
- //-------------------------------------------------------
-
- //-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
-/* Not yet supported
+/* Not yet supported TODO Centaur support RTC 163359
amec_update_centaur_sensors(CENTAUR_3);
//-------------------------------------------------------
@@ -504,13 +486,9 @@ void amec_slv_state_4(void)
{
AMEC_DBG("\tAMEC Slave State 4\n");
+/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
- //-------------------------------------------------------
-
-/* Not yet supported
- //-------------------------------------------------------
- // Update Centaur sensors (for this tick)
+ // Update Centaur sensors (for this tick)
//-------------------------------------------------------
amec_update_centaur_sensors(CENTAUR_4);
*/
@@ -567,20 +545,15 @@ void amec_slv_state_5(void)
AMEC_DBG("\tAMEC Slave State 5\n");
//-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
+ // Update Centaur sensors (for this tick) TODO Centaur support RTC 163359
//-------------------------------------------------------
-
-/* Not yet supported
- //-------------------------------------------------------
- // Update Centaur sensors (for this tick)
- //-------------------------------------------------------
- amec_update_centaur_sensors(CENTAUR_5);
+// amec_update_centaur_sensors(CENTAUR_5);
//-------------------------------------------------------
// Update partition sensors for DPS algorithms (for this tick)
//-------------------------------------------------------
- amec_dps_main();
-*/
+// amec_dps_main();
+
}
@@ -597,11 +570,7 @@ void amec_slv_state_6(void)
{
AMEC_DBG("\tAMEC Slave State 6\n");
- //-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
- //-------------------------------------------------------
-
-/* Not yet supported
+/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
@@ -621,11 +590,7 @@ void amec_slv_state_7(void)
{
AMEC_DBG("\tAMEC Slave State 7\n");
- //-------------------------------------------------------
- // Update Proc Core sensors (for this tick)
- //-------------------------------------------------------
-
-/* Not yet supported
+/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
diff --git a/src/occ_405/mode.c b/src/occ_405/mode.c
index d83485e..ee7a13b 100755
--- a/src/occ_405/mode.c
+++ b/src/occ_405/mode.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -33,6 +33,7 @@
#include "amec_freq.h"
#include "amec_part.h"
#include "amec_data.h"
+#include "amec_sys.h"
errlHndl_t SMGR_mode_transition_to_nominal();
errlHndl_t SMGR_mode_transition_to_powersave();
@@ -40,6 +41,10 @@ errlHndl_t SMGR_mode_transition_to_dynpowersave();
errlHndl_t SMGR_mode_transition_to_dynpowersave_fp();
errlHndl_t SMGR_mode_transition_to_turbo();
errlHndl_t SMGR_mode_transition_to_ffo();
+errlHndl_t SMGR_mode_transition_to_fmf();
+errlHndl_t SMGR_mode_transition_to_nom_perf();
+errlHndl_t SMGR_mode_transition_to_max_perf();
+
// Mode that OCC is currently in
OCC_MODE G_occ_internal_mode = OCC_MODE_NOCHANGE;
@@ -74,6 +79,9 @@ const smgr_state_trans_t G_smgr_mode_trans[] =
{OCC_MODE_ALL, OCC_MODE_DYN_POWER_SAVE_FP, &SMGR_mode_transition_to_dynpowersave_fp},
{OCC_MODE_ALL, OCC_MODE_TURBO, &SMGR_mode_transition_to_turbo},
{OCC_MODE_ALL, OCC_MODE_FFO, &SMGR_mode_transition_to_ffo},
+ {OCC_MODE_ALL, OCC_MODE_FMF, &SMGR_mode_transition_to_fmf},
+ {OCC_MODE_ALL, OCC_MODE_NOM_PERFORMANCE, &SMGR_mode_transition_to_nom_perf},
+ {OCC_MODE_ALL, OCC_MODE_MAX_PERFORMANCE, &SMGR_mode_transition_to_max_perf},
};
const uint8_t G_smgr_mode_trans_count = sizeof(G_smgr_mode_trans)/sizeof(smgr_state_trans_t);
@@ -166,83 +174,68 @@ errlHndl_t SMGR_set_mode( const OCC_MODE i_mode )
}
}
- switch (l_mode)
+ // Change Mode via Transition Function
+ do
{
- case OCC_MODE_NOMINAL: // FALL THROUGH
- case OCC_MODE_PWRSAVE: // FALL THROUGH
- case OCC_MODE_DYN_POWER_SAVE: // FALL THROUGH
- case OCC_MODE_DYN_POWER_SAVE_FP: // FALL THROUGH
- case OCC_MODE_TURBO: // FALL THROUGH
- case OCC_MODE_FFO: // FALL THROUGH
- // Notify AMEC of mode change
-
- // Change Mode via Transition Function
- do
+ // Loop through mode transition table, and find the state
+ // transition function that matches the transition we need to do.
+ for(jj=0; jj<G_smgr_mode_trans_count; jj++)
+ {
+ if( ((G_smgr_mode_trans[jj].old_state == G_occ_internal_mode)
+ || (G_smgr_mode_trans[jj].old_state == OCC_MODE_ALL) )
+ && (G_smgr_mode_trans[jj].new_state == l_mode) )
{
- // Loop through mode transition table, and find the state
- // transition function that matches the transition we need to do.
- for(jj=0; jj<G_smgr_mode_trans_count; jj++)
- {
- if( ((G_smgr_mode_trans[jj].old_state == G_occ_internal_mode)
- || (G_smgr_mode_trans[jj].old_state == OCC_MODE_ALL) )
- && (G_smgr_mode_trans[jj].new_state == l_mode) )
- {
- // We found the transtion that matches, now run the function
- // that is associated with that state transition.
- if(NULL != G_smgr_mode_trans[jj].trans_func_ptr)
- {
- // Signal that we are now in a mode transition
- G_mode_transition_occuring = TRUE;
- // Run transition function
- l_errlHndl = (G_smgr_mode_trans[jj].trans_func_ptr)();
- // Signal that we are done with the transition
- G_mode_transition_occuring = FALSE;
- break;
- }
- }
- }
-
- // Check if we hit the end of the table without finding a valid
- // mode transition. If we did, log an internal error.
- if(G_smgr_mode_trans_count == jj)
+ // We found the transtion that matches, now run the function
+ // that is associated with that state transition.
+ if(NULL != G_smgr_mode_trans[jj].trans_func_ptr)
{
- TRAC_ERR("No transition (or NULL) found for the mode change\n");
-
- /* @
- * @errortype
- * @moduleid MAIN_MODE_TRANSITION_MID
- * @reasoncode INTERNAL_FAILURE
- * @userdata1 G_occ_internal_mode
- * @userdata2 l_mode
- * @userdata4 ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL
- * @devdesc no valid state transition routine found
- */
- l_errlHndl = createErrl(MAIN_MODE_TRANSITION_MID, //modId
- INTERNAL_FAILURE, //reasoncode
- ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL, //Extended reason code
- ERRL_SEV_UNRECOVERABLE, //Severity
- NULL, //Trace Buf
- DEFAULT_TRACE_SIZE, //Trace Size
- G_occ_internal_mode, //userdata1
- l_mode); //userdata2
-
- addCalloutToErrl(l_errlHndl,
- ERRL_CALLOUT_TYPE_COMPONENT_ID,
- ERRL_COMPONENT_ID_FIRMWARE,
- ERRL_CALLOUT_PRIORITY_HIGH);
+ // Signal that we are now in a mode transition
+ G_mode_transition_occuring = TRUE;
+ // Run transition function
+ l_errlHndl = (G_smgr_mode_trans[jj].trans_func_ptr)();
+ // Signal that we are done with the transition
+ G_mode_transition_occuring = FALSE;
break;
}
-
- // Update the power mode for all core groups that are following system mode
- AMEC_part_update_sysmode_policy(CURRENT_MODE());
}
- while(0);
+ }
+
+ // Check if we hit the end of the table without finding a valid
+ // mode transition. If we did, log an internal error.
+ if(G_smgr_mode_trans_count == jj)
+ {
+ TRAC_ERR("No transition (or NULL) found for the mode change\n");
+
+ /* @
+ * @errortype
+ * @moduleid MAIN_MODE_TRANSITION_MID
+ * @reasoncode INTERNAL_FAILURE
+ * @userdata1 G_occ_internal_mode
+ * @userdata2 l_mode
+ * @userdata4 ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL
+ * @devdesc no valid state transition routine found
+ */
+ l_errlHndl = createErrl(MAIN_MODE_TRANSITION_MID, //modId
+ INTERNAL_FAILURE, //reasoncode
+ ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL, //Extended reason code
+ ERRL_SEV_UNRECOVERABLE, //Severity
+ NULL, //Trace Buf
+ DEFAULT_TRACE_SIZE, //Trace Size
+ G_occ_internal_mode, //userdata1
+ l_mode); //userdata2
+
+ addCalloutToErrl(l_errlHndl,
+ ERRL_CALLOUT_TYPE_COMPONENT_ID,
+ ERRL_COMPONENT_ID_FIRMWARE,
+ ERRL_CALLOUT_PRIORITY_HIGH);
break;
- default:
- //unsupported mode
- break;
+ }
+
+ // Update the power mode for all core groups that are following system mode
+ AMEC_part_update_sysmode_policy(CURRENT_MODE());
}
+ while(0);
if(l_errlHndl)
{
@@ -278,6 +271,9 @@ errlHndl_t SMGR_mode_transition_to_nominal()
// Set Freq Mode for AMEC to use
l_errlHndl = amec_set_freq_range(OCC_MODE_NOMINAL);
+ // WOF is disabled in nominal mode
+ g_amec->wof.wof_disabled |= WOF_RC_MODE_NO_SUPPORT_MASK;
+
CURRENT_MODE() = OCC_MODE_NOMINAL;
TRAC_IMP("SMGR: Mode to Nominal Transition Completed");
@@ -301,6 +297,9 @@ errlHndl_t SMGR_mode_transition_to_powersave()
// Set Freq Mode for AMEC to use
l_errlHndl = amec_set_freq_range(OCC_MODE_PWRSAVE);
+ // WOF is disabled in SPS mode
+ g_amec->wof.wof_disabled |= WOF_RC_MODE_NO_SUPPORT_MASK;
+
CURRENT_MODE() = OCC_MODE_PWRSAVE;
TRAC_IMP("SMGR: Mode to PowerSave Transition Completed");
@@ -324,6 +323,9 @@ errlHndl_t SMGR_mode_transition_to_dynpowersave()
// Set Freq Mode for AMEC to use
l_errlHndl = amec_set_freq_range(OCC_MODE_DYN_POWER_SAVE);
+ // WOF is enabled in DPS, clear the mode bit
+ g_amec->wof.wof_disabled &= ~WOF_RC_MODE_NO_SUPPORT_MASK;
+
CURRENT_MODE() = OCC_MODE_DYN_POWER_SAVE;
TRAC_IMP("SMGR: Mode to Dynamic PowerSave-Favor Energy Transition Completed");
@@ -346,6 +348,9 @@ errlHndl_t SMGR_mode_transition_to_dynpowersave_fp()
// Set Freq Mode for AMEC to use
l_errlHndl = amec_set_freq_range(OCC_MODE_DYN_POWER_SAVE_FP);
+ // WOF is enabled in DPS-FP, clear the mode bit
+ g_amec->wof.wof_disabled &= ~WOF_RC_MODE_NO_SUPPORT_MASK;
+
CURRENT_MODE() = OCC_MODE_DYN_POWER_SAVE_FP;
TRAC_IMP("SMGR: Mode to Dynamic PowerSave-Favor Performance Transition Completed");
@@ -369,6 +374,9 @@ errlHndl_t SMGR_mode_transition_to_turbo()
// Set Freq Mode for AMEC to use
l_errlHndl = amec_set_freq_range(OCC_MODE_TURBO);
+ // WOF is disabled in turbo mode
+ g_amec->wof.wof_disabled |= WOF_RC_MODE_NO_SUPPORT_MASK;
+
CURRENT_MODE() = OCC_MODE_TURBO;
TRAC_IMP("SMGR: Mode to Turbo Transition Completed");
@@ -392,9 +400,86 @@ errlHndl_t SMGR_mode_transition_to_ffo()
// Set Freq Mode for AMEC to use
l_errlHndl = amec_set_freq_range(OCC_MODE_FFO);
+ // WOF is disabled in FFO
+ g_amec->wof.wof_disabled |= WOF_RC_MODE_NO_SUPPORT_MASK;
+
CURRENT_MODE() = OCC_MODE_FFO;
TRAC_IMP("SMGR: Mode to FFO Transition Completed");
return l_errlHndl;
}
+// Function Specification
+//
+// Name: SMGR_mode_transition_to_fmf
+//
+// Description: Transition to Fixed Maximum Frequency mode
+//
+// End Function Specification
+errlHndl_t SMGR_mode_transition_to_fmf()
+{
+ errlHndl_t l_errlHndl = NULL;
+
+ TRAC_IMP("SMGR: Mode to FMF Transition Started");
+
+ // Set Freq Mode for AMEC to use
+ l_errlHndl = amec_set_freq_range(OCC_MODE_FMF);
+
+ // WOF is enabled in FMF, clear the mode bit
+ g_amec->wof.wof_disabled &= ~WOF_RC_MODE_NO_SUPPORT_MASK;
+
+ CURRENT_MODE() = OCC_MODE_FMF;
+ TRAC_IMP("SMGR: Mode to FMF Transition Completed");
+
+ return l_errlHndl;
+}
+
+// Function Specification
+//
+// Name: SMGR_mode_transition_to_nom_perf
+//
+// Description: Transition to nominal performance mode
+//
+// End Function Specification
+errlHndl_t SMGR_mode_transition_to_nom_perf()
+{
+ errlHndl_t l_errlHndl = NULL;
+
+ TRAC_IMP("SMGR: Mode to Nominal Performance Transition Started");
+
+ // Set Freq Mode for AMEC to use
+ l_errlHndl = amec_set_freq_range(OCC_MODE_NOM_PERFORMANCE);
+
+ // WOF is enabled in nominal performance mode, clear the mode bit
+ g_amec->wof.wof_disabled &= ~WOF_RC_MODE_NO_SUPPORT_MASK;
+
+ CURRENT_MODE() = OCC_MODE_NOM_PERFORMANCE;
+ TRAC_IMP("SMGR: Mode to Nominal Performance Transition Completed");
+
+ return l_errlHndl;
+}
+
+// Function Specification
+//
+// Name: SMGR_mode_transition_to_max_perf
+//
+// Description: Transition to Maximum Performance mode
+//
+// End Function Specification
+errlHndl_t SMGR_mode_transition_to_max_perf()
+{
+ errlHndl_t l_errlHndl = NULL;
+
+ TRAC_IMP("SMGR: Mode to Maximum Performance Transition Started");
+
+ // Set Freq Mode for AMEC to use
+ l_errlHndl = amec_set_freq_range(OCC_MODE_MAX_PERFORMANCE);
+
+ // WOF is enabled in max performance mode, clear the mode bit
+ g_amec->wof.wof_disabled &= ~WOF_RC_MODE_NO_SUPPORT_MASK;
+
+ CURRENT_MODE() = OCC_MODE_MAX_PERFORMANCE;
+ TRAC_IMP("SMGR: Mode to Maximum Performance Transition Completed");
+
+ return l_errlHndl;
+}
diff --git a/src/occ_405/mode.h b/src/occ_405/mode.h
index faaf21a..aa0f07a 100755
--- a/src/occ_405/mode.h
+++ b/src/occ_405/mode.h
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -50,16 +50,13 @@ typedef enum
OCC_MODE_SAFE = 0x04,
OCC_MODE_PWRSAVE = 0x05,
OCC_MODE_DYN_POWER_SAVE = 0x06,
- OCC_MODE_MIN_FREQUENCY = 0x07,
-
- // Mode 0x08-0x0A reserved by TMGT
- // reserved = 0x08,
- // reserved = 0x09,
+ OCC_MODE_MIN_FREQUENCY = 0x07, // not a settable mode, just used to store system min freq
+ OCC_MODE_NOM_PERFORMANCE = 0x08,
+ OCC_MODE_MAX_PERFORMANCE = 0x09,
OCC_MODE_DYN_POWER_SAVE_FP = 0x0A,
OCC_MODE_FFO = 0x0B,
OCC_MODE_FMF = 0x0C,
-
- OCC_MODE_UTURBO = 0x0D,
+ OCC_MODE_UTURBO = 0x0D, // not a settable mode, just used to store UT freq
// Make sure this is after the last valid mode
OCC_MODE_COUNT,
@@ -76,8 +73,11 @@ typedef enum
(mode == OCC_MODE_TURBO) || \
(mode == OCC_MODE_PWRSAVE) || \
(mode == OCC_MODE_DYN_POWER_SAVE) || \
+ (mode == OCC_MODE_NOM_PERFORMANCE) || \
+ (mode == OCC_MODE_MAX_PERFORMANCE) || \
(mode == OCC_MODE_DYN_POWER_SAVE_FP) || \
- (mode == OCC_MODE_FFO))
+ (mode == OCC_MODE_FFO) || \
+ (mode == OCC_MODE_FMF))
// Typedef of the various internal modes that OCC can be in.
typedef enum
@@ -87,6 +87,9 @@ typedef enum
OCC_INTERNAL_MODE_DPS = 0x02,
OCC_INTERNAL_MODE_DPS_MP = 0x03,
OCC_INTERNAL_MODE_FFO = 0x04,
+ OCC_INTERNAL_MODE_NOM_PERF = 0x05,
+ OCC_INTERNAL_MODE_MAX_PERF = 0x06,
+ OCC_INTERNAL_MODE_FMF = 0x07,
OCC_INTERNAL_MODE_MAX_NUM,
OCC_INTERNAL_MODE_UNDEFINED = 0xFF
} OCC_INTERNAL_MODE;
diff --git a/src/occ_405/thread/chom.c b/src/occ_405/thread/chom.c
index 5e2d6e8..0b27956 100755
--- a/src/occ_405/thread/chom.c
+++ b/src/occ_405/thread/chom.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -225,6 +225,18 @@ void chom_update_sensors()
g_chom_pwr_modes[OCC_INTERNAL_MODE_FFO] = 1;
break;
+ case OCC_MODE_NOM_PERFORMANCE:
+ g_chom_pwr_modes[OCC_INTERNAL_MODE_NOM_PERF] = 1;
+ break;
+
+ case OCC_MODE_MAX_PERFORMANCE:
+ g_chom_pwr_modes[OCC_INTERNAL_MODE_MAX_PERF] = 1;
+ break;
+
+ case OCC_MODE_FMF:
+ g_chom_pwr_modes[OCC_INTERNAL_MODE_FMF] = 1;
+ break;
+
default:
TRAC_INFO("chom_update_sensors: Cannot record chom data for mode 0x%02X",
g_chom->sensorData[0].pwrMode.mode);
diff --git a/src/occ_405/wof/wof.h b/src/occ_405/wof/wof.h
index 897fbeb..4591d00 100644
--- a/src/occ_405/wof/wof.h
+++ b/src/occ_405/wof/wof.h
@@ -35,6 +35,8 @@
#define ACTIVE_QUAD_SZ_MAX 6
#define WOF_HEADER_SIZE 32
+#define WOF_RC_MODE_NO_SUPPORT_MASK 0x0008
+
// Structure to hold relevant data from the WOF header in Mainstore
typedef struct __attribute__ ((packed))
{
@@ -56,6 +58,8 @@ typedef struct __attribute__ ((packed))
// Structure used in g_amec
typedef struct
{
+ // Bit vector where each bit signifies a different failure case
+ uint16_t wof_disabled;
} amec_wof_t;
typedef struct
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