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author | Chris Cain <cjcain@us.ibm.com> | 2017-11-10 08:49:10 -0600 |
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committer | Christopher J. Cain <cjcain@us.ibm.com> | 2017-11-14 09:50:32 -0500 |
commit | 358d11e6aca5058871e8573038ed58830d9d9aca (patch) | |
tree | 01685d9a7a754c2a9fe44d3b9fe527bea661d413 /src | |
parent | 40fc6b399896be9ad4a77ad424f72ab2d2ae943b (diff) | |
download | talos-occ-358d11e6aca5058871e8573038ed58830d9d9aca.tar.gz talos-occ-358d11e6aca5058871e8573038ed58830d9d9aca.zip |
Stop DIMM and GPU accesses when moving to standby or safe state
Change-Id: Id8cfd8f0d4e6643921faeb69729d7e68f47ad8ed
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49552
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Diffstat (limited to 'src')
-rwxr-xr-x | src/occ_405/dimm/dimm.c | 12 | ||||
-rwxr-xr-x | src/occ_405/state.c | 17 |
2 files changed, 27 insertions, 2 deletions
diff --git a/src/occ_405/dimm/dimm.c b/src/occ_405/dimm/dimm.c index 5dac23d..bcdfb6c 100755 --- a/src/occ_405/dimm/dimm.c +++ b/src/occ_405/dimm/dimm.c @@ -702,6 +702,15 @@ void process_dimm_temp() } // end process_dimm_temp() +void disable_all_dimms() +{ + if (G_mem_monitoring_allowed) + { + TRAC_INFO("disable_all_dimms: DIMM temp collection is being stopped"); + G_mem_monitoring_allowed = false; + } + occ_i2c_lock_release(G_dimm_sm_args.i2cEngine); +} // Function Specification // @@ -746,9 +755,8 @@ void task_dimm_sm(struct task *i_self) // I2C failure occurred during a reset... INTR_TRAC_ERR("task_dimm_sm: Failure during I2C reset - memory monitoring disabled"); // release I2C lock to the host for this engine and stop monitoring - occ_i2c_lock_release(G_dimm_sm_args.i2cEngine); L_occ_owns_lock = false; - G_mem_monitoring_allowed = false; + disable_all_dimms(); } else { diff --git a/src/occ_405/state.c b/src/occ_405/state.c index 9474d0b..4fec5f8 100755 --- a/src/occ_405/state.c +++ b/src/occ_405/state.c @@ -115,6 +115,11 @@ const uint8_t G_smgr_state_trans_count = sizeof(G_smgr_state_trans)/sizeof(smgr_ uint32_t G_smgr_validate_data_active_mask = SMGR_VALIDATE_DATA_ACTIVE_MASK_HARDCODES; uint32_t G_smgr_validate_data_observation_mask = SMGR_VALIDATE_DATA_OBSERVATION_MASK_HARDCODES; + +void disable_all_dimms(); +void disable_all_gpus(); + + // Function Specification // // Name: SMGR_is_state_transitioning @@ -332,6 +337,12 @@ errlHndl_t SMGR_all_to_standby() rtl_clr_run_mask_deferred(RTL_FLAG_ACTIVE | RTL_FLAG_OBS ); rtl_set_run_mask_deferred(RTL_FLAG_STANDBY); + // Stop reading DIMM temps + disable_all_dimms(); + + // Stop monitoring GPUs + disable_all_gpus(); + // Set the actual STATE now that we have finished everything else CURRENT_STATE() = OCC_STATE_STANDBY; @@ -1141,6 +1152,12 @@ errlHndl_t SMGR_all_to_safe() // !!! There is no recovery to this except a reset !!! rtl_set_run_mask_deferred(RTL_FLAG_RST_REQ); + // Stop reading DIMM temps + disable_all_dimms(); + + // Stop monitoring GPUs + disable_all_gpus(); + // Notes: // - We can still talk to FSP // - We will still be able to go out on PIB |