diff options
| author | William Bryan <wilbryan@us.ibm.com> | 2016-04-18 17:07:34 -0500 |
|---|---|---|
| committer | William A. Bryan <wilbryan@us.ibm.com> | 2016-06-13 19:18:11 -0400 |
| commit | a12f5be3e904bf5bb7aabb978f5e4d0cf1e8b969 (patch) | |
| tree | 08e5fe4298b301d7441bbb4d450432651aefc5e6 /src/ssx/ppc32 | |
| parent | dd417235fda3a7086940b974780193e51370367c (diff) | |
| download | talos-occ-a12f5be3e904bf5bb7aabb978f5e4d0cf1e8b969.tar.gz talos-occ-a12f5be3e904bf5bb7aabb978f5e4d0cf1e8b969.zip | |
Update SSX to latest in EKB
RTC: 132999
Change-Id: I29478c074e3086e0bf09b402d55782e03cb1f787
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23394
Tested-by: FSP CI Jenkins
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Diffstat (limited to 'src/ssx/ppc32')
| -rw-r--r-- | src/ssx/ppc32/Makefile | 2 | ||||
| -rw-r--r-- | src/ssx/ppc32/div64.S | 2 | ||||
| -rw-r--r-- | src/ssx/ppc32/ppc32.h | 43 | ||||
| -rw-r--r-- | src/ssx/ppc32/ppc32_asm.h | 34 | ||||
| -rw-r--r-- | src/ssx/ppc32/ppc32_gcc.c | 146 | ||||
| -rw-r--r-- | src/ssx/ppc32/ppc32_gcc.h | 16 | ||||
| -rw-r--r-- | src/ssx/ppc32/savegpr.S | 5 | ||||
| -rw-r--r-- | src/ssx/ppc32/ssxppc32files.mk | 2 |
8 files changed, 152 insertions, 98 deletions
diff --git a/src/ssx/ppc32/Makefile b/src/ssx/ppc32/Makefile index 67541ac..eb270c7 100644 --- a/src/ssx/ppc32/Makefile +++ b/src/ssx/ppc32/Makefile @@ -5,7 +5,7 @@ # # OpenPOWER OnChipController Project # -# Contributors Listed Below - COPYRIGHT 2014,2015 +# Contributors Listed Below - COPYRIGHT 2014,2016 # [+] International Business Machines Corp. # # diff --git a/src/ssx/ppc32/div64.S b/src/ssx/ppc32/div64.S index cc6309b..f8e1b34 100644 --- a/src/ssx/ppc32/div64.S +++ b/src/ssx/ppc32/div64.S @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ diff --git a/src/ssx/ppc32/ppc32.h b/src/ssx/ppc32/ppc32.h index 0ba8a46..af01560 100644 --- a/src/ssx/ppc32/ppc32.h +++ b/src/ssx/ppc32/ppc32.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -58,8 +58,8 @@ /// ssize_t is defined explictly rather than bringing in all of <unistd.h> #ifndef __ssize_t_defined -#define __ssize_t_defined -typedef int ssize_t; + #define __ssize_t_defined + typedef int ssize_t; #endif /// A memory barrier @@ -76,23 +76,28 @@ typedef int ssize_t; /// CouNT Leading Zeros Word #define cntlzw(x) \ -({uint32_t __x = (x); \ - uint32_t __lzw; \ - asm volatile ("cntlzw %0, %1" : "=r" (__lzw) : "r" (__x)); \ - __lzw;}) + ({uint32_t __x = (x); \ + uint32_t __lzw; \ + asm volatile ("cntlzw %0, %1" : "=r" (__lzw) : "r" (__x)); \ + __lzw;}) /// CouNT Leading Zeros : uint32_t static inline int -cntlz32(uint32_t x) { +cntlz32(uint32_t x) +{ return cntlzw(x); } /// CouNT Leading Zeros : uint64_t static inline int -cntlz64(uint64_t x) { - if (x > 0xffffffff) { +cntlz64(uint64_t x) +{ + if (x > 0xffffffff) + { return cntlz32(x >> 32); - } else { + } + else + { return 32 + cntlz32(x); } } @@ -104,7 +109,7 @@ popcount32(uint32_t x) { return __builtin_popcount(x); } - + /// 64-bit population count static inline int @@ -121,27 +126,27 @@ popcount64(uint64_t x) /// 8-bit MMIO Write #define out8(addr, data) \ -do {*(volatile uint8_t *)(addr) = (data); eieio();} while(0) + do {*(volatile uint8_t *)(addr) = (data); eieio();} while(0) /// 8-bit MMIO Read #define in8(addr) \ -({uint8_t __data = *(volatile uint8_t *)(addr); eieio(); __data;}) + ({uint8_t __data = *(volatile uint8_t *)(addr); eieio(); __data;}) /// 16-bit MMIO Write #define out16(addr, data) \ -do {*(volatile uint16_t *)(addr) = (data); eieio();} while(0) + do {*(volatile uint16_t *)(addr) = (data); eieio();} while(0) /// 16-bit MMIO Read #define in16(addr) \ -({uint16_t __data = *(volatile uint16_t *)(addr); eieio(); __data;}) + ({uint16_t __data = *(volatile uint16_t *)(addr); eieio(); __data;}) /// 32-bit MMIO Write #define out32(addr, data) \ -do {*(volatile uint32_t *)(addr) = (data); eieio();} while(0) + do {*(volatile uint32_t *)(addr) = (data); eieio();} while(0) /// 32-bit MMIO Read #define in32(addr) \ -({uint32_t __data = *(volatile uint32_t *)(addr); eieio(); __data;}) + ({uint32_t __data = *(volatile uint32_t *)(addr); eieio(); __data;}) /// 64-bit MMIO Write #define out64(addr, data) \ @@ -178,6 +183,7 @@ do {*(volatile uint32_t *)(addr) = (data); eieio();} while(0) #else // __ASSEMBLER__ /// Store revision information as a global string constant +// *INDENT-OFF* .macro .revision_string, symbol:req, rev:req .pushsection .rodata .balign 4 @@ -187,6 +193,7 @@ do {*(volatile uint32_t *)(addr) = (data); eieio();} while(0) .balign 4 .popsection .endm +// *INDENT-ON* #endif // __ASSEMBLER__ diff --git a/src/ssx/ppc32/ppc32_asm.h b/src/ssx/ppc32/ppc32_asm.h index b681e88..5287806 100644 --- a/src/ssx/ppc32/ppc32_asm.h +++ b/src/ssx/ppc32/ppc32_asm.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -55,11 +55,11 @@ /// absolute or relocatable expression. /// /// Forms: -/// +/// /// \b _lbzi \a dreg, \a areg, \a addr - Load Byte and Zero from Immediate address \n /// \b _lhzi \a dreg, \a areg, \a addr - Load Halfword and Zero from Immediate address \n /// \b _lwzi \a dreg, \a areg, \a addr - Load Word and Zero from Immediate address \n -/// +/// /// /// \section _stxi _st<w,h,b>i - STore register to Immediate address /// @@ -75,7 +75,7 @@ /// absolute or relocatable expression. /// /// Forms: -/// +/// /// \b _stbi \a dreg, \a areg, \a addr - STore Byte to Immediate address \n /// \b _sthi \a dreg, \a areg, \a addr - STore Halfword to Immediate address \n /// \b _stwi \a dreg, \a areg, \a addr - STore Word to Immediate address \n @@ -99,8 +99,8 @@ /// \arg \c addr A 32-bit immediate address, assumed to be a /// relocatable address in one of the small data sections. /// -/// Forms: -/// +/// Forms: +/// /// \b _lbzsd \a dreg, \a addr - Load Byte and Zero from Small Data area \n /// \b _lhzsd \a dreg, \a addr - Load Halfword and Zero from Small Data area \n /// \b _lwzsd \a dreg, \a addr - Load Word and Zero from Small Data area \n @@ -158,8 +158,8 @@ /// \arg \c ra Register containing the counter address at entry /// /// \a rs and \a ra must be unique. At the end of the macro the count -/// is updated to memory and \a ra is unmodified. -/// +/// is updated to memory and \a ra is unmodified. +/// /// /// \section _setclear_bits Set/Clear/Copy Bits from Immediate Positions /// @@ -183,7 +183,7 @@ /// \b _copyfield \a rd, \a rs, \a n, \a b - Copy an n-bit field from \a rs to /// \a rd starting from bit \a b \n /// -/// +/// /// \section pseudo_ops Assembler Pseudo-Ops Macros /// /// Several macros define new 'pseudo-ops'. @@ -209,7 +209,7 @@ /// \b .function \a symbol - Define a local function \a symbol \n /// \b .global_function \a symbol - Define a global function \a symbol \n /// -/// +/// /// \subsection epilogue .epilogue /// /// The \c .epilogue pseudo-op adds size and type information for @@ -225,6 +225,7 @@ /// \cond #ifdef __ASSEMBLER__ +// *INDENT-OFF* ### **************************************************************************** ### _l<b,h,w>zi @@ -239,7 +240,7 @@ lbzu \dreg, \addr@l(\areg) .endif .endm - + .macro _lhzi dreg, areg, addr lis \areg, \addr@ha .ifc \areg, \dreg @@ -248,7 +249,7 @@ lhzu \dreg, \addr@l(\areg) .endif .endm - + .macro _lwzi dreg, areg, addr lis \areg, \addr@ha .ifc \areg, \dreg @@ -265,7 +266,7 @@ lis \areg, \addr@ha stbu \dreg, \addr@l(\areg) .endm - + .macro _sthi dreg, areg, addr .ifc \areg, \dreg .err @@ -273,7 +274,7 @@ lis \areg, \addr@ha sthu \dreg, \addr@l(\areg) .endm - + .macro _stwi dreg, areg, addr .ifc \areg, \dreg .err @@ -419,12 +420,13 @@ .size \symbol, . - \symbol .endm +// *INDENT-ON* #endif /* __ASSEMBLER__ */ /// \endcond - + // Local Variables: // mode:asm // End: - + #endif /* __PPC32_ASM_H__ */ diff --git a/src/ssx/ppc32/ppc32_gcc.c b/src/ssx/ppc32/ppc32_gcc.c index 8fe9bf5..2e20116 100644 --- a/src/ssx/ppc32/ppc32_gcc.c +++ b/src/ssx/ppc32/ppc32_gcc.c @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -55,16 +55,20 @@ __lshrdi3(uint64_t x, int i) { Uint64 input, result; - if (i == 0) { + if (i == 0) + { return x; } input.value = x; - if (i >= 32) { + if (i >= 32) + { result.word[0] = 0; result.word[1] = input.word[0] >> (i - 32); - } else { + } + else + { result.word[0] = input.word[0] >> i; result.word[1] = (input.word[1] >> i) | (input.word[0] << (32 - i)); } @@ -83,16 +87,20 @@ __ashldi3(uint64_t x, int i) { Uint64 input, result; - if (i == 0) { + if (i == 0) + { return x; } input.value = x; - if (i >= 32) { + if (i >= 32) + { result.word[1] = 0; result.word[0] = input.word[1] << (i - 32); - } else { + } + else + { result.word[1] = input.word[1] << i; result.word[0] = (input.word[0] << i) | (input.word[1] >> (32 - i)); } @@ -112,19 +120,23 @@ __ashrdi3(uint64_t x, int i) { Int64 input, result; - if (i == 0) { + if (i == 0) + { return x; } input.value = x; - if (i >= 32) { + if (i >= 32) + { result.word[0] = input.word[0] >> 31; result.word[1] = input.word[0] >> (i - 32); - } else { + } + else + { result.word[0] = input.word[0] >> i; - result.word[1] = - (((uint32_t)input.word[1]) >> i) | + result.word[1] = + (((uint32_t)input.word[1]) >> i) | (input.word[0] << (32 - i)); } @@ -165,7 +177,7 @@ __popcountdi2(uint64_t x) // 64-bit divides // // For the unsigned case, note that divide by 0 returns quotient = remainder = -// 0. +// 0. // // For the signed case, in general we perform the division on the absolute // values and fix the signs of the quotient and remainder at the end. @@ -181,22 +193,22 @@ __popcountdi2(uint64_t x) // but only 184 bytes as configured here. #if 0 -// For the signed cases, we need to handle the special case that the dividend -// or divisor is the most negative integer. -// -// If the dividend is the most negative integer, then dividing this integer by -// -1 would overflow as a positive quotient, so we set quotient and remainder -// to 0 in this case. For divide by 1, the quotient is the most negative -// integer. Otherwise we adjust the dividend by the absolute value of the -// divisor, then fix up the quotient later by adding or subtracting 1. -// -// If the divisor is the most negative integer, then the quotient is always 0 -// unless the dividend is also the most negative integer, in which case the -// quotient is 1 and the remainder is 0. -// + // For the signed cases, we need to handle the special case that the dividend + // or divisor is the most negative integer. + // + // If the dividend is the most negative integer, then dividing this integer by + // -1 would overflow as a positive quotient, so we set quotient and remainder + // to 0 in this case. For divide by 1, the quotient is the most negative + // integer. Otherwise we adjust the dividend by the absolute value of the + // divisor, then fix up the quotient later by adding or subtracting 1. + // + // If the divisor is the most negative integer, then the quotient is always 0 + // unless the dividend is also the most negative integer, in which case the + // quotient is 1 and the remainder is 0. + // #endif -uint64_t +uint64_t __udivdi3(uint64_t u, uint64_t v) { uint64_t quotient, remainder; @@ -206,7 +218,7 @@ __udivdi3(uint64_t u, uint64_t v) } -uint64_t +uint64_t __umoddi3(uint64_t u, uint64_t v) { uint64_t quotient, remainder; @@ -217,12 +229,12 @@ __umoddi3(uint64_t u, uint64_t v) #if 0 -#define INT64_T_MIN ((int64_t)(0x8000000000000000ull)) + #define INT64_T_MIN ((int64_t)(0x8000000000000000ull)) #endif void -__ppc32_sdiv64(int64_t u, int64_t v, - int64_t *quotient, int64_t *remainder) +__ppc32_sdiv64(int64_t u, int64_t v, + int64_t* quotient, int64_t* remainder) { int q_negate, r_negate; uint64_t uu, uv; @@ -236,47 +248,66 @@ __ppc32_sdiv64(int64_t u, int64_t v, uv = (v < 0 ? -v : v); #if 0 - if (u == INT64_T_MIN) { - if (v == -1) { + + if (u == INT64_T_MIN) + { + if (v == -1) + { *quotient = 0; *remainder = 0; return; - } else if (v == 1) { + } + else if (v == 1) + { *quotient = INT64_T_MIN; *remainder = 0; return; - } else if (v == INT64_T_MIN) { + } + else if (v == INT64_T_MIN) + { *quotient = 1; *remainder = 0; return; - } else { + } + else + { fixup = 1; u += (v < 0 ? -v : v); } - } else if (v == INT64_T_MIN) { + } + else if (v == INT64_T_MIN) + { *quotient = 0; *remainder = u; return; } + #endif - __ppc32_udiv64(uu, uv, (uint64_t *)quotient, (uint64_t *)remainder); + __ppc32_udiv64(uu, uv, (uint64_t*)quotient, (uint64_t*)remainder); #if 0 - if (fixup) { + + if (fixup) + { *quotient += 1; } + #endif - if (q_negate) { + + if (q_negate) + { *quotient = -(*quotient); } - if (r_negate) { + + if (r_negate) + { *remainder = -(*remainder); } } - -int64_t + +int64_t __divdi3(int64_t u, int64_t v) { int64_t quotient, remainder; @@ -286,7 +317,7 @@ __divdi3(int64_t u, int64_t v) } -int64_t +int64_t __moddi3(int64_t u, int64_t v) { int64_t quotient, remainder; @@ -307,25 +338,34 @@ __ucmpdi2(uint64_t i_a, uint64_t i_b) a.value = i_a; b.value = i_b; - if (a.word[0] < b.word[0]) { + if (a.word[0] < b.word[0]) + { rv = 0; - } else if (a.word[0] > b.word[0]) { + } + else if (a.word[0] > b.word[0]) + { rv = 2; - } else if (a.word[1] < b.word[1]) { + } + else if (a.word[1] < b.word[1]) + { rv = 0; - } else if (a.word[1] > b.word[1]) { + } + else if (a.word[1] > b.word[1]) + { rv = 2; - } else { + } + else + { rv = 1; } return rv; } - - - - + + + + diff --git a/src/ssx/ppc32/ppc32_gcc.h b/src/ssx/ppc32/ppc32_gcc.h index 7931fcd..a5cbef2 100644 --- a/src/ssx/ppc32/ppc32_gcc.h +++ b/src/ssx/ppc32/ppc32_gcc.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,14 +40,16 @@ /// A 64-bit unsigned integer type -typedef union { +typedef union +{ uint64_t value; uint32_t word[2]; } Uint64; /// A 64-bit signed integer type -typedef union { +typedef union +{ int64_t value; int32_t word[2]; } Int64; @@ -70,14 +72,14 @@ __popcountdi2(uint64_t x); /// Unsigned 64/64 bit divide, returning quotient and remainder via pointers. void -__ppc32_udiv64(uint64_t u, uint64_t v, uint64_t *q, uint64_t *r); +__ppc32_udiv64(uint64_t u, uint64_t v, uint64_t* q, uint64_t* r); /// Signed 64/64 bit divide, returning quotient and remainder via pointers. void -__ppc32_sdiv64(int64_t u, int64_t v, int64_t *q, int64_t *r); +__ppc32_sdiv64(int64_t u, int64_t v, int64_t* q, int64_t* r); -uint64_t +uint64_t __udivdi3(uint64_t u, uint64_t v); int64_t @@ -86,7 +88,7 @@ __divdi3(int64_t u, int64_t v); int64_t __moddi3(int64_t u, int64_t v); -uint64_t +uint64_t __umoddi3(uint64_t u, uint64_t v); int diff --git a/src/ssx/ppc32/savegpr.S b/src/ssx/ppc32/savegpr.S index 4dbfef0..efc04ac 100644 --- a/src/ssx/ppc32/savegpr.S +++ b/src/ssx/ppc32/savegpr.S @@ -5,7 +5,7 @@ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2014,2015 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -40,6 +40,7 @@ /// code was copied. /// +// *INDENT-OFF* .macro SAVE reg .global _savegpr_\reg @@ -98,3 +99,5 @@ mtlr 0 mr 1,11 blr + +// *INDENT-ON* diff --git a/src/ssx/ppc32/ssxppc32files.mk b/src/ssx/ppc32/ssxppc32files.mk index 7987265..1c0414a 100644 --- a/src/ssx/ppc32/ssxppc32files.mk +++ b/src/ssx/ppc32/ssxppc32files.mk @@ -5,7 +5,7 @@ # # OpenPOWER OnChipController Project # -# Contributors Listed Below - COPYRIGHT 2014,2015 +# Contributors Listed Below - COPYRIGHT 2014,2016 # [+] International Business Machines Corp. # # |

