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authorWael El-Essawy <welessa@us.ibm.com>2015-10-06 09:17:06 -0500
committerFadi Kassem <fmkassem@us.ibm.com>2015-10-06 16:20:09 -0500
commit64ba6727bc31917105528e60950b0b2d2745a15e (patch)
tree61dc3c70f60e48809c33c8858f01dec5a0b52e81 /src/ppe/pk/ppe42
parent774c825185dbca3c11c3ca946f4b07b72ee0c4d5 (diff)
downloadtalos-occ-64ba6727bc31917105528e60950b0b2d2745a15e.tar.gz
talos-occ-64ba6727bc31917105528e60950b0b2d2745a15e.zip
fix getscom_abs and _getscom code
Instead of reading the scom registers, and storing the results to a memory address specified by o_data, the two routines were loading data into a vector register, without storing it to the o_data pointer, basically losing it. There is no memory to memory PPC instruction, so the minimum number of instructions to execute the code is two: a vector load and a vector store. - Had to modify the ppe42_scom.h to make the _m_data parameter to the PPE_LVD and PPE_LVDX macros an output only. Otherwise, the compiler initializes the temp variable, adding two (useless) instructions. - make the PPE_LVDX macro have the same flavor as PPE_LVD by eliminating the pointer to m_data from both the _getscom function side and the macro implementation side. This fix is already merged in the hw/ppe repository. Change-Id: I6390d2c5e2fbcecf440080917611a82ae88d313b RTC: 135989 RTC: 137704 RTC: 136459 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/20976 Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Fadi Kassem <fmkassem@us.ibm.com>
Diffstat (limited to 'src/ppe/pk/ppe42')
-rwxr-xr-xsrc/ppe/pk/ppe42/ppe42_scom.c34
-rwxr-xr-xsrc/ppe/pk/ppe42/ppe42_scom.h10
2 files changed, 10 insertions, 34 deletions
diff --git a/src/ppe/pk/ppe42/ppe42_scom.c b/src/ppe/pk/ppe42/ppe42_scom.c
index 220712c..105b83a 100755
--- a/src/ppe/pk/ppe42/ppe42_scom.c
+++ b/src/ppe/pk/ppe42/ppe42_scom.c
@@ -1,27 +1,3 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/ppe/pk/ppe42/ppe42_scom.c $ */
-/* */
-/* OpenPOWER OnChipController Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2015 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
//-----------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2015
// *! All Rights Reserved -- Property of IBM
@@ -76,9 +52,10 @@ uint32_t _putscom( uint32_t i_chiplet_id, uint32_t i_address, uint64_t i_data)
uint32_t getscom_abs( const uint32_t i_address, uint64_t *o_data)
{
-
+ uint64_t temp;
// Perform the Load Virtual Double instruction
- PPE_LVD(i_address, o_data);
+ PPE_LVD(i_address, temp);
+ PPE_STVD(o_data, temp);
// Get the MSR[SIBRC] as the return code
uint32_t rc = mfmsr();
@@ -89,9 +66,10 @@ uint32_t getscom_abs( const uint32_t i_address, uint64_t *o_data)
uint32_t _getscom( const uint32_t i_chiplet_id, const uint32_t i_address, uint64_t *o_data)
{
-
+ uint64_t temp;
// Perform the Load Virtual Double Index instruction
- PPE_LVDX(i_chiplet_id, i_address, o_data);
+ PPE_LVDX(i_chiplet_id, i_address, temp);
+ PPE_STVD(o_data, temp);
// Get the MSR[SIBRC] as the return code
uint32_t rc = mfmsr();
diff --git a/src/ppe/pk/ppe42/ppe42_scom.h b/src/ppe/pk/ppe42/ppe42_scom.h
index 7368594..33d998b 100755
--- a/src/ppe/pk/ppe42/ppe42_scom.h
+++ b/src/ppe/pk/ppe42/ppe42_scom.h
@@ -59,9 +59,8 @@ extern "C" {
asm volatile \
( \
"lvd %[data], 0(%[address]) \n" \
- : [data]"=&r"(_m_data) \
- : "[data]"(_m_data), \
- [address]"b"(_m_address) \
+ : [data]"=r"(_m_data) \
+ : [address]"b"(_m_address) \
);
@@ -81,9 +80,8 @@ asm volatile \
asm volatile \
( \
"lvdx %[data], %[base], %[offset] \n" \
- : [data]"=&r"(*_m_data) \
- : "[data]"(*_m_data), \
- [base]"b"(_m_base), \
+ : [data]"=r"(_m_data) \
+ : [base]"b"(_m_base), \
[offset]"r"(_m_offset) \
);
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