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author | mbroyles <mbroyles@us.ibm.com> | 2017-07-26 14:36:03 -0500 |
---|---|---|
committer | William A. Bryan <wilbryan@us.ibm.com> | 2017-07-26 16:47:13 -0400 |
commit | 458a99921f4ed89d145d267ba837eb3228909d06 (patch) | |
tree | 2f315b5db7466443274061a847a145a080fc2809 /src/occ_gpe0 | |
parent | 579fd543e9d698dc3932e8f72b166233f8baa773 (diff) | |
download | talos-occ-458a99921f4ed89d145d267ba837eb3228909d06.tar.gz talos-occ-458a99921f4ed89d145d267ba837eb3228909d06.zip |
Reduce number of checks when waiting for SPI completion
Fix GPE1 timing fw sensor
Change-Id: I4e0d4256b0f55a5593b16237ace5bce73029f6da
CQ: SW396887
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43706
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_gpe0')
-rw-r--r-- | src/occ_gpe0/apss_read.c | 28 | ||||
-rw-r--r-- | src/occ_gpe0/gpe_util.c | 35 |
2 files changed, 38 insertions, 25 deletions
diff --git a/src/occ_gpe0/apss_read.c b/src/occ_gpe0/apss_read.c index 640e712..c6065bb 100644 --- a/src/occ_gpe0/apss_read.c +++ b/src/occ_gpe0/apss_read.c @@ -216,10 +216,10 @@ void apss_continue_pwr_meas_read(ipc_msg_t* cmd, void* arg) #endif do{ - // wait for ADC completion, or timeout after 100 micro seconds. + // wait for ADC completion, or timeout after 120us (from Jordan for 16 channels) // scom register SPIPSS_ADC_STATUS_REG's bit 0 (HWCTRL_ONGOING) // indicates when completion occurs. - rc = wait_spi_completion(&(args->error), SPIPSS_ADC_STATUS_REG, 100); + rc = wait_spi_completion(&(args->error), SPIPSS_ADC_STATUS_REG, 120); if(rc) // Timeout Reached, and SPI transaction didn't complete { PK_TRACE("apss_continue_pwr_meas_read:wait_spi_completion Timed out, rc = 0x%08x", @@ -360,18 +360,6 @@ void apss_complete_pwr_meas_read(ipc_msg_t* cmd, void* arg) apss_complete_args_t *args = (apss_complete_args_t*)async_cmd->cmd_data; uint32_t rdata_reg = 0; do { - // wait for ADC completion, or timeout after 100 micro seconds. - // scom register SPIPSS_ADC_STATUS_REG's bit 0 (HWCTRL_ONGOING) - // indicates when completion occurs. - rc = wait_spi_completion(&(args->error), SPIPSS_ADC_STATUS_REG, 100); - if(rc) // Timeout Reached, and SPI transaction didn't complete - { - PK_TRACE("apss_complete_pwr_meas_read:wait_spi_completion Timed out, rc = 0x%08x", - rc); - // FFDC already set inside wait_spi_completion - break; - } - // Get Time of Day rc = getscom_abs(TOD_VALUE_REG, &args->meas_data[3]); if(rc) @@ -382,6 +370,18 @@ void apss_complete_pwr_meas_read(ipc_msg_t* cmd, void* arg) break; } + // wait for completion, or timeout after 40us (from Jordan for GPIOs) + // scom register SPIPSS_ADC_STATUS_REG's bit 0 (HWCTRL_ONGOING) + // indicates when completion occurs. + rc = wait_spi_completion(&(args->error), SPIPSS_ADC_STATUS_REG, 40); + if(rc) // Timeout Reached, and SPI transaction didn't complete + { + PK_TRACE("apss_complete_pwr_meas_read:wait_spi_completion Timed out, rc = 0x%08x", + rc); + // FFDC already set inside wait_spi_completion + break; + } + // If we're in composite mode, collect the GPIO data if (APSS_MODE_COMPOSITE == G_apss_mode) { diff --git a/src/occ_gpe0/gpe_util.c b/src/occ_gpe0/gpe_util.c index 0879fc3..a58b5f7 100644 --- a/src/occ_gpe0/gpe_util.c +++ b/src/occ_gpe0/gpe_util.c @@ -77,11 +77,13 @@ void gpe_set_ffdc(GpeErrorStruct *o_error, uint32_t i_addr, uint32_t i_rc, uint6 * End Function Specification */ -int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint8_t timeout) +int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint32_t i_timeout) { int i = 0; - int rc; - uint64_t status; + int rc = 0; + uint64_t status = 0; + uint32_t wait_time = 0; + uint32_t num_reads = 0; if((reg != SPIPSS_P2S_STATUS_REG) && (reg != SPIPSS_ADC_STATUS_REG)) { @@ -91,9 +93,23 @@ int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint8_t timeout) } else { - // Keep polling the P2S_ONGOING bits for timeout - for (i = 0; i< timeout; i++) + // Read the P2S_ONGOING bits every 10us for i_timeout, if i_timeout is less than 10 + // just wait i_timeout and check once + if(i_timeout >= 10) { + wait_time = 10; + num_reads = i_timeout / 10; + } + else + { + wait_time = i_timeout; + num_reads = 1; + } + + for (i = 0; i< num_reads; i++) + { + busy_wait(wait_time); + rc = getscom_abs(reg, &status); if(rc) { @@ -112,18 +128,15 @@ int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint8_t timeout) rc = 0; break; } - - // sleep for 1 microsecond before retry - busy_wait(1); } } - //Timed out waiting on P2S_ONGOING / HWCTRL_ONGOING bit. - if (i >= timeout) + // Check if timed out waiting on P2S_ONGOING / HWCTRL_ONGOING bit + if (i >= num_reads) { PK_TRACE("gpe0:wait_spi_completion Timed out waiting for p2s_ongoing to clear."); - gpe_set_ffdc(error, reg, GPE_RC_SPI_TIMEOUT, rc); rc = GPE_RC_SPI_TIMEOUT; + gpe_set_ffdc(error, reg, GPE_RC_SPI_TIMEOUT, rc); } return rc; |