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authorAndres Lugo-Reyes <aalugore@us.ibm.com>2017-08-31 11:45:42 -0500
committerWilliam A. Bryan <wilbryan@us.ibm.com>2017-09-01 16:13:59 -0400
commitf6b9c4c2f61472fab97c75d719ae7224f0e9e416 (patch)
tree8b8f51b0f6e6ab736f65c7e06570148887a4be82 /src/occ_405
parente1a597e9f5bc8e7b193058ca32a8c8ba46ebf519 (diff)
downloadtalos-occ-f6b9c4c2f61472fab97c75d719ae7224f0e9e416.tar.gz
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Refine WOF calculations
-Alter core leakage calculations to consider residual current in cores that are off -For phase 1, ceff calcs to use voltvddsense Change-Id: I03b29f7a28d8411aae459f3a3b20d7321281e4f1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/45571 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Francesco A. Campisano <campisan@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_405')
-rw-r--r--src/occ_405/wof/wof.c21
1 files changed, 7 insertions, 14 deletions
diff --git a/src/occ_405/wof/wof.c b/src/occ_405/wof/wof.c
index 2d4a166..394f90c 100644
--- a/src/occ_405/wof/wof.c
+++ b/src/occ_405/wof/wof.c
@@ -832,6 +832,9 @@ void calculate_core_leakage( void )
{
// Incorporate quad off into leakage
idc_vdd += g_wof->idc_quad;
+
+ // Add in 4 cores worth of off leakage
+ idc_vdd += g_wof->all_cores_off_iso * NUM_CORES_PER_QUAD /24;
}
else // Quad i is on
{
@@ -913,19 +916,7 @@ void calculate_core_leakage( void )
// After all cores within the current quad have been processed,
// incorporate calculations for cores that were off into leakage
- // Calculate quadx_BAD_OFF_cores
- g_wof->quad_bad_off_cores[quad_idx] =
- (g_wof->all_cores_off_iso * G_oppb.iddq.good_normal_cores[quad_idx])
- / 24;
-
- // Scale to nest temp and add to overall leakage
- idc_vdd +=
- (scale(g_wof->quad_bad_off_cores[quad_idx],
- (g_wof->tempnest_sensor -
- (G_oppb.iddq.avgtemp_all_cores_off_caches_off[quad_v_idx]>>1))))
- * num_cores_off_in_quad;
- // After all cores have been processed in current quad, multiply
- // the scaled value by the numer of cores that were off.
+ idc_vdd += g_wof->all_cores_off_iso * num_cores_off_in_quad /24;
// Incorporate the cache into leakage calculation.
// scale from nest to quad
@@ -1075,9 +1066,11 @@ void calculate_ceff_ratio_vdd( void )
g_wof->c_ratio_vdd_freq );
// Calculate ceff_vdd
// iac_vdd / (Vclip^1.3 * Fclip)
+ // NOTE: WOF Phase 1 to use VOLTVDDSENSE. Phase 2 will use v_clip
g_wof->ceff_vdd =
calculate_effective_capacitance( g_wof->iac_vdd,
- (g_wof->v_clip*10), // mV->100uV
+ //(g_wof->v_clip*10),// mV->100uV
+ g_wof->voltvddsense_sensor,
g_wof->f_clip_freq );
// Prevent divide by zero
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