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authorAndres Lugo-Reyes <aalugore@us.ibm.com>2017-05-22 13:36:12 -0500
committerWilliam A. Bryan <wilbryan@us.ibm.com>2017-06-01 13:04:08 -0400
commit852d3b94da35cfa28c08f871df6eff4a21681d60 (patch)
tree1a82598e7b5eb973da3b8b84900659ec51936fee /src/occ_405
parent2f8acbd71ab64502eba0d67c8b3e0ce9d23be53d (diff)
downloadtalos-occ-852d3b94da35cfa28c08f871df6eff4a21681d60.tar.gz
talos-occ-852d3b94da35cfa28c08f871df6eff4a21681d60.zip
WOF: Rework more core leakage calc logic to use correct voltage
Change-Id: Ie9b5c541c111c3a4cce96e013de794901f8a9269 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/40811 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_405')
-rw-r--r--src/occ_405/wof/wof.c110
1 files changed, 46 insertions, 64 deletions
diff --git a/src/occ_405/wof/wof.c b/src/occ_405/wof/wof.c
index 9f759fc..5aeaac1 100644
--- a/src/occ_405/wof/wof.c
+++ b/src/occ_405/wof/wof.c
@@ -814,81 +814,70 @@ void calculate_core_voltage( void )
*/
void calculate_core_leakage( void )
{
- int l_chip_v_idx;
uint16_t l_quad_cache;
uint16_t idc_vdd = 0;
- uint8_t num_quads_off = 0;
uint16_t temperature = 0;
- // Get the VOLTVDDSENSE sensor and choose the appropriate
- // chip voltage index
- uint32_t l_v_chip = g_wof->voltvddsense_sensor;
+ // Get the core leakage percent from the OPPB
+ // Note: This value is named inaccurately in the OPPB so we are reassigning
+ // it's value here. We are also making the value visible to amester here.
+ g_wof->core_leakage_percent = G_oppb.nest_leakage_percent;
- // Choose the lower bound index of G_iddq_voltages
- l_chip_v_idx = get_voltage_index( l_v_chip );
+ // Loop through all Quads and their respective Cores to calculate
+ // leakage.
+ int quad_idx = 0; // Quad Index (0-5)
+ uint8_t core_idx = 0; // Actual core index (0-23)
+ int core_loop_idx = 0; // On a per quad basis (0-3)
- // Save index used for interpolating voltages to amec
- g_wof->chip_volt_idx = l_chip_v_idx;
+ for(quad_idx = 0; quad_idx < MAXIMUM_QUADS; quad_idx++)
+ {
+ // Get the voltage for the current core.
+ // (Same for all cores within a single quad)
+ uint8_t quad_v_idx = g_wof->quad_v_idx[quad_idx];
- // Calculate all variables that will be used in the core
- // loop that only need to be calculated once.
+ // ALL_CORES_OFF_ISO
+ g_wof->all_cores_off_iso =
+ scale_and_interpolate( G_oppb.iddq.ivdd_all_cores_off_caches_off,
+ G_oppb.iddq.avgtemp_all_cores_off_caches_off,
+ quad_v_idx,
+ g_wof->tempnest_sensor,
+ g_wof->v_core_100uV[quad_idx] );
- // ALL_CORES_OFF_ISO
- g_wof->all_cores_off_iso =
- scale_and_interpolate( G_oppb.iddq.ivdd_all_cores_off_caches_off,
- G_oppb.iddq.avgtemp_all_cores_off_caches_off,
- l_chip_v_idx,
- g_wof->tempnest_sensor,
- l_v_chip );
+ //Multiply by core leakage percentage
+ g_wof->all_cores_off_iso = g_wof->all_cores_off_iso *
+ g_wof->core_leakage_percent / 100;
- // Get the core leakage percent from the OPPB
- // Note: This value is named inaccurately in the OPPB so we are reassigning
- // it's value here. We are also making the value visible to amester here.
- g_wof->core_leakage_percent = G_oppb.nest_leakage_percent;
+ // Calculate ALL_GOOD_CACHES_ON_ISO
+ g_wof->all_good_caches_on_iso =
+ scale_and_interpolate( G_oppb.iddq.ivdd_all_good_cores_off_good_caches_on,
+ G_oppb.iddq.avgtemp_all_good_cores_off,
+ quad_v_idx,
+ g_wof->tempnest_sensor,
+ g_wof->v_core_100uV[quad_idx] ) -
+ g_wof->all_cores_off_iso;
- // Multiply by core leakage percentage
- g_wof->all_cores_off_iso =
- (g_wof->all_cores_off_iso * g_wof->core_leakage_percent) / 100;
-
- // Calculate ALL_GOOD_CACHES_ON_ISO
- g_wof->all_good_caches_on_iso =
- scale_and_interpolate( G_oppb.iddq.ivdd_all_good_cores_off_good_caches_on,
- G_oppb.iddq.avgtemp_all_good_cores_off,
- l_chip_v_idx,
- g_wof->tempnest_sensor,
- l_v_chip );
- g_wof->all_good_caches_on_iso -= g_wof->all_cores_off_iso;
-
- // Calculate ALL_CACHES_OFF_ISO
- g_wof->all_caches_off_iso =
+ // Calculate ALL_CACHES_OFF_ISO
+ g_wof->all_caches_off_iso =
scale_and_interpolate( G_oppb.iddq.ivdd_all_cores_off_caches_off,
G_oppb.iddq.avgtemp_all_cores_off_caches_off,
- l_chip_v_idx,
+ quad_v_idx,
g_wof->tempnest_sensor,
- l_v_chip );
- g_wof->all_caches_off_iso -= g_wof->all_cores_off_iso;
+ g_wof->v_core_100uV[quad_idx] ) -
+ g_wof->all_cores_off_iso;
- // idc Quad uses same variables as all_cores_off_iso so just use that and
- // divide by 6 to get just one quad
- g_wof->idc_quad = g_wof->all_cores_off_iso / MAXIMUM_QUADS;
+ // idc Quad uses same variables as all_cores_off_iso so just use that and
+ // divide by 6 to get just one quad
+ g_wof->idc_quad = g_wof->all_caches_off_iso / MAXIMUM_QUADS;
- // Calculate quad_cache for all quads
- l_quad_cache = ( g_wof->all_good_caches_on_iso - (g_wof->all_caches_off_iso *
+ // Calculate quad_cache for all quads
+ l_quad_cache = ( g_wof->all_good_caches_on_iso - g_wof->all_caches_off_iso *
( MAXIMUM_QUADS - G_oppb.iddq.good_quads_per_sort) /
- MAXIMUM_QUADS) ) / G_oppb.iddq.good_quads_per_sort;
+ MAXIMUM_QUADS) / G_oppb.iddq.good_quads_per_sort;
- // Loop through all Quads and their respective Cores to calculate
- // leakage.
- int quad_idx = 0; // Quad Index (0-5)
- uint8_t core_idx = 0; // Actual core index (0-23)
- int core_loop_idx = 0; // On a per quad basis (0-3)
-
- for(quad_idx = 0; quad_idx < MAXIMUM_QUADS; quad_idx++)
- {
if(g_wof->quad_x_pstates[quad_idx] == QUAD_POWERED_OFF)
{
- // Increment the number of quads found to be off
- num_quads_off++;
+ // Incorporate quad off into leakage
+ idc_vdd += g_wof->idc_quad;
}
else // Quad i is on
{
@@ -896,10 +885,6 @@ void calculate_core_leakage( void )
// so we reference the correct one in the inner core loop
core_idx = quad_idx * NUM_CORES_PER_QUAD;
- // Get the voltage for the current core.
- // (Same for all cores within a single quad)
- uint8_t quad_v_idx = g_wof->quad_v_idx[quad_idx];
-
// Calculate the number of cores on within the current quad.
g_wof->cores_on_per_quad[quad_idx] =
num_cores_on_in_quad(quad_idx);
@@ -988,6 +973,7 @@ void calculate_core_leakage( void )
// After all cores have been processed in current quad, multiply
// the scaled value by the numer of cores that were off.
+
// Incorporate the cache into leakage calculation.
// scale from nest to quad
idc_vdd += scale( l_quad_cache,
@@ -996,10 +982,6 @@ void calculate_core_leakage( void )
} // quad on/off conditional
} // quad loop
- // After all Quads have been processed, incorporate calculation for quads
- // that off into leakage
- idc_vdd += g_wof->idc_quad * num_quads_off;
-
// Finally, save the calculated leakage to amec
g_wof->idc_vdd = idc_vdd;
}
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