occ_405 dir cleanup from TODOs

either implement todos or refer to planned RTC

Change-Id: Id9209bd9a89e0d38a56e2999f6e7fe2d16dd6433
RTC: 163361
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/35861
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>

8 files changed, 78 insertions, 32 deletions

diff --git a/src/occ_405/common.c b/src/occ_405/common.c
index f383cfc..cdebccd 100755
--- a/src/occ_405/common.c
+++ b/src/occ_405/common.c
@@ -49,7 +49,9 @@ void task_misc_405_checks(task_t *i_self)
     }
 
     // Check for checkstops
-/* TEMP -- NO MORE PORE / check_stop field no longer exists */
+/* RTC 168529
+    TODO: replace PORE code with watchdog checking for GPE0 and GPE1
+          and check_stop field no longer exists */
 #if 0
     pore_status_t l_gpe0_status;
 
diff --git a/src/occ_405/dcom/dcom.c b/src/occ_405/dcom/dcom.c
index 399bfe1..d0bbf73 100755
--- a/src/occ_405/dcom/dcom.c
+++ b/src/occ_405/dcom/dcom.c
@@ -368,8 +368,6 @@ void dcom_error_check( const dcom_error_type_t i_error_type, const bool i_clear_
             // Commit log
             commitErrl( &l_errl );
 
-            // Call request nominal macro to change state
-            REQUEST_NOMINAL();
         }
         else if ( *l_count_ptr == DCOM_1S_GAP )
         {
diff --git a/src/occ_405/linkocc.cmd b/src/occ_405/linkocc.cmd
index 9c68116..898fa1a 100755
--- a/src/occ_405/linkocc.cmd
+++ b/src/occ_405/linkocc.cmd
@@ -718,10 +718,8 @@ SECTIONS
     . = __CUR_COUNTER__;
 
     ////////////////////////////////
-    //  TODO:     Previously, we were able to reclaim this space
-    //            by loading applets over init data. The init data
-    //            takes up around 6K. It would be good to figure 
-    //            out what to do with it to regain the space.
+    //            The init data,
+    //            takes up around 6K.
     ////////////////////////////////
     //__CUR_COUNTER__ = .;
     //INIT_SECTION_BASE = 0xfffbf000;
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index ba36b59..f34bba6 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -193,7 +193,8 @@ void check_runtime_environment(void)
  */
 void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority)
 {
-    // TEMP / TODO -- Unused var
+    // TODO: RTC 134619; enable Interrupt handlers for HW errors
+    //       --  uncomment currently unused vars upon implementation
     //errlHndl_t  l_err;
     //pmc_ffdc_data_t l_pmc_ffdc;
     SsxMachineContext ctx;
@@ -221,7 +222,7 @@ void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority)
      * @devdesc    Failure detected in processor
      *             power management controller (PMC)
      */
-/* TEMP NO MORE PMC
+/* TEMP NO MORE PMC - RTC 161456
     l_err = createErrl( PMC_HW_ERROR_ISR,          // i_modId,
                         PMC_FAILURE,               // i_reasonCode,
                         OCC_NO_EXTENDED_RC,
@@ -330,7 +331,7 @@ void occ_irq_setup()
 
 
         // ------------- PMC Error IRQ Setup ------------------
-/* TEMP -- IS THIS NO LONGER A THING IN P9??
+/* TODO - RTC: 134619 -- IS THIS NO LONGER A THING IN P9??
 
         // Disable the IRQ while we work on it
         ssx_irq_disable(OCCHW_IRQ_PMC_ERROR);
@@ -359,7 +360,7 @@ void occ_irq_setup()
         //enable the IRQ
         ssx_irq_status_clear(OCCHW_IRQ_PMC_ERROR);
         ssx_irq_enable(OCCHW_IRQ_PMC_ERROR);
-END TEMP */
+END TODO */
     }while(0);
 
     if(l_rc)
@@ -1315,7 +1316,6 @@ void mainThrdTimerCallback(void * i_argPtr)
                                       0);                           //userdata2
 
         // Commit Error
-        // TEMP - NO RESET YET
         REQUEST_RESET(l_err);
     }
 }
@@ -1522,7 +1522,7 @@ void Main_thread_routine(void *private)
         dcache_flush(g_trac_imp_buffer, TRACE_BUFFER_SIZE);
         dcache_flush(g_trac_err_buffer, TRACE_BUFFER_SIZE);
 
-/* TEMP -- FIR DATA IS NOT SUPPORTED IN PHASE1
+/* RTC 130203 -- FIR DATA IS NOT SUPPORTED IN PHASE1
         static bool L_fir_collection_completed = FALSE;
         // Look for FIR collection flag and status
         if (G_fir_collection_required && !L_fir_collection_completed)
@@ -1712,7 +1712,7 @@ int main(int argc, char **argv)
 
 #endif /* PPC405_MMU_SUPPORT */
 
-/* TEMP -- NO FIR SUPPORT IN PHASE1
+/* RTC 130203: TEMP -- NO FIR SUPPORT IN PHASE1
     // Setup the TLB for writing to the FIR parms section
     l_ssxrc = ppc405_mmu_map(FIR_PARMS_SECTION_BASE_ADDRESS,
                              FIR_PARMS_SECTION_BASE_ADDRESS,
@@ -1776,10 +1776,6 @@ int main(int argc, char **argv)
         // Data is in Mhz upon return and needs to be converted to Hz and then
         // quartered.
         l_tb_freq_hz = G_nest_frequency_mhz * (1000000 / 4);
-
-        // @TODO: this parameter should be passsed to all the GPEs/CMEs/etc
-        // Can be stored in GPE accessible SRAM areas.
-        // The whole OCC complex should be running at the same nest frequency (proc_freq/4).
     }
     else
     {
@@ -1866,7 +1862,7 @@ int main(int argc, char **argv)
                            l_ssxrc,
                            l_occ_int_type);
 /*
-    //TEMP -- NO FIR SUPPORT
+    //RTC 130203: TEMP -- NO FIR SUPPORT
     if (l_homer_version >= HOMER_VERSION_3)
     {
         // Get the FIR Master indicator
diff --git a/src/occ_405/mode.c b/src/occ_405/mode.c
index 72a9f93..d83485e 100755
--- a/src/occ_405/mode.c
+++ b/src/occ_405/mode.c
@@ -207,7 +207,29 @@ errlHndl_t SMGR_set_mode( const OCC_MODE i_mode )
                      if(G_smgr_mode_trans_count == jj)
                      {
                          TRAC_ERR("No transition (or NULL) found for the mode change\n");
-                         l_errlHndl = NULL;  //TODO: Create Error
+
+                         /* @
+                          * @errortype
+                          * @moduleid    MAIN_MODE_TRANSITION_MID
+                          * @reasoncode  INTERNAL_FAILURE
+                          * @userdata1   G_occ_internal_mode
+                          * @userdata2   l_mode
+                          * @userdata4   ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL
+                          * @devdesc     no valid state transition routine found
+                          */
+                         l_errlHndl = createErrl(MAIN_MODE_TRANSITION_MID,                 //modId
+                                                 INTERNAL_FAILURE,                         //reasoncode
+                                                 ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL,   //Extended reason code
+                                                 ERRL_SEV_UNRECOVERABLE,                   //Severity
+                                                 NULL,                                     //Trace Buf
+                                                 DEFAULT_TRACE_SIZE,                       //Trace Size
+                                                 G_occ_internal_mode,                      //userdata1
+                                                 l_mode);                                  //userdata2
+
+                         addCalloutToErrl(l_errlHndl,
+                                          ERRL_CALLOUT_TYPE_COMPONENT_ID,
+                                          ERRL_COMPONENT_ID_FIRMWARE,
+                                          ERRL_CALLOUT_PRIORITY_HIGH);
                          break;
                      }
 
diff --git a/src/occ_405/occ_service_codes.h b/src/occ_405/occ_service_codes.h
index 4be6758..7c90fea 100644
--- a/src/occ_405/occ_service_codes.h
+++ b/src/occ_405/occ_service_codes.h
@@ -86,8 +86,6 @@ enum occReasonCode
     INTERNAL_FW_FAILURE             = 0xA0,
     /// Failure within the OCC Complex of the processor
     INTERNAL_HW_FAILURE             = 0xB0,
-    /// OCC GPE halted due to checkstop
-    OCC_GPE_HALTED                  = 0xB1,
     /// PMC Failure
     PMC_FAILURE                     = 0xB2,
     /// Data passed as an argument or returned from a function is invalid
@@ -247,6 +245,9 @@ enum occExtReasonCode
 
     ERC_24X7_GPE_CREATE_FAILURE                 = 0x00D0,
     ERC_24X7_GPE_SCHEDULE_FAILURE               = 0x00D1,
+
+    ERC_SMGR_NO_VALID_MODE_TRANSITION_CALL      = 0x00E0,
+    ERC_SMGR_NO_VALID_STATE_TRANSITION_CALL     = 0x00E1,
 };
 
 // Error log Module Ids
diff --git a/src/occ_405/reset.c b/src/occ_405/reset.c
index 0d79add..b09ea00 100755
--- a/src/occ_405/reset.c
+++ b/src/occ_405/reset.c
@@ -74,9 +74,6 @@ bool isSafeStateRequested(void)
 // End Function Specification
 void reset_state_request(uint8_t i_request)
 {
-  //TODO:  This needs to be changed so that G_reset_state operations are
-  // atomic.
-
   switch(i_request)
   {
     case RESET_REQUESTED_DUE_TO_ERROR:
@@ -102,8 +99,7 @@ void reset_state_request(uint8_t i_request)
 
         // Post the semaphore to wakeup the thread that
         // will put us into SAFE state.
-// TEMP -- THIS THREAD ISN"T ACTUALLY RUNNING IN PHASE1
-//        ssx_semaphore_post(&G_dcomThreadWakeupSem);
+        ssx_semaphore_post(&G_dcomThreadWakeupSem);
 
         // Set RTL Flags here too, depending how urgent it is that we stop
         // running tasks.
@@ -119,7 +115,6 @@ void reset_state_request(uint8_t i_request)
         // May need to add counter if multiple places request nominal
         G_reset_state = NOMINAL_REQUESTED_DUE_TO_ERROR;
 
-        //TODO:  Will need to set some flag or event here
       }
       break;
 
@@ -131,7 +126,6 @@ void reset_state_request(uint8_t i_request)
         // May need to add counter check if multiple places request nominal
         G_reset_state = RESET_NOT_REQUESTED;
 
-        //TODO:  Will need to clear some flag or event here
       }
       break;
 
diff --git a/src/occ_405/state.c b/src/occ_405/state.c
index bac2de8..81b5f9c 100755
--- a/src/occ_405/state.c
+++ b/src/occ_405/state.c
@@ -178,6 +178,7 @@ errlHndl_t SMGR_standby_to_observation()
                      ERRL_CALLOUT_TYPE_COMPONENT_ID,
                      ERRL_COMPONENT_ID_FIRMWARE,
                      ERRL_CALLOUT_PRIORITY_HIGH);
+
     }
     return l_errlHndl;
 }
@@ -249,7 +250,12 @@ errlHndl_t SMGR_observation_to_active()
             0,                               //Userdata1
             0                                //Userdata2
             );
-        // TODO now: REQUEST_RESET?
+
+        // Callout firmware
+        addCalloutToErrl(l_errlHndl,
+                 ERRL_CALLOUT_TYPE_COMPONENT_ID,
+                 ERRL_COMPONENT_ID_FIRMWARE,
+                 ERRL_CALLOUT_PRIORITY_HIGH);
     }
     else if ( G_clip_update_parms_ptr->msg_cb.rc != PGPE_RC_SUCCESS ) // IPC task completed with errors
     {
@@ -275,7 +281,12 @@ errlHndl_t SMGR_observation_to_active()
             G_clip_update_parms_ptr->msg_cb.rc,   //Userdata1
             0                                     //Userdata2
             );
-        // TODO now: REQUEST_RESET?
+
+        // Callout firmware
+        addCalloutToErrl(l_errlHndl,
+                 ERRL_CALLOUT_TYPE_COMPONENT_ID,
+                 ERRL_COMPONENT_ID_FIRMWARE,
+                 ERRL_CALLOUT_PRIORITY_HIGH);
     }
 
     else // Clips wide opened with no errors, enable Pstates on PGPE
@@ -392,6 +403,7 @@ errlHndl_t SMGR_observation_to_active()
                  ERRL_CALLOUT_TYPE_COMPONENT_ID,
                  ERRL_COMPONENT_ID_FIRMWARE,
                  ERRL_CALLOUT_PRIORITY_HIGH);
+
     }
     return l_errlHndl;
 }
@@ -631,7 +643,30 @@ errlHndl_t SMGR_set_state(OCC_STATE i_new_state)
         if(G_smgr_state_trans_count == jj)
         {
             TRAC_ERR("No transition (or NULL) found for the state change");
-            l_transResult = NULL;
+
+            /* @
+             * @errortype
+             * @moduleid    MAIN_STATE_TRANSITION_MID
+             * @reasoncode  INTERNAL_FAILURE
+             * @userdata1   G_occ_internal_state
+             * @userdata2   i_new_state
+             * @userdata4   ERC_SMGR_NO_VALID_STATE_TRANSITION_CALL
+             * @devdesc     no valid state transition routine found
+             */
+            l_transResult = createErrl(MAIN_STATE_TRANSITION_MID,                //modId
+                                       INTERNAL_FAILURE,                         //reasoncode
+                                       ERC_SMGR_NO_VALID_STATE_TRANSITION_CALL,  //Extended reason code
+                                       ERRL_SEV_UNRECOVERABLE,                   //Severity
+                                       NULL,                                     //Trace Buf
+                                       DEFAULT_TRACE_SIZE,                       //Trace Size
+                                       G_occ_internal_state,                     //userdata1
+                                       i_new_state);                             //userdata2
+
+            addCalloutToErrl(l_transResult,
+                             ERRL_CALLOUT_TYPE_COMPONENT_ID,
+                             ERRL_COMPONENT_ID_FIRMWARE,
+                             ERRL_CALLOUT_PRIORITY_HIGH);
+
             break;
         }