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authorWilliam Bryan <wilbryan@us.ibm.com>2016-09-21 16:26:07 -0500
committerWilliam A. Bryan <wilbryan@us.ibm.com>2016-10-11 14:24:15 -0400
commit720dfdf376155029a429339f7f862232081ccca0 (patch)
tree6a8afaae1e7e2bce85a97c3642d2a9c486815018 /src/occ_405
parentd1bd2d6019d90a86b4299004a40556a1da70e3c9 (diff)
downloadtalos-occ-720dfdf376155029a429339f7f862232081ccca0.tar.gz
talos-occ-720dfdf376155029a429339f7f862232081ccca0.zip
SSX Runtime Environment Check
RTC: 139829 Change-Id: Ic43ab936fd9d9b0d41270bbea50cd3969d9f8432 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30063 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_405')
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h4
-rw-r--r--src/occ_405/img_defs.mk2
-rwxr-xr-xsrc/occ_405/main.c51
-rwxr-xr-xsrc/occ_405/ssx_app_cfg.h5
-rwxr-xr-xsrc/occ_405/state.c6
-rwxr-xr-xsrc/occ_405/trac/trac_interface.c9
6 files changed, 57 insertions, 20 deletions
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h
index 206bdc5..08007b3 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.h
@@ -87,6 +87,10 @@ typedef enum
#define OCC_ROLE_MASTER_MASK 0x01
#define OCC_ROLE_FIR_MASTER_MASK 0x40
+// Bit mask in poll for indicating if OCC thinks
+// it is running in simulation.
+#define OCC_SIMICS_ENVIRONMENT 0x08
+
// Used by TMGT to send OCC the frequencies for each mode.
typedef struct __attribute__ ((packed))
{
diff --git a/src/occ_405/img_defs.mk b/src/occ_405/img_defs.mk
index 0fc7ddb..e30299e 100644
--- a/src/occ_405/img_defs.mk
+++ b/src/occ_405/img_defs.mk
@@ -193,7 +193,7 @@ endif
ifdef SIMICS_ENVIRONMENT
GCC-DEFS += -DSIMICS_ENVIRONMENT=$(SIMICS_ENVIRONMENT)
else
-GCC-DEFS += -DSIMICS_ENVIRONMENT=1
+GCC-DEFS += -DSIMICS_ENVIRONMENT=0
endif
GCC-DEFS += -DIMAGE_NAME=$(IMAGE_NAME)
diff --git a/src/occ_405/main.c b/src/occ_405/main.c
index 594ba2e..b73c7cc 100755
--- a/src/occ_405/main.c
+++ b/src/occ_405/main.c
@@ -102,6 +102,9 @@ uint32_t G_mainThreadLoopCounter = 0x0;
// Global flag indicating FIR collection is required
bool G_fir_collection_required = FALSE;
+// Global flag indicating we are running on Simics
+bool G_simics_environment = FALSE;
+
extern uint8_t g_trac_inf_buffer[];
extern uint8_t g_trac_imp_buffer[];
extern uint8_t g_trac_err_buffer[];
@@ -112,6 +115,26 @@ void pmc_hw_error_isr(void *private, SsxIrqId irq, int priority);
//mode interrupt handler
SSX_IRQ_FAST2FULL(pmc_hw_error_fast, pmc_hw_error_isr);
+/*
+ * Function Specification
+ *
+ * Name: check_runtime_environment
+ *
+ * Description: Determines whether we are running in Simics or on real HW.
+ *
+ * End Function Specification
+ */
+void check_runtime_environment(void)
+{
+ uint64_t flags;
+ flags = in64(OCB_OCCFLG);
+
+ // NOTE: The lower 32 bits of this register have no latches on
+ // physical hardware and will return 0s, so we can use
+ // a backdoor hack in Simics to set bit 63, telling the
+ // firmware what environment it's running in.
+ G_simics_environment = ( 0 != (flags & 0x0000000000000001) ) ? TRUE : FALSE;
+}
/*
* Function Specification
@@ -938,6 +961,9 @@ int main(int argc, char **argv)
int l_ssxrc = 0;
int l_ssxrc2 = 0;
+ // First, check what environment we are running on (Simics vs. HW).
+ check_runtime_environment();
+
// ----------------------------------------------------
// Initialize TLB for Linear Window access here so we
// can write checkpoints into the fsp response buffer.
@@ -975,7 +1001,7 @@ int main(int argc, char **argv)
//failure means we can't talk to FSP.
SSX_PANIC(0x01000001);
}
-#endif /* SIMICS_ENVIRONMENT */
+#endif /* TRAC_TO_SIMICS */
l_ssxrc = ppc405_mmu_map(
CMDH_OCC_RESPONSE_BASE_ADDRESS,
@@ -1125,6 +1151,10 @@ int main(int argc, char **argv)
CHECKPOINT(TRACE_INITIALIZED);
MAIN_TRAC_INFO("Inside OCC Main");
+
+ MAIN_TRAC_INFO("Currently %srunning in Simics environment",
+ ((G_simics_environment == FALSE) ? "not " : "") );
+
// Trace what happened before ssx initialization
MAIN_TRAC_INFO("HOMER accessed, rc=%d, version=%d, ssx_rc=%d",
l_homerrc, l_homer_version, l_ssxrc);
@@ -1224,17 +1254,18 @@ int main(int argc, char **argv)
}
}
*/
- // enable and register additional interrupt handlers
- CHECKPOINT(INITIALIZING_IRQS);
-// TODO: Uncomment when this is resolved in Simics. Causes SSX panic
-// currently. Not needed until we want to be able to catch
-// hardware OCC or PMC (or equivalent) errors.
-#if !SIMICS_ENVIRONMENT
- occ_irq_setup();
-#endif
+ //TODO: Causes an SSX panic in Simics. If it's needed in simulation,
+ // debug of the problem will be necessary to resolve.
+ if(FALSE == G_simics_environment)
+ {
+ // enable and register additional interrupt handlers
+ CHECKPOINT(INITIALIZING_IRQS);
+
+ occ_irq_setup();
- CHECKPOINT(IRQS_INITIALIZED);
+ CHECKPOINT(IRQS_INITIALIZED);
+ }
// enable IPC and start GPEs
CHECKPOINT(INITIALIZING_IPC);
diff --git a/src/occ_405/ssx_app_cfg.h b/src/occ_405/ssx_app_cfg.h
index f19a3ce..89514cb 100755
--- a/src/occ_405/ssx_app_cfg.h
+++ b/src/occ_405/ssx_app_cfg.h
@@ -155,7 +155,10 @@ do { \
// Default initializations for validation that affect SSX and library code
#ifndef SIMICS_ENVIRONMENT
-#define SIMICS_ENVIRONMENT 1
+#define SIMICS_ENVIRONMENT 0
+#endif
+
+#if SIMICS_ENVIRONMENT
#pragma message "Building for Simics!"
#endif
diff --git a/src/occ_405/state.c b/src/occ_405/state.c
index cf0094f..e0f1310 100755
--- a/src/occ_405/state.c
+++ b/src/occ_405/state.c
@@ -42,6 +42,7 @@
extern bool G_mem_monitoring_allowed;
extern task_t G_task_table[TASK_END]; // Global task table
+extern bool G_simics_environment;
// Maximum allowed value approx. 16.3 ms
#define PCBS_HEARBEAT_TIME_US 16320
@@ -614,6 +615,11 @@ uint8_t SMGR_validate_get_valid_states(void)
l_valid_states |= OCC_ROLE_FIR_MASTER_MASK;
}
+ if(G_simics_environment)
+ {
+ l_valid_states |= OCC_SIMICS_ENVIRONMENT;
+ }
+
return l_valid_states;
}
diff --git a/src/occ_405/trac/trac_interface.c b/src/occ_405/trac/trac_interface.c
index e31ec18..874ef4b 100755
--- a/src/occ_405/trac/trac_interface.c
+++ b/src/occ_405/trac/trac_interface.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2015 */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -74,13 +74,6 @@ uint8_t g_trac_inf_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".inf_trac
uint8_t g_trac_err_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".err_trac")));
uint8_t g_trac_imp_buffer[TRACE_BUFFER_SIZE] __attribute__ ((section (".imp_trac")));
-#if SIMICS_ENVIRONMENT
-// Necessary for use in Simics (to get address)
-uint8_t* g_trac_inf_buffer_ptr = g_trac_inf_buffer;
-uint8_t* g_trac_err_buffer_ptr = g_trac_err_buffer;
-uint8_t* g_trac_imp_buffer_ptr = g_trac_imp_buffer;
-#endif
-
// Need to modify the addTraceToErrl() function in errl.c when new trace buffer is added/removed
tracDesc_t g_trac_inf = (tracDesc_t) &g_trac_inf_buffer;
tracDesc_t g_trac_err = (tracDesc_t) &g_trac_err_buffer;
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