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authorDoug Gilbert <dgilbert@us.ibm.com>2017-10-30 12:58:10 -0500
committerMartha Broyles <mbroyles@us.ibm.com>2018-03-28 17:00:41 -0400
commit1bbbfec92b3a3744a6ffbc5e9f4a4eb46ca4abd1 (patch)
tree4af7fde07033e850abe820491c714f402f268da8 /src/occ_405
parentb3a2f75d837fd671f13dacb2464c36a5fc8fc69d (diff)
downloadtalos-occ-1bbbfec92b3a3744a6ffbc5e9f4a4eb46ca4abd1.tar.gz
talos-occ-1bbbfec92b3a3744a6ffbc5e9f4a4eb46ca4abd1.zip
P9 Centaur sensor support
Change-Id: Ia84bc7532482ca314c26bd0bb5bf48ad6ee9c410 RTC: 163359 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54989 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src/occ_405')
-rw-r--r--src/occ_405/amec/amec_sensors_centaur.c43
-rwxr-xr-xsrc/occ_405/amec/amec_slave_smh.c35
-rwxr-xr-xsrc/occ_405/cent/centaur_control.c100
-rwxr-xr-xsrc/occ_405/cent/centaur_control.h5
-rwxr-xr-xsrc/occ_405/cent/centaur_data.c416
-rwxr-xr-xsrc/occ_405/cent/centaur_data.h26
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_dbug_cmd.c14
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds.c31
-rwxr-xr-xsrc/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c23
-rwxr-xr-xsrc/occ_405/dimm/dimm.c383
-rw-r--r--src/occ_405/mem/memory.c40
-rwxr-xr-xsrc/occ_405/occbuildname.c2
-rwxr-xr-xsrc/occ_405/sensor/sensor_enum.h2
13 files changed, 534 insertions, 586 deletions
diff --git a/src/occ_405/amec/amec_sensors_centaur.c b/src/occ_405/amec/amec_sensors_centaur.c
index 8cd50c3..f4327ea 100644
--- a/src/occ_405/amec/amec_sensors_centaur.c
+++ b/src/occ_405/amec/amec_sensors_centaur.c
@@ -43,6 +43,7 @@
#include "sensor_enum.h"
#include "amec_service_codes.h"
#include <amec_sensors_centaur.h>
+#include "centaur_mem_data.h"
/******************************************************************************/
/* Globals */
@@ -57,12 +58,9 @@ extern uint8_t G_centaur_nest_lfir6;
/******************************************************************************/
/* Forward Declarations */
/******************************************************************************/
-/* TODO - RTC 163359 Centaur support */
-#if 0
-void amec_update_dimm_dts_sensors(MemData * i_sensor_cache, uint8_t i_centaur);
-void amec_update_centaur_dts_sensors(MemData * i_sensor_cache, uint8_t i_centaur);
-void amec_perfcount_getmc( MemData * i_sensor_cache, uint8_t i_centaur);
-#endif
+void amec_update_dimm_dts_sensors(CentaurMemData * i_sensor_cache, uint8_t i_centaur);
+void amec_update_centaur_dts_sensors(CentaurMemData * i_sensor_cache, uint8_t i_centaur);
+void amec_perfcount_getmc( CentaurMemData * i_sensor_cache, uint8_t i_centaur);
/******************************************************************************/
/* Code */
@@ -80,11 +78,9 @@ void amec_perfcount_getmc( MemData * i_sensor_cache, uint8_t i_centaur);
// End Function Specification
void amec_update_centaur_sensors(uint8_t i_centaur)
{
-/* TODO - RTC 163359 Centaur support */
-#if 0
if(CENTAUR_PRESENT(i_centaur))
{
- MemData * l_sensor_cache = cent_get_centaur_data_ptr(i_centaur);
+ CentaurMemData * l_sensor_cache = cent_get_centaur_data_ptr(i_centaur);
if(CENTAUR_UPDATED(i_centaur))
{
amec_update_dimm_dts_sensors(l_sensor_cache, i_centaur);
@@ -93,7 +89,6 @@ void amec_update_centaur_sensors(uint8_t i_centaur)
amec_perfcount_getmc(l_sensor_cache, i_centaur);
CLEAR_CENTAUR_UPDATED(i_centaur);
}
-#endif
}
// Function Specification
@@ -106,9 +101,7 @@ void amec_update_centaur_sensors(uint8_t i_centaur)
// Thread: RealTime Loop
//
// End Function Specification
-/* TODO - RTC 163359 Centaur support */
-#if 0
-void amec_update_dimm_dts_sensors(MemData * i_sensor_cache, uint8_t i_centaur)
+void amec_update_dimm_dts_sensors(CentaurMemData * i_sensor_cache, uint8_t i_centaur)
{
#define MIN_VALID_DIMM_TEMP 1
#define MAX_VALID_DIMM_TEMP 125 //according to Mike Pardiek
@@ -246,20 +239,17 @@ void amec_update_dimm_dts_sensors(MemData * i_sensor_cache, uint8_t i_centaur)
L_ran_once[i_centaur] = TRUE;
AMEC_DBG("Centaur[%d]: HotDimm=%d\n",i_centaur,l_hottest_dimm_temp);
}
-#endif
// Function Specification
//
// Name: amec_update_centaur_dts_sensors
//
-// Description: Updates sensors taht have data grabbed by the fast core data
+// Description: Updates sensors that have data grabbed by the fast core data
//
// Thread: RealTime Loop
//
// End Function Specification
-/* TODO - RTC 163359 Centaur support */
-#if 0
-void amec_update_centaur_dts_sensors(MemData * i_sensor_cache, uint8_t i_centaur)
+void amec_update_centaur_dts_sensors(CentaurMemData * i_sensor_cache, uint8_t i_centaur)
{
#define MIN_VALID_CENT_TEMP 1
#define MAX_VALID_CENT_TEMP 125 //according to Mike Pardiek
@@ -377,7 +367,6 @@ void amec_update_centaur_dts_sensors(MemData * i_sensor_cache, uint8_t i_centaur
AMEC_DBG("Centaur[%d]: HotCentaur=%d\n",i_centaur,l_dts);
}
-#endif
// Function Specification
//
@@ -393,7 +382,7 @@ void amec_update_centaur_temp_sensors(void)
uint32_t k, l_hot;
// -----------------------------------------------------------
- // Find hottest temperature from all centaurs for this P8 chip
+ // Find hottest temperature from all centaurs for this Proc chip
// -----------------------------------------------------------
for(l_hot = 0, k=0; k < MAX_NUM_CENTAURS; k++)
{
@@ -406,7 +395,7 @@ void amec_update_centaur_temp_sensors(void)
AMEC_DBG("HotCentaur=%d\n",l_hot);
// --------------------------------------------------------
- // Find hottest temperature from all DIMMs for this P8 chip
+ // Find hottest temperature from all DIMMs for this Proc chip
// --------------------------------------------------------
for(l_hot = 0, k=0; k < MAX_NUM_CENTAURS; k++)
{
@@ -430,9 +419,8 @@ void amec_update_centaur_temp_sensors(void)
// Thread: RealTime Loop
//
// End Function Specification
-/* TODO - RTC 163359 Centaur support */
-#if 0
-void amec_perfcount_getmc( MemData * i_sensor_cache,
+
+void amec_perfcount_getmc( CentaurMemData * i_sensor_cache,
uint8_t i_centaur)
{
/*------------------------------------------------------------------------*/
@@ -452,7 +440,7 @@ void amec_perfcount_getmc( MemData * i_sensor_cache,
/* Code */
/*------------------------------------------------------------------------*/
- MemData * l_sensor_cache = i_sensor_cache;
+ CentaurMemData * l_sensor_cache = i_sensor_cache;
for(i_mc_id=0; i_mc_id<2; i_mc_id++)
{
@@ -682,18 +670,17 @@ void amec_perfcount_getmc( MemData * i_sensor_cache,
// ------------------------------------------------------------
tempreg = g_amec->proc[0].memctl[i_centaur].centaur.portpair[0].perf.memread2ms;
tempreg += g_amec->proc[0].memctl[i_centaur].centaur.portpair[1].perf.memread2ms;
- sensor_update( (&(g_amec->proc[0].memctl[i_centaur].mrd2ms)), tempreg);
+ sensor_update( (&(g_amec->proc[0].memctl[i_centaur].mrd)), tempreg);
// -------------------------------------------------------------
// Sensor: MWRMx (0.01 Mrps) Memory write requests per sec
// -------------------------------------------------------------
tempreg = g_amec->proc[0].memctl[i_centaur].centaur.portpair[0].perf.memwrite2ms;
tempreg += g_amec->proc[0].memctl[i_centaur].centaur.portpair[1].perf.memwrite2ms;
- sensor_update( (&(g_amec->proc[0].memctl[i_centaur].mwr2ms)), tempreg);
+ sensor_update( (&(g_amec->proc[0].memctl[i_centaur].mwr)), tempreg);
return;
}
-#endif
/*----------------------------------------------------------------------------*/
/* End */
diff --git a/src/occ_405/amec/amec_slave_smh.c b/src/occ_405/amec/amec_slave_smh.c
index 0536ee6..703c9a2 100755
--- a/src/occ_405/amec/amec_slave_smh.c
+++ b/src/occ_405/amec/amec_slave_smh.c
@@ -429,8 +429,12 @@ void amec_slv_common_tasks_post(void)
// Call amec_power_control
amec_power_control();
- // Apply memory power control, if needed.
- amec_mem_power_control();
+ if (MEM_TYPE_CUMULUS != G_sysConfigData.mem_type)
+ {
+ // Nimbus only
+ // Apply memory power control, if needed.
+ amec_mem_power_control();
+ }
// Call the OCC slave's processor voting box
amec_slv_proc_voting_box();
@@ -488,12 +492,11 @@ void amec_slv_state_0(void)
{
AMEC_DBG("\tAMEC Slave State 0\n");
-/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
amec_update_centaur_sensors(CENTAUR_0);
-*/
+
//-------------------------------------------------------
// Update vector sensors
//-------------------------------------------------------
@@ -522,7 +525,6 @@ void amec_slv_state_1(void)
{
AMEC_DBG("\tAMEC Slave State 1\n");
-/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
@@ -532,7 +534,6 @@ void amec_slv_state_1(void)
// Update Proc Level Centaur/DIMM Temperature sensors
//-------------------------------------------------------
amec_update_centaur_temp_sensors();
-*/
}
@@ -547,12 +548,10 @@ void amec_slv_state_2(void)
{
AMEC_DBG("\tAMEC Slave State 2\n");
-/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
amec_update_centaur_sensors(CENTAUR_2);
-*/
// Call VRM Vdd thermal controller
amec_controller_vrm_vdd_thermal();
@@ -575,9 +574,7 @@ void amec_slv_state_3(void)
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
-/* Not yet supported TODO Centaur support RTC 163359
amec_update_centaur_sensors(CENTAUR_3);
-*/
//-------------------------------------------------------
// Perform amec_analytics (set amec_analytics_slot to 3)
@@ -601,12 +598,10 @@ void amec_slv_state_4(void)
{
AMEC_DBG("\tAMEC Slave State 4\n");
-/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
amec_update_centaur_sensors(CENTAUR_4);
-*/
//-------------------------------------------------------
// Run WOF Algorithm
@@ -629,9 +624,9 @@ void amec_slv_state_5(void)
AMEC_DBG("\tAMEC Slave State 5\n");
//-------------------------------------------------------
- // Update Centaur sensors (for this tick) TODO Centaur support RTC 163359
+ // Update Centaur sensors (for this tick)
//-------------------------------------------------------
-// amec_update_centaur_sensors(CENTAUR_5);
+ amec_update_centaur_sensors(CENTAUR_5);
//-------------------------------------------------------
// Update partition sensors for DPS algorithms (for this tick)
@@ -654,12 +649,10 @@ void amec_slv_state_6(void)
{
AMEC_DBG("\tAMEC Slave State 6\n");
-/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
amec_update_centaur_sensors(CENTAUR_6);
-*/
}
@@ -674,12 +667,10 @@ void amec_slv_state_7(void)
{
AMEC_DBG("\tAMEC Slave State 7\n");
-/* Not yet supported TODO Centaur support RTC 163359
//-------------------------------------------------------
// Update Centaur sensors (for this tick)
//-------------------------------------------------------
amec_update_centaur_sensors(CENTAUR_7);
-*/
}
// Function Specification
@@ -1313,9 +1304,11 @@ void amec_slv_substate_7_0(void)
// Call memory thermal controller based on DIMM temperature
amec_controller_dimm_thermal();
- // Call memory thermal controller based on Centaur temperature
- // TODO: RTC 163359 - OCC Centaur Support
- //amec_controller_centaur_thermal();
+ if (MEM_TYPE_CUMULUS == G_sysConfigData.mem_type)
+ {
+ // Call memory thermal controller based on Centaur temperature
+ amec_controller_centaur_thermal();
+ }
}
diff --git a/src/occ_405/cent/centaur_control.c b/src/occ_405/cent/centaur_control.c
index 1edb295..534aa9e 100755
--- a/src/occ_405/cent/centaur_control.c
+++ b/src/occ_405/cent/centaur_control.c
@@ -39,9 +39,9 @@
#include "rtls.h"
#include "apss.h"
#include "state.h"
-//#include "gpe_scom.h"
-//#include "centaur_firmware_registers.h"
-//#include "centaur_register_addresses.h"
+#include "centaur_structs.h"
+#include "centaur_firmware_registers.h"
+#include "centaur_register_addresses.h"
#include "amec_sys.h"
#include "memory.h"
@@ -78,9 +78,10 @@ typedef enum
//Pore flex request for the GPE job that is used for centaur init.
GpeRequest G_centaur_control_request;
-//TODO: RTC 163359 - not ready yet for centaur control data structures
-//GPE_BUFFER(GpeScomParms G_centaur_control_reg_parms);
-//GPE_BUFFER(scomList_t G_centaurThrottle[NUM_CENT_THROTTLE_SCOMS]);
+// @see CentaurScomParms in centaur_structs.h
+GPE_BUFFER(CentaurScomParms_t G_centaur_control_reg_parms);
+// scomList_t @see centaur_configuration.h
+GPE_BUFFER(scomList_t G_centaurThrottle[NUM_CENT_THROTTLE_SCOMS]);
//bitmap of configured MBA's (2 per centaur, lsb is centaur 0/mba 0)
//same variable used for tracking bit maps of rdimms (4 per mc, 2 mc pairs)
@@ -133,8 +134,6 @@ uint16_t centaurThrottle_convert2Numerator(uint16_t i_throttle, uint8_t i_cent,
return (uint16_t)l_nvalue;
}
-#if 0 // TODO: 163359 - Not Ready yet for centaur control
-
//////////////////////////
// Function Specification
//
@@ -235,15 +234,18 @@ void cent_update_nlimits(uint32_t i_cent)
// Name: centaur_control
//
// Description: Performs centaur control.
+// return TRUE settings changed HW needs to be updated.
+// return FALSE settings did not change
//
// End Function Specification
-void centaur_control( task_t* i_task )
+bool centaur_control( memory_control_task_t * i_memControlTask )
{
- amec_centaur_t *l_cent_ptr = NULL;
+ bool throttle_updated = TRUE;
+ amec_centaur_t *l_cent_ptr = NULL;
+ int l_cent = i_memControlTask->curMemIndex;
- // Pointer to parameter field for GPE request
- GpeScomParms * l_parms =
- (GpeScomParms *)(l_centControlTask->gpe_req.parameter);
+ CentaurScomParms_t * l_parms =
+ (CentaurScomParms_t *)(i_memControlTask->gpe_req.cmd_data);
do
{
@@ -278,15 +280,10 @@ void centaur_control( task_t* i_task )
( l_mba23_speed.word32 == l_cent_ptr->portpair[1].last_mem_speed_sent.word32 )
)
{
+ throttle_updated = FALSE;
break;
}
- //TRAC_INFO("task_centaur_control: New centaur[%d] throttle values mba01[0x%08x], mba23[0x%08x], throt[%d] ",
- // l_cent,
- // l_mba01_speed.word32,
- // l_mba23_speed.word32,
- // g_amec->mem_speed_request);
-
/// Set up Centuar Scom Registers - array of Scoms
/// [0]: N/M Throttle MBA01
/// [1]: N/M Throttle MBA23
@@ -296,7 +293,7 @@ void centaur_control( task_t* i_task )
if(MBA_CONFIGURED(l_cent, 0))
{
/// [0]: Set up N/M throttle MBA01
- G_centaurThrottle[NM_THROTTLE_MBA01].commandType = GPE_SCOM_RMW;
+ G_centaurThrottle[NM_THROTTLE_MBA01].commandType = CENTAUR_SCOM_RMW;
G_centaurThrottle[NM_THROTTLE_MBA01].instanceNumber = l_cent;
// Set up value to be written
l_mbafarbq.fields.cfg_nm_n_per_mba = l_mba01_n_per_mba;
@@ -305,14 +302,14 @@ void centaur_control( task_t* i_task )
}
else
{
- G_centaurThrottle[NM_THROTTLE_MBA01].commandType = GPE_SCOM_NOP;
+ G_centaurThrottle[NM_THROTTLE_MBA01].commandType = CENTAUR_SCOM_NOP;
}
//only write to MBA23 if configured
if(MBA_CONFIGURED(l_cent, 1))
{
/// [1]: Set up N/M throttle MBA23
- G_centaurThrottle[NM_THROTTLE_MBA23].commandType = GPE_SCOM_RMW;
+ G_centaurThrottle[NM_THROTTLE_MBA23].commandType = CENTAUR_SCOM_RMW;
G_centaurThrottle[NM_THROTTLE_MBA23].instanceNumber = l_cent;
// Set up value to be written
l_mbafarbq.fields.cfg_nm_n_per_mba = l_mba23_n_per_mba;
@@ -321,7 +318,7 @@ void centaur_control( task_t* i_task )
}
else
{
- G_centaurThrottle[NM_THROTTLE_MBA23].commandType = GPE_SCOM_NOP;
+ G_centaurThrottle[NM_THROTTLE_MBA23].commandType = CENTAUR_SCOM_NOP;
}
@@ -330,17 +327,15 @@ void centaur_control( task_t* i_task )
/// 0:7 select mask of MCS units
/// 8:15 select the sync type (12 = N/M throttle)
/// 57:63 must be zeros to address DW0 in cacheline
- //G_centaurThrottle[MBS_THROTTLE_SYNC].commandType = GPE_SCOM_NOP;
- G_centaurThrottle[MBS_THROTTLE_SYNC].commandType = GPE_SCOM_CENTAUR_SYNC_ALL;
+ //G_centaurThrottle[MBS_THROTTLE_SYNC].commandType = CENTAUR_SCOM_NOP;
+ G_centaurThrottle[MBS_THROTTLE_SYNC].commandType = CENTAUR_SCOM_CENTAUR_SYNC_ALL;
G_centaurThrottle[MBS_THROTTLE_SYNC].data = CENTAUR_RESET_N_M_THROTTLE_COUNTER_SYNC |
CENTAUR_MYSTERY_SYNC; //This is the "PC" sync bit
/// Set up GPE parameters
- l_parms->scomList = (uint32_t) (&G_centaurThrottle);
- l_parms->entries = 3;
- l_parms->options = 0;
- l_parms->rc = 0;
- l_parms->errorIndex = 0;
+ l_parms->scomList = G_centaurThrottle;
+ l_parms->entries = 2;
+ l_parms->error.ffdc = 0;
// Update the last sent throttle value, this will get
// cleared if the GPE does not complete successfully.
@@ -349,6 +344,7 @@ void centaur_control( task_t* i_task )
} while(0);
+ return throttle_updated;
}
@@ -391,21 +387,19 @@ void centaur_control_init( void )
G_centaurThrottle[NM_THROTTLE_MBA23].mask = l_mbafarbq.value;
// Set up GPE parameters
- G_centaur_control_reg_parms.rc = 0;
+ G_centaur_control_reg_parms.error.ffdc = 0;
G_centaur_control_reg_parms.entries = 0;
- G_centaur_control_reg_parms.scomList = (uint32_t) (&G_centaurThrottle[0]);
- G_centaur_control_reg_parms.options = 0;
- G_centaur_control_reg_parms.errorIndex = 0;
+ G_centaur_control_reg_parms.scomList = &G_centaurThrottle[0];
//--------------------------------------------------
- // Initializes PoreFlex for Centaur Control Task, but
+ // Initializes GPE Centaur Control Task, but
// doesn't actually run anything until RTL
//--------------------------------------------------
l_rc_gpe = gpe_request_create(
&G_memory_control_task.gpe_req, // gpe_req for the task
&G_async_gpe_queue1, // queue
- IPC_ST_CENTAUR_CONTROL_FUNCID, // Function ID
- (uint32_t) &G_centaur_control_reg_parms, // parm for the task
+ IPC_ST_CENTAUR_SCOM_FUNCID, // Function ID
+ &G_centaur_control_reg_parms, // parm for the task
SSX_WAIT_FOREVER, //
NULL, // callback
NULL, // callback argument
@@ -445,8 +439,8 @@ void centaur_control_init( void )
);
addUsrDtlsToErrl(l_err, //io_err
- (uint8_t *) &G_centaur_control_request.ffdc, //i_dataPtr,
- sizeof(PoreFfdc), //i_size
+ (uint8_t *) &G_centaur_control_request.ffdc, //i_dataPtr,
+ sizeof(GpeFfdc), //i_size
ERRL_USR_DTL_STRUCT_VERSION_1, //version
ERRL_USR_DTL_BINARY_DATA); //type
@@ -456,17 +450,19 @@ void centaur_control_init( void )
return;
}
-bool check_centaur_checkstop(uint8_t cent)
+bool check_centaur_checkstop(memory_control_task_t * i_memControlTask )
{
+ errlHndl_t l_err = NULL;
+ int cent = i_memControlTask->curMemIndex;
// Check if the centaur has a channel checkstop. If it does,
// then do not log any errors. We also don't want to throttle
// a centaur that is in this condition.
- if(!(cent_chan_checkstop(cent)))
+ if(G_centaur_control_reg_parms.error.rc != CENTAUR_CHANNEL_CHECKSTOP)
{
- TRAC_ERR("task_memory_control: gpe_scom_centaur failed. "
+ TRAC_ERR("task_memory_control: IPC_ST_CENTAUR_SCOM failed. "
"cent=%d rc=%x, index=0x%08x",
- cent, G_centaur_control_reg_parms.rc,
- G_centaur_control_reg_parms.errorIndex);
+ cent, G_centaur_control_reg_parms.error.rc,
+ G_centaur_control_reg_parms.error.addr);
/* @
* @errortype
@@ -484,20 +480,20 @@ bool check_centaur_checkstop(uint8_t cent)
ERRL_SEV_PREDICTIVE, // Severity
NULL, // Trace Buf
DEFAULT_TRACE_SIZE, // Trace Size
- G_centaur_control_reg_parms.rc, // userdata1
- G_centaur_control_reg_parms.errorIndex // userdata2
+ G_centaur_control_reg_parms.error.rc, // userdata1
+ G_centaur_control_reg_parms.error.addr // userdata2
);
addUsrDtlsToErrl(l_err, //io_err
- (uint8_t *) &(memControlTask->gpe_req.ffdc), //i_dataPtr,
- sizeof(PoreFfdc), //i_size
- ERRL_USR_DTL_STRUCT_VERSION_1, //version
- ERRL_USR_DTL_BINARY_DATA); //type
+ (uint8_t *) &(i_memControlTask->gpe_req.ffdc), //i_dataPtr,
+ sizeof(GpeFfdc), //i_size
+ ERRL_USR_DTL_STRUCT_VERSION_1, //version
+ ERRL_USR_DTL_BINARY_DATA); //type
//callout the centaur
addCalloutToErrl(l_err,
ERRL_CALLOUT_TYPE_HUID,
- G_sysConfigData.centaur_huids[memIndex],
+ G_sysConfigData.centaur_huids[cent],
ERRL_CALLOUT_PRIORITY_MED);
//callout the processor
@@ -515,5 +511,3 @@ bool check_centaur_checkstop(uint8_t cent)
}
-#endif // TODO: RTC 163359 - Not Ready yet for centaur control
-
diff --git a/src/occ_405/cent/centaur_control.h b/src/occ_405/cent/centaur_control.h
index afc766e..b6bb817 100755
--- a/src/occ_405/cent/centaur_control.h
+++ b/src/occ_405/cent/centaur_control.h
@@ -60,12 +60,13 @@ extern memory_control_task_t G_memory_control_task;
//*************************************************************************
//Collect centaur data for all centaur in specified range
-void centaur_control( task_t* i_task );
+//void centaur_control( task_t* i_task );
+bool centaur_control( memory_control_task_t * i_memControlTask );
//Initialize structures for collecting centaur data.
//void centaur_control_init( void ) INIT_SECTION;
void centaur_control_init( void );
-bool check_centaur_checkstop(uint8_t cent);
+bool check_centaur_checkstop( memory_control_task_t * i_memControlTask );
#endif //_CENTAUR_CONTROL_H
diff --git a/src/occ_405/cent/centaur_data.c b/src/occ_405/cent/centaur_data.c
index 98636f2..4228c03 100755
--- a/src/occ_405/cent/centaur_data.c
+++ b/src/occ_405/cent/centaur_data.c
@@ -38,8 +38,10 @@
#include "apss.h"
#include "state.h"
#include "occhw_scom.h"
-//#include "centaur_firmware_registers.h"
-//#include "centaur_register_addresses.h"
+#include "centaur_structs.h"
+#include "centaur_mem_data.h"
+#include "centaur_firmware_registers.h"
+#include "centaur_register_addresses.h"
//*************************************************************************/
// Externs
@@ -90,36 +92,49 @@ typedef enum
// Globals
//*************************************************************************/
-/* TODO 163359: PORE/MemData issues */
-#if 0
+/**
+ * GPE shared data area for gpe0 tracebuffer and size
+ */
+extern gpe_shared_data_t G_shared_gpe_data;
+
+//Notes MemData is defined @
+// /afs/awd/proj/p9/eclipz/KnowledgeBase/eclipz/chips/p8/working/procedures/lib/gpe_data.h
+// struct {
+// MemDataMcs mcs; // not used
+// MemDataSensorCache scache;
+// } MemData;
//Global array of centaur data buffers
-GPE_BUFFER(MemData G_centaur_data[NUM_CENTAUR_DATA_BUFF +
+GPE_BUFFER(CentaurMemData G_centaur_data[NUM_CENTAUR_DATA_BUFF +
NUM_CENTAUR_DOUBLE_BUF +
NUM_CENTAUR_DATA_EMPTY_BUF]);
//pore request for scoming centaur registers
-PoreFlex G_cent_scom_req;
+GpeRequest G_cent_scom_req; // p8/working/procedures/ssx/pgp/pgp_async.h
-//input/output parameters for gpe_scom_centaur()
-GPE_BUFFER(GpeScomParms G_cent_scom_gpe_parms);
+//input/output parameters for IPC_ST_CENTAUR_SCOM()
+GPE_BUFFER(CentaurScomParms_t G_cent_scom_gpe_parms);
//scom command list entry
GPE_BUFFER(scomList_t G_cent_scom_list_entry[NUM_CENT_OPS]);
-//buffer for storing output from running gpe_scom_centaur()
+//buffer for storing output from running IPC_ST_CENTAUR_SCOM()
GPE_BUFFER(uint64_t G_cent_scom_data[MAX_NUM_CENTAURS]) = {0};
+// parms for call to IPC_ST_CENTAUR_INIT_FUNCID
+GPE_BUFFER(CentaurConfigParms_t G_gpe_centaur_config_args);
+
+GPE_BUFFER(CentaurConfiguration_t G_centaurConfiguration);
//Global array of centaur data pointers
-MemData * G_centaur_data_ptrs[MAX_NUM_CENTAURS] = { &G_centaur_data[0],
+CentaurMemData * G_centaur_data_ptrs[MAX_NUM_CENTAURS] = { &G_centaur_data[0],
&G_centaur_data[1], &G_centaur_data[2], &G_centaur_data[3],
&G_centaur_data[4], &G_centaur_data[5], &G_centaur_data[6],
&G_centaur_data[7]};
//Global structures for gpe get mem data parms
-GPE_BUFFER(GpeGetMemDataParms G_centaur_data_parms);
+GPE_BUFFER(CentaurGetMemDataParms_t G_centaur_data_parms);
//Pore flex request for the GPE job that is used for centaur init.
-PoreFlex G_centaur_reg_pore_req;
+GpeRequest G_centaur_reg_gpe_req;
//Centaur structures used for task data pointers.
centaur_data_task_t G_centaur_data_task = {
@@ -127,9 +142,9 @@ centaur_data_task_t G_centaur_data_task = {
.current_centaur = 0,
.end_centaur = 7,
.prev_centaur = 7,
- .centaur_data_ptr = &G_centaur_data[8]
+ .centaur_data_ptr = &G_centaur_data[MAX_NUM_CENTAURS]
};
-#endif
+
dimm_sensor_flags_t G_dimm_enabled_sensors = {0};
dimm_sensor_flags_t G_dimm_present_sensors = {0};
@@ -177,67 +192,10 @@ uint8_t G_centaur_nest_lfir6 = 0;
//number of SC polls to wait between i2c recovery attempts
#define CENT_SC_MAX_INTERVAL 256
-/* TODO: RTC 163359 - Reenable when needed */
-#if 0
//determine scom address of MCIFIR register for given Centaur n
#define MCS0_MCIFIR_N(n) \
( (n<4)? (MCS0_MCIFIR + ((MCS1_MCIFIR - MCS0_MCIFIR) * (n))) : (MCS4_MCIFIR + ((MCS5_MCIFIR - MCS4_MCIFIR) * (n-4))) )
-#endif
-
-//mask for channel checkstop
-#define MCIFIR_CHAN_CKSTOP_MASK 0x0000000100000000
-
-/* TODO: RTC 163359 - Reenable when needed */
-#if 0
-bool cent_chan_checkstop(const uint8_t i_cent)
-{
- uint32_t l_scom_addr = 0;
- bool l_rc = FALSE;
- uint64_t l_data;
- int l_scom_rc = 0;
-
- // TODO: RTC 163359 Centaur support
- // We are unable to SCOM from the 405, so this scom was removed.
- // Will need to determine how to get this information in the future.
-
- if(!l_scom_rc)
- {
- //check for channel checkstop (bit 31)
- if(l_data & MCIFIR_CHAN_CKSTOP_MASK)
- {
- l_rc = TRUE;
-
- if(CENTAUR_PRESENT(i_cent))
- {
- //remove checkstopped centaur from presence bitmap
- G_present_centaurs &= ~(CENTAUR_BY_MASK(i_cent));
-
- //remove the dimm temperature sensors behind this centaur from presence bitmap
- G_dimm_enabled_sensors.bytes[i_cent] = 0x00;
- TRAC_IMP("Channel checkstop detected on Centaur[%d] scom_addr[0x%08X] G_present_centaurs[0x%08X]",
- i_cent,
- l_scom_addr,
- G_present_centaurs);
-
- TRAC_IMP("Updated bitmap of enabled dimm temperature sensors: 0x%08X %08X",
- G_dimm_enabled_sensors.words[0],
- G_dimm_enabled_sensors.words[1]);
- }
- }
- }
- else
- {
- TRAC_ERR("cent_chan_checkstop: Error accessing MCIFIR register for Centaur[%d] scom_addr[0x%08X]",
- i_cent,
- l_scom_addr);
- }
- return l_rc;
-}
-#endif // #if 0
-
-/* TODO: RTC 163359 - Reenable when needed */
-#if 0
void cent_recovery(uint32_t i_cent)
{
int l_rc = 0;
@@ -293,22 +251,23 @@ void cent_recovery(uint32_t i_cent)
//Check for failure and log an error if we haven't already logged one for this centaur
//but keep retrying.
if(L_gpe_scheduled &&
- (!async_request_completed(&G_cent_scom_req.request) || G_cent_scom_gpe_parms.rc) &&
+ (!async_request_completed(&G_cent_scom_req.request) ||
+ G_cent_scom_gpe_parms.error.rc) &&
(!(L_cent_callouts & l_cent_mask)))
{
// Check if the centaur has a channel checkstop. If it does, then do not
// log any errors
- if(!(cent_chan_checkstop(l_prev_cent)))
+ if(G_cent_scom_gpe_parms.error.rc != CENTAUR_CHANNEL_CHECKSTOP)
{
//Mark the centaur as being called out
L_cent_callouts |= l_cent_mask;
// There was an error doing the recovery scoms
- TRAC_ERR("cent_recovery: gpe_scom_centaur failed. rc[0x%08x] cent[%d] entries[%d] errorIndex[0x%08X]",
- G_cent_scom_gpe_parms.rc,
+ TRAC_ERR("cent_recovery: IPC_ST_CENTAUR_SCOM failed. rc[0x%08x] cent[%d] entries[%d] errorIndex[0x%08X]",
+ G_cent_scom_gpe_parms.error.rc,
l_prev_cent,
G_cent_scom_gpe_parms.entries,
- G_cent_scom_gpe_parms.errorIndex);
+ G_cent_scom_gpe_parms.error.addr);
/* @
* @errortype
@@ -326,14 +285,14 @@ void cent_recovery(uint32_t i_cent)
ERRL_SEV_PREDICTIVE, //Severity
NULL, //Trace Buf
DEFAULT_TRACE_SIZE, //Trace Size
- G_cent_scom_gpe_parms.rc, //userdata1
- G_cent_scom_gpe_parms.errorIndex //userdata2
+ G_cent_scom_gpe_parms.error.rc, //userdata1
+ G_cent_scom_gpe_parms.error.addr //userdata2
);
//dump ffdc contents collected by ssx
addUsrDtlsToErrl(l_err, //io_err
(uint8_t *) &(G_cent_scom_req.ffdc), //i_dataPtr,
- sizeof(PoreFfdc), //i_size
+ sizeof(GpeFfdc), //i_size
ERRL_USR_DTL_STRUCT_VERSION_1, //version
ERRL_USR_DTL_BINARY_DATA); //type
@@ -467,17 +426,17 @@ void cent_recovery(uint32_t i_cent)
//check if this centaur requires lfir6 recovery
if(G_centaur_nest_lfir6 & l_cent_mask)
{
- //Set the command type from GPE_SCOM_NOP to GPE_SCOM_RMW
+ //Set the command type from CENTAUR_SCOM_NOP to CENTAUR_SCOM_RMW
//these entries will reset the centaur DTS FSM and clear LFIR 6
//if recovery worked, LFIR 6 should remain cleared.
- G_cent_scom_list_entry[RESET_DTS_FSM].commandType = GPE_SCOM_WRITE;
- G_cent_scom_list_entry[CLEAR_NEST_LFIR6].commandType = GPE_SCOM_WRITE;
+ G_cent_scom_list_entry[RESET_DTS_FSM].commandType = CENTAUR_SCOM_WRITE;
+ G_cent_scom_list_entry[CLEAR_NEST_LFIR6].commandType = CENTAUR_SCOM_WRITE;
}
else
{
//these ops aren't needed so disable them
- G_cent_scom_list_entry[RESET_DTS_FSM].commandType = GPE_SCOM_NOP;
- G_cent_scom_list_entry[CLEAR_NEST_LFIR6].commandType = GPE_SCOM_NOP;
+ G_cent_scom_list_entry[RESET_DTS_FSM].commandType = CENTAUR_SCOM_NOP;
+ G_cent_scom_list_entry[CLEAR_NEST_LFIR6].commandType = CENTAUR_SCOM_NOP;
}
//Decrement the delay counter for centaur i2c recovery
@@ -507,13 +466,13 @@ void cent_recovery(uint32_t i_cent)
//clear the request for i2c recovery here
G_centaur_needs_recovery &= ~l_cent_mask;
- //Set the command type from GPE_SCOM_NOP to GPE_SCOM_RMW
+ //Set the command type from CENTAUR_SCOM_NOP to CENTAUR_SCOM_RMW
//this entry will disable the centaur sensor cache and
//set a flag to finish the recovery in a later call of this
//function (cent_recovery for a given centaur is called every
//2 msec)
- G_cent_scom_list_entry[DISABLE_SC].commandType = GPE_SCOM_RMW;
- G_cent_scom_list_entry[ENABLE_SC].commandType = GPE_SCOM_NOP;
+ G_cent_scom_list_entry[DISABLE_SC].commandType = CENTAUR_SCOM_RMW;
+ G_cent_scom_list_entry[ENABLE_SC].commandType = CENTAUR_SCOM_NOP;
L_i2c_finish_recovery[i_cent] = TRUE;
}
}
@@ -533,8 +492,8 @@ void cent_recovery(uint32_t i_cent)
}
//these ops aren't needed so disable them
- G_cent_scom_list_entry[DISABLE_SC].commandType = GPE_SCOM_NOP;
- G_cent_scom_list_entry[ENABLE_SC].commandType = GPE_SCOM_NOP;
+ G_cent_scom_list_entry[DISABLE_SC].commandType = CENTAUR_SCOM_NOP;
+ G_cent_scom_list_entry[ENABLE_SC].commandType = CENTAUR_SCOM_NOP;
// Finish the i2c recovery if it was started for this centaur
if(L_i2c_finish_recovery[i_cent] == TRUE)
@@ -545,11 +504,11 @@ void cent_recovery(uint32_t i_cent)
//clear the finish_recovery flag for this centaur
L_i2c_finish_recovery[i_cent] = FALSE;
- //Set the command type from GPE_SCOM_NOP to GPE_SCOM_RMW
+ //Set the command type from CENTAUR_SCOM_NOP to CENTAUR_SCOM_RMW
//this entry will re-enable the centaur sensor cache
//which will also cause the i2c master to be reset
- G_cent_scom_list_entry[DISABLE_SC].commandType = GPE_SCOM_NOP;
- G_cent_scom_list_entry[ENABLE_SC].commandType = GPE_SCOM_RMW;
+ G_cent_scom_list_entry[DISABLE_SC].commandType = CENTAUR_SCOM_NOP;
+ G_cent_scom_list_entry[ENABLE_SC].commandType = CENTAUR_SCOM_RMW;
}
}
@@ -564,17 +523,15 @@ void cent_recovery(uint32_t i_cent)
G_cent_scom_list_entry[READ_SCAC_LFIR].instanceNumber = i_cent;
// Set up GPE parameters
- G_cent_scom_gpe_parms.rc = 0;
+ G_cent_scom_gpe_parms.error.ffdc = 0;
G_cent_scom_gpe_parms.entries = NUM_CENT_OPS;
- G_cent_scom_gpe_parms.scomList = (uint32_t) (&G_cent_scom_list_entry[0]);
- G_cent_scom_gpe_parms.options = 0;
- G_cent_scom_gpe_parms.errorIndex = 0;
+ G_cent_scom_gpe_parms.scomList = &G_cent_scom_list_entry[0];
- // Submit Pore GPE without blocking
- l_rc = pore_flex_schedule(&G_cent_scom_req);
+ // Submit GPE request without blocking
+ l_rc = gpe_request_schedule(&G_cent_scom_req);
if(l_rc)
{
- TRAC_ERR("cent_recovery: pore_flex_schedule failed. rc = 0x%08x", l_rc);
+ TRAC_ERR("cent_recovery: gpe_request_schedule failed. rc = 0x%08x", l_rc);
/* @
* @errortype
* @moduleid CENT_RECOVERY_MOD
@@ -602,7 +559,6 @@ void cent_recovery(uint32_t i_cent)
}while(0);
}
-#endif // #if 0
// Function Specification
//
@@ -612,15 +568,14 @@ void cent_recovery(uint32_t i_cent)
// collection
//
// End Function Specification
-/* TODO: RTC 163359 - Reenable when needed */
-#if 0
-void task_centaur_data( task_t * i_task )
+void centaur_data( void )
{
errlHndl_t l_err = NULL; // Error handler
int rc = 0; // Return code
- MemData * l_temp = NULL;
- centaur_data_task_t * l_centaur_data_ptr = (centaur_data_task_t *)i_task->data_ptr;
- GpeGetMemDataParms * l_parms = (GpeGetMemDataParms *)(l_centaur_data_ptr->gpe_req.parameter);
+ CentaurMemData * l_temp = NULL;
+ centaur_data_task_t * l_centaur_data_ptr = &G_centaur_data_task;
+ CentaurGetMemDataParms_t * l_parms =
+ (CentaurGetMemDataParms_t *)(l_centaur_data_ptr->gpe_req.cmd_data);
static bool L_gpe_scheduled = FALSE;
static bool L_gpe_error_logged = FALSE;
static bool L_gpe_had_1_tick = FALSE;
@@ -684,11 +639,11 @@ void task_centaur_data( task_t * i_task )
{
//If the request is idle but not completed then there was an error
//(as long as the request was scheduled).
- if(!async_request_completed(&l_centaur_data_ptr->gpe_req.request) || l_parms->rc )
+ if(!async_request_completed(&l_centaur_data_ptr->gpe_req.request) || l_parms->error.rc )
{
// Check if the centaur has a channel checkstop. If it does, then do not
// log any errors
- if(!(cent_chan_checkstop(l_centaur_data_ptr->prev_centaur)))
+ if(G_cent_scom_gpe_parms.error.rc != CENTAUR_CHANNEL_CHECKSTOP)
{
//log an error the first time this happens but keep on running.
//eventually, we will timeout on the dimm & centaur temps not being updated
@@ -699,16 +654,15 @@ void task_centaur_data( task_t * i_task )
L_gpe_error_logged = TRUE;
// There was an error collecting the centaur sensor cache
- TRAC_ERR("task_centaur_data: gpe_get_mem_data failed. rc=0x%08x%08x, cur=%d, prev=%d",
- (uint32_t)(l_parms->rc >> 32),
- (uint32_t)(l_parms->rc),
+ TRAC_ERR("task_centaur_data: gpe_get_mem_data failed. rc=0x%08x, cur=%d, prev=%d",
+ l_parms->error.rc,
l_centaur_data_ptr->current_centaur,
l_centaur_data_ptr->prev_centaur);
/* @
* @errortype
* @moduleid CENT_TASK_DATA_MOD
* @reasoncode CENT_SCOM_ERROR
- * @userdata1 l_parms->rc
+ * @userdata1 l_parms->error.rc
* @userdata2 0
* @userdata4 OCC_NO_EXTENDED_RC
* @devdesc Failed to get centaur data
@@ -720,18 +674,18 @@ void task_centaur_data( task_t * i_task )
ERRL_SEV_PREDICTIVE, //Severity
NULL, //Trace Buf
DEFAULT_TRACE_SIZE, //Trace Size
- l_parms->rc, //userdata1
+ l_parms->error.rc, //userdata1
0 //userdata2
);
addUsrDtlsToErrl(l_err, //io_err
(uint8_t *) &(l_centaur_data_ptr->gpe_req.ffdc), //i_dataPtr,
- sizeof(PoreFfdc), //i_size
+ sizeof(GpeFfdc), //i_size
ERRL_USR_DTL_STRUCT_VERSION_1, //version
ERRL_USR_DTL_BINARY_DATA); //type
//Callouts depend on the return code of the gpe_get_mem_data procedure
- if(l_parms->rc == GPE_GET_MEM_DATA_DIED)
+ if(l_parms->error.rc == CENTAUR_GET_MEM_DATA_DIED)
{
//callout the processor
addCalloutToErrl(l_err,
@@ -739,7 +693,7 @@ void task_centaur_data( task_t * i_task )
G_sysConfigData.proc_huid,
ERRL_CALLOUT_PRIORITY_LOW);
}
- else if(l_parms->rc == GPE_GET_MEM_DATA_SENSOR_CACHE_FAILED)
+ else if(l_parms->error.rc == CENTAUR_GET_MEM_DATA_SENSOR_CACHE_FAILED)
{
//callout the previous centaur if present
if(CENTAUR_PRESENT(l_centaur_data_ptr->prev_centaur))
@@ -756,7 +710,7 @@ void task_centaur_data( task_t * i_task )
G_sysConfigData.proc_huid,
ERRL_CALLOUT_PRIORITY_LOW);
}
- else if(l_parms->rc == GPE_GET_MEM_DATA_UPDATE_FAILED)
+ else if(l_parms->error.rc == CENTAUR_GET_MEM_DATA_UPDATE_FAILED)
{
//callout the current centaur if present
if(CENTAUR_PRESENT(l_centaur_data_ptr->current_centaur))
@@ -868,16 +822,16 @@ void task_centaur_data( task_t * i_task )
l_parms->update = -1;
}
- l_parms->data = (uint32_t) l_centaur_data_ptr->centaur_data_ptr;
- l_parms->rc = 0;
+ l_parms->data = (uint64_t *)(l_centaur_data_ptr->centaur_data_ptr);
+ l_parms->error.ffdc = 0;
// Pore flex schedule gpe_get_mem_data
- // Check pore_flex_schedule return code if error
+ // Check gpe_request_schedule return code if error
// then request OCC reset.
- rc = pore_flex_schedule( &(l_centaur_data_ptr->gpe_req) );
+ rc = gpe_request_schedule( &(l_centaur_data_ptr->gpe_req) );
if(rc)
{
- TRAC_ERR("task_centaur_data: pore_flex_schedule failed for centaur data collection. rc=%d", rc);
+ TRAC_ERR("task_centaur_data: gpe_request_schedule failed for centaur data collection. rc=%d", rc);
/* @
* @errortype
* @moduleid CENT_TASK_DATA_MOD
@@ -895,12 +849,12 @@ void task_centaur_data( task_t * i_task )
NULL, //Trace Buf
DEFAULT_TRACE_SIZE, //Trace Size
rc, //userdata1
- l_parms->rc //userdata2
+ l_parms->error.rc //userdata2
);
addUsrDtlsToErrl(l_err, //io_err
(uint8_t *) &(l_centaur_data_ptr->gpe_req.ffdc), //i_dataPtr,
- sizeof(PoreFfdc), //i_size
+ sizeof(GpeFfdc), //i_size
ERRL_USR_DTL_STRUCT_VERSION_1, //version
ERRL_USR_DTL_BINARY_DATA); //type
@@ -911,16 +865,16 @@ void task_centaur_data( task_t * i_task )
L_gpe_scheduled = TRUE;
}
- } while(0);
+ }
+ while(0);
- //handle centaur i2c recovery requests and centaur workaround
+ //handle centaur i2c recovery requests and centaur workaround - Needed for P9??
if(CENTAUR_PRESENT(l_centaur_data_ptr->current_centaur))
{
cent_recovery(l_centaur_data_ptr->current_centaur);
}
return;
}
-#endif // #if 0
#define CENTAUR_SENSCACHE_ENABLE 0x020115CC
// Function Specification
@@ -930,8 +884,6 @@ void task_centaur_data( task_t * i_task )
// Description: Reads
//
// End Function Specification
-/* TODO: RTC 163359 - Reenable when needed */
-#if 0
int cent_get_enabled_sensors()
{
int l_rc = 0;
@@ -941,37 +893,36 @@ int cent_get_enabled_sensors()
{
// Set up scom list entry (there's only 1)
G_cent_scom_list_entry[0].scom = CENTAUR_SENSCACHE_ENABLE; //scom address
- G_cent_scom_list_entry[0].commandType = GPE_SCOM_READ_VECTOR; //scom operation to perform
+ G_cent_scom_list_entry[0].commandType = CENTAUR_SCOM_READ_VECTOR; //scom operation to perform
G_cent_scom_list_entry[0].instanceNumber = 0; //Ignored for READ_VECTOR operation
G_cent_scom_list_entry[0].pData = (uint64_t *) G_cent_scom_data; //scom data will be stored here
// Set up GPE parameters
- G_cent_scom_gpe_parms.rc = 0;
+ G_cent_scom_gpe_parms.error.ffdc = 0;
G_cent_scom_gpe_parms.entries = 1;
- G_cent_scom_gpe_parms.scomList = (uint32_t) (&G_cent_scom_list_entry[0]);
- G_cent_scom_gpe_parms.options = 0;
- G_cent_scom_gpe_parms.errorIndex = 0;
+ G_cent_scom_gpe_parms.scomList = &G_cent_scom_list_entry[0];
//Initializes PoreFlex
- l_rc = pore_flex_create( &G_cent_scom_req, // gpe_req for the task
- &G_pore_gpe1_queue, // queue
- gpe_scom_centaur, // entry point
- (uint32_t) &G_cent_scom_gpe_parms, // parm for the task
- SSX_SECONDS(2), // timeout
- NULL, // callback
- NULL, // callback argument
- ASYNC_REQUEST_BLOCKING ); // options
+ l_rc = gpe_request_create(
+ &G_cent_scom_req, // gpe_req for the task
+ &G_async_gpe_queue1, // queue
+ IPC_ST_CENTAUR_SCOM_FUNCID, // Function ID
+ &G_cent_scom_gpe_parms, // parm for the task
+ SSX_SECONDS(2), // timeout
+ NULL, // callback
+ NULL, // callback argument
+ ASYNC_REQUEST_BLOCKING ); // options
if(l_rc)
{
- TRAC_ERR("cent_get_enabled_sensors: pore_flex_create failed. rc = 0x%08x", l_rc);
+ TRAC_ERR("cent_get_enabled_sensors: gpe_request_create failed. rc = 0x%08x", l_rc);
break;
}
// Submit Pore GPE and wait for completion
- l_rc = pore_flex_schedule(&G_cent_scom_req);
+ l_rc = gpe_request_schedule(&G_cent_scom_req);
if(l_rc)
{
- TRAC_ERR("cent_get_enabled_sensors: pore_flex_schedule failed. rc = 0x%08x", l_rc);
+ TRAC_ERR("cent_get_enabled_sensors: gpe_request_schedule failed. rc = 0x%08x", l_rc);
break;
}
@@ -980,6 +931,7 @@ int cent_get_enabled_sensors()
{
G_dimm_enabled_sensors.bytes[l_cent] = ((uint8_t*)(&G_cent_scom_data[l_cent]))[0];
}
+ G_dimm_present_sensors = G_dimm_enabled_sensors;
TRAC_IMP("bitmap of enabled dimm temperature sensors: 0x%08X %08X",
G_dimm_enabled_sensors.words[0],
@@ -987,7 +939,6 @@ int cent_get_enabled_sensors()
}while(0);
return l_rc;
}
-#endif // #if 0
// Function Specification
//
@@ -998,15 +949,13 @@ int cent_get_enabled_sensors()
// This will also initialize the centaur watchdog.
//
// End Function Specification
-/* TODO: RTC 163359 - Reenable when needed */
-#if 0
void centaur_init( void )
{
errlHndl_t l_err = NULL; // Error handler
int rc = 0; // Return code
int l_jj = 0; // Indexer
static scomList_t L_scomList[2] SECTION_ATTRIBUTE(".noncacheable");
- static GpeScomParms L_centaur_reg_parms SECTION_ATTRIBUTE(".noncacheable");
+ static CentaurScomParms_t L_centaur_reg_parms SECTION_ATTRIBUTE(".noncacheable");
do
{
@@ -1019,11 +968,9 @@ void centaur_init( void )
/// Before anything else, we need to call this procedure to
/// determine which Centaurs are out there, their config info.
/// and Type/EC Level
-
- rc = centaur_configuration_create();
+ rc = centaur_configuration_create(&G_centaurConfiguration);
if( rc )
{
- TRAC_ERR("centaur_init: Centaur Config Create failed with rc=0x%08x ", rc );
break;
}
@@ -1045,7 +992,7 @@ void centaur_init( void )
G_present_centaurs |= (CENTAUR0_PRESENT_MASK >> l_jj);
// Trace out the CFAM Chip ID, which includes Type & EC
- TRAC_INFO("centaur_init: Centaur[%d] Found, Chip Id=0x%08x",l_jj, mb_id(l_jj));
+ TRAC_INFO("centaur_init: Centaur[%d] Found, Chip Id= 0x%08x",l_jj);
}
}
}
@@ -1057,49 +1004,49 @@ void centaur_init( void )
// Set up recovery scom list entries
G_cent_scom_list_entry[L4_LINE_DELETE].scom = MBCCFGQ_REG; //scom address
- G_cent_scom_list_entry[L4_LINE_DELETE].commandType = GPE_SCOM_RMW; //scom operation to perform
+ G_cent_scom_list_entry[L4_LINE_DELETE].commandType = CENTAUR_SCOM_RMW; //scom operation to perform
G_cent_scom_list_entry[L4_LINE_DELETE].mask = LINE_DELETE_ON_NEXT_CE; //mask of bits to change
G_cent_scom_list_entry[L4_LINE_DELETE].data = LINE_DELETE_ON_NEXT_CE; //scom data (always set the bit)
//one time init for reading LFIR6
G_cent_scom_list_entry[READ_NEST_LFIR6].scom = CENT_NEST_LFIR_REG; //scom address
- G_cent_scom_list_entry[READ_NEST_LFIR6].commandType = GPE_SCOM_READ; //scom operation to perform
+ G_cent_scom_list_entry[READ_NEST_LFIR6].commandType = CENTAUR_SCOM_READ; //scom operation to perform
G_cent_scom_list_entry[READ_NEST_LFIR6].mask = 0; //mask (not used for reads)
G_cent_scom_list_entry[READ_NEST_LFIR6].data = 0; //scom data (initialize to 0)
//one time init for reading centaur thermal status register
G_cent_scom_list_entry[READ_THERM_STATUS].scom = CENT_THRM_STATUS_REG; //scom address
- G_cent_scom_list_entry[READ_THERM_STATUS].commandType = GPE_SCOM_READ; //scom operation to perform
+ G_cent_scom_list_entry[READ_THERM_STATUS].commandType = CENTAUR_SCOM_READ; //scom operation to perform
G_cent_scom_list_entry[READ_THERM_STATUS].mask = 0; //mask (not used for reads)
G_cent_scom_list_entry[READ_THERM_STATUS].data = 0; //scom data (initialize to 0)
//one time init to reset the centaur dts FSM
G_cent_scom_list_entry[RESET_DTS_FSM].scom = CENT_THRM_CTRL_REG; //scom address
- G_cent_scom_list_entry[RESET_DTS_FSM].commandType = GPE_SCOM_NOP; //init to no-op (only runs if needed)
+ G_cent_scom_list_entry[RESET_DTS_FSM].commandType = CENTAUR_SCOM_NOP; //init to no-op (only runs if needed)
G_cent_scom_list_entry[RESET_DTS_FSM].mask = 0; //mask (not used for writes)
G_cent_scom_list_entry[RESET_DTS_FSM].data = CENT_THRM_CTRL4; //scom data (sets bit4)
//one time init to clear centaur NEST LFIR 6
G_cent_scom_list_entry[CLEAR_NEST_LFIR6].scom = CENT_NEST_LFIR_AND_REG; //scom address
- G_cent_scom_list_entry[CLEAR_NEST_LFIR6].commandType = GPE_SCOM_NOP; //init to no-op (only runs if needed)
+ G_cent_scom_list_entry[CLEAR_NEST_LFIR6].commandType = CENTAUR_SCOM_NOP; //init to no-op (only runs if needed)
G_cent_scom_list_entry[CLEAR_NEST_LFIR6].mask = 0; //mask (not used for writes)
G_cent_scom_list_entry[CLEAR_NEST_LFIR6].data = ~CENT_NEST_LFIR6; //scom data
//one time init to disable centaur sensor cache
G_cent_scom_list_entry[DISABLE_SC].scom = SCAC_CONFIG_REG; //scom address
- G_cent_scom_list_entry[DISABLE_SC].commandType = GPE_SCOM_NOP; //init to no-op (only runs if needed)
+ G_cent_scom_list_entry[DISABLE_SC].commandType = CENTAUR_SCOM_NOP; //init to no-op (only runs if needed)
G_cent_scom_list_entry[DISABLE_SC].mask = SCAC_MASTER_ENABLE; //mask of bits to change
G_cent_scom_list_entry[DISABLE_SC].data = 0; //scom data (disable sensor cache)
//one time init to enable centaur sensor cache
G_cent_scom_list_entry[ENABLE_SC].scom = SCAC_CONFIG_REG; //scom address
- G_cent_scom_list_entry[ENABLE_SC].commandType = GPE_SCOM_NOP; //init to no-op (only runs if needed)
+ G_cent_scom_list_entry[ENABLE_SC].commandType = CENTAUR_SCOM_NOP; //init to no-op (only runs if needed)
G_cent_scom_list_entry[ENABLE_SC].mask = SCAC_MASTER_ENABLE; //mask of bits to change
G_cent_scom_list_entry[ENABLE_SC].data = SCAC_MASTER_ENABLE; //scom data (enable sensor cache)
//one time init for reading centaur sensor cache lfir
G_cent_scom_list_entry[READ_SCAC_LFIR].scom = SCAC_LFIR_REG; //scom address
- G_cent_scom_list_entry[READ_SCAC_LFIR].commandType = GPE_SCOM_READ; //scom operation to perform
+ G_cent_scom_list_entry[READ_SCAC_LFIR].commandType = CENTAUR_SCOM_READ; //scom operation to perform
G_cent_scom_list_entry[READ_SCAC_LFIR].mask = 0; //mask (not used for reads)
G_cent_scom_list_entry[READ_SCAC_LFIR].data = 0; //scom data (initialize to 0)
@@ -1108,7 +1055,7 @@ void centaur_init( void )
/// NOTE: max timeout is about 2 seconds.
L_scomList[0].scom = CENTAUR_MBSCFGQ;
- L_scomList[0].commandType = GPE_SCOM_RMW_ALL;
+ L_scomList[0].commandType = CENTAUR_SCOM_RMW_ALL;
centaur_mbscfgq_t l_mbscfg;
l_mbscfg.value = 0;
@@ -1125,7 +1072,7 @@ void centaur_init( void )
/// [1]: clear the emergency throttle bit
L_scomList[1].scom = CENTAUR_MBSEMERTHROQ;
- L_scomList[1].commandType = GPE_SCOM_RMW_ALL;
+ L_scomList[1].commandType = CENTAUR_SCOM_RMW_ALL;
centaur_mbsemerthroq_t l_mbs_et;
l_mbs_et.value = 0;
@@ -1137,40 +1084,39 @@ void centaur_init( void )
l_mbs_et.fields.emergency_throttle_ip = 1;
L_scomList[1].mask = l_mbs_et.value;
- L_centaur_reg_parms.scomList = (uint32_t) (&L_scomList[0]);
+ L_centaur_reg_parms.scomList = &L_scomList[0];
L_centaur_reg_parms.entries = 2;
- L_centaur_reg_parms.options = 0;
- L_centaur_reg_parms.rc = 0;
- L_centaur_reg_parms.errorIndex = 0;
-
- //Initialize PoreFlex
- rc = pore_flex_create( &G_centaur_reg_pore_req, //gpe_req for the task
- &G_pore_gpe1_queue, //queue
- gpe_scom_centaur, //entry point
- (uint32_t) &L_centaur_reg_parms, //parm for the task
- SSX_SECONDS(5), //no timeout
+ L_centaur_reg_parms.error.ffdc = 0;
+
+ //Initialize GPE request
+ rc = gpe_request_create(
+ &G_centaur_reg_gpe_req, //gpe_req for the task
+ &G_async_gpe_queue1, //queue
+ IPC_ST_CENTAUR_SCOM_FUNCID, // Function ID
+ &L_centaur_reg_parms, //parm for the task
+ SSX_SECONDS(5), //timeout
NULL, //callback
NULL, //callback argument
ASYNC_REQUEST_BLOCKING ); //options
if(rc)
{
- TRAC_ERR("centaur_init: pore_flex_create failed for G_centaur_reg_pore_req. rc = 0x%08x", rc);
+ TRAC_ERR("centaur_init: gpe_request_create failed for G_centaur_reg_gpe_req. rc = 0x%08x", rc);
break;
}
// Submit Pore GPE and wait for completion
- rc = pore_flex_schedule(&G_centaur_reg_pore_req);
+ rc = gpe_request_schedule(&G_centaur_reg_gpe_req);
// Check for errors on Scom
- if(rc || L_centaur_reg_parms.rc)
+ if(rc || L_centaur_reg_parms.error.rc)
{
- TRAC_ERR("centaur_init: gpe_scom_centaur failure. rc = 0x%08x, gpe_rc = 0x%08x, index = 0x%08x",
+ TRAC_ERR("centaur_init: IPC_ST_CENTAUR_SCOM failure. rc = 0x%08x, gpe_rc = 0x%08x, address = 0x%08x",
rc,
- L_centaur_reg_parms.rc,
- L_centaur_reg_parms.errorIndex);
+ L_centaur_reg_parms.error.rc,
+ L_centaur_reg_parms.error.addr);
if(!rc)
{
- rc = L_centaur_reg_parms.rc;
+ rc = L_centaur_reg_parms.error.rc;
}
break;
}
@@ -1180,16 +1126,17 @@ void centaur_init( void )
/// to gather the 'centaur' data, but we will set them to
/// invalid (-1) until the task sets them up
- G_centaur_data_parms.rc = 0;
+ G_centaur_data_parms.error.ffdc = 0;
G_centaur_data_parms.collect = -1;
G_centaur_data_parms.update = -1;
G_centaur_data_parms.data = 0;
//Initializes existing PoreFlex object for centaur data
- rc = pore_flex_create( &G_centaur_data_task.gpe_req, //gpe_req for the task
- &G_pore_gpe1_queue, //queue
- gpe_get_mem_data, //entry point
- (uint32_t) &G_centaur_data_parms, //parm for the task
+ rc = gpe_request_create(
+ &G_centaur_data_task.gpe_req, //gpe_req for the task
+ &G_async_gpe_queue1, //queue
+ IPC_ST_CENTAUR_DATA_FUNCID, //Function ID
+ &G_centaur_data_parms, //parm for the task
SSX_WAIT_FOREVER, //
NULL, //callback
NULL, //callback argument
@@ -1197,22 +1144,23 @@ void centaur_init( void )
if(rc)
{
- TRAC_ERR("centaur_init: pore_flex_create failed for G_centaur_data_task.gpe_req. rc = 0x%08x", rc);
+ TRAC_ERR("centaur_init: gpe_request_create failed for G_centaur_data_task.gpe_req. rc = 0x%08x", rc);
break;
}
- //Initialize existing PoreFlex object for centaur recovery
- rc = pore_flex_create( &G_cent_scom_req, // gpe_req for the task
- &G_pore_gpe1_queue, // queue
- gpe_scom_centaur, // entry point
- (uint32_t) &G_cent_scom_gpe_parms, // parm for the task
- SSX_WAIT_FOREVER, //
- NULL, // callback
- NULL, // callback argument
- 0); // options
+ //Initialize existing GpeRequest object for centaur recovery
+ rc = gpe_request_create(
+ &G_cent_scom_req, // gpe_req for the task
+ &G_async_gpe_queue1, // queue
+ IPC_ST_CENTAUR_SCOM_FUNCID, // entry point
+ &G_cent_scom_gpe_parms, // parm for the task
+ SSX_WAIT_FOREVER, //
+ NULL, // callback
+ NULL, // callback argument
+ 0); // options
if(rc)
{
- TRAC_ERR("centaur_init: pore_flex_create failed for G_cent_scom_req. rc = 0x%08x", rc);
+ TRAC_ERR("centaur_init: gpe_request_create failed for G_cent_scom_req. rc = 0x%08x", rc);
break;
}
@@ -1241,15 +1189,23 @@ void centaur_init( void )
NULL, //Trace Buf
DEFAULT_TRACE_SIZE, //Trace Size
rc, //userdata1
- L_centaur_reg_parms.rc //userdata2
+ L_centaur_reg_parms.error.rc //userdata2
);
addUsrDtlsToErrl(l_err, //io_err
- (uint8_t *) &G_centaur_reg_pore_req.ffdc, //i_dataPtr,
- sizeof(PoreFfdc), //i_size
+ (uint8_t *) &G_centaur_reg_gpe_req.ffdc, //i_dataPtr,
+ sizeof(GpeFfdc), //i_size
ERRL_USR_DTL_STRUCT_VERSION_1, //version
ERRL_USR_DTL_BINARY_DATA); //type
+ // Capture the GPE1 trace buffer
+ addUsrDtlsToErrl(l_err,
+ (uint8_t *) G_shared_gpe_data.gpe1_tb_ptr,
+ G_shared_gpe_data.gpe1_tb_sz,
+ ERRL_USR_DTL_STRUCT_VERSION_1,
+ ERRL_USR_DTL_TRACE_DATA);
+
+
REQUEST_RESET(l_err);
}
else
@@ -1261,7 +1217,6 @@ void centaur_init( void )
return;
}
-#endif // #if 0
// Function Specification
//
@@ -1272,9 +1227,7 @@ void centaur_init( void )
// Returns NULL for centaur ID outside the range of 0 to 7.
//
// End Function Specification
-/* TODO: RTC 163359 - Reenable when needed */
-#if 0
-MemData * cent_get_centaur_data_ptr( const uint8_t i_occ_centaur_id )
+CentaurMemData * cent_get_centaur_data_ptr( const uint8_t i_occ_centaur_id )
{
//The caller needs to send in a valid OCC centaur id. Since type is uchar
//so there is no need to check for case less than 0.
@@ -1291,4 +1244,57 @@ MemData * cent_get_centaur_data_ptr( const uint8_t i_occ_centaur_id )
return( NULL );
}
}
-#endif
+
+uint32_t centaur_configuration_create( CentaurConfiguration_t * i_centaurConfiguration )
+{
+ bool rc = 0;
+ GpeRequest l_request;
+
+ do
+ {
+ G_gpe_centaur_config_args.centaurConfiguration = i_centaurConfiguration;
+
+ rc = gpe_request_create(
+ &l_request, // request
+ &G_async_gpe_queue1, // gpe queue
+ IPC_ST_CENTAUR_INIT_FUNCID, // Function Id
+ &G_gpe_centaur_config_args, // GPE arg_ptr
+ SSX_SECONDS(5), // timeout
+ NULL, // callback
+ NULL, // callback arg
+ ASYNC_REQUEST_BLOCKING);
+ if( rc )
+ {
+ TRAC_ERR("centaur_configuration_create: gpe_request_create failed for"
+ " IPC_ST_CENTAUR_INIT_FUNCID. rc = 0x%08x",rc);
+ break;
+ }
+
+ TRAC_INFO("centaur_configuration_create: Scheduling request for IPC_ST_CENTAUR_INIT_FUNCID");
+ gpe_request_schedule(&l_request);
+
+ TRAC_INFO("centaur_configuration_create: GPE_centaur_configuration_create w/rc=0x%08x",
+ l_request.request.completion_state);
+
+ if(ASYNC_REQUEST_STATE_COMPLETE != l_request.request.completion_state)
+ {
+ rc = l_request.request.completion_state;
+
+ TRAC_ERR("centaur_configuration_create: IPC_ST_CENTAUR_INIT_FUNCID"
+ " request did not complete.");
+ break;
+ }
+
+ if (G_gpe_centaur_config_args.error.rc != GPE_RC_SUCCESS)
+ {
+ rc = G_gpe_centaur_config_args.error.rc;
+ TRAC_ERR("centaur_configuration_create: IPC_ST_CENTAUR_INIT_FUNCID"
+ " failed with rc=0x%08x.",
+ rc);
+ break;
+ }
+
+ } while (0);
+
+ return rc;
+}
diff --git a/src/occ_405/cent/centaur_data.h b/src/occ_405/cent/centaur_data.h
index 17831e4..0208265 100755
--- a/src/occ_405/cent/centaur_data.h
+++ b/src/occ_405/cent/centaur_data.h
@@ -32,7 +32,8 @@
#include <occ_common.h>
#include <ssx.h>
#include "rtls.h"
-//#include "gpe_data.h"
+#include "centaur_mem_data.h"
+#include "centaur_structs.h"
#include "occ_sys_config.h"
#include "memory.h"
@@ -107,26 +108,24 @@ enum eOccCentaurs
//*************************************************************************
//Centaur data collect structures used for task data pointers
-// TEMP -- PORE ISSUES
-/*
+
struct centaur_data_task {
uint8_t start_centaur;
uint8_t current_centaur;
uint8_t end_centaur;
uint8_t prev_centaur;
- MemData * centaur_data_ptr;
- PoreFlex gpe_req;
+ CentaurMemData * centaur_data_ptr;
+ GpeRequest gpe_req;
} __attribute__ ((__packed__));
typedef struct centaur_data_task centaur_data_task_t;
-*/
+
//*************************************************************************
// Globals
//*************************************************************************
//Global centaur structures used for task data pointers
-// TEMP -- COMMENTED OUT DUE TO PORE ISSUES
-//extern centaur_data_task_t G_centaur_data_task;
+extern centaur_data_task_t G_centaur_data_task;
//Global is bitmask of centaurs
extern uint32_t G_present_centaurs;
@@ -164,7 +163,7 @@ extern uint16_t G_configured_mbas;
//*************************************************************************
//Collect centaur data for all centaur in specified range
-void task_centaur_data( task_t * i_task );
+void centaur_data( void );
//Initialize structures for collecting centaur data.
//void centaur_init( void ) INIT_SECTION;
@@ -173,14 +172,11 @@ void centaur_init( void );
//handles centaur i2c recovery and other workarounds
void cent_recovery(uint32_t i_cent);
-//Determines if a centaur has a channel checkstop (returns TRUE is it has a
-//channel checkstop, FALSE otherwise)
-bool cent_chan_checkstop(const uint8_t i_cent);
-
//Returns a pointer to the most up-to-date centaur data for the centaur
//associated with the specified OCC centaur id.
-// TEMP -- WHERE IS MemData ??
-//MemData * cent_get_centaur_data_ptr( const uint8_t i_centaur_id );
+CentaurMemData * cent_get_centaur_data_ptr( const uint8_t i_centaur_id );
+
+uint32_t centaur_configuration_create( CentaurConfiguration_t * i_centaurConfiguration );
#endif //_CENTAUR_DATA_H
diff --git a/src/occ_405/cmdh/cmdh_dbug_cmd.c b/src/occ_405/cmdh/cmdh_dbug_cmd.c
index 2015ac8..ac030ae 100755
--- a/src/occ_405/cmdh/cmdh_dbug_cmd.c
+++ b/src/occ_405/cmdh/cmdh_dbug_cmd.c
@@ -35,9 +35,10 @@
#include <cmdh_fsp.h>
#include <cmdh_fsp_cmds.h>
#include <memory.h>
-//#include <gpe_data.h>
+#include <centaur_data.h>
#include <proc_data.h>
#include <apss.h>
+#include "centaur_mem_data.h"
//*************************************************************************/
// Externs
@@ -149,30 +150,27 @@ void dbug_err_inject(const cmdh_fsp_cmd_t * i_cmd_ptr,
void dbug_centaur_dump(const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * i_rsp_ptr)
{
-/* TODO - RTC 163359 Centaur support */
-#if 0
uint16_t l_datalen = 0;
uint8_t l_jj=0;
// Determine the size of the data we are returning
- l_datalen = (sizeof(MemData) * MAX_NUM_CENTAURS);
+ l_datalen = (sizeof(CentaurMemData) * MAX_NUM_CENTAURS);
// Fill out the response with the data we are returning
for(l_jj=0; l_jj < MAX_NUM_CENTAURS; l_jj++)
{
- MemData * l_sensor_cache_ptr =
+ CentaurMemData * l_sensor_cache_ptr =
cent_get_centaur_data_ptr(l_jj);
- memcpy((void *)&(i_rsp_ptr->data[l_jj*sizeof(MemData)]),
+ memcpy((void *)&(i_rsp_ptr->data[l_jj*sizeof(CentaurMemData)]),
(void *)l_sensor_cache_ptr,
- sizeof(MemData));
+ sizeof(CentaurMemData));
}
// Fill out the rest of the response data
i_rsp_ptr->data_length[0] = CONVERT_UINT16_UINT8_HIGH(l_datalen);
i_rsp_ptr->data_length[1] = CONVERT_UINT16_UINT8_LOW(l_datalen);
G_rsp_status = ERRL_RC_SUCCESS;
-#endif
return;
}
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds.c b/src/occ_405/cmdh/cmdh_fsp_cmds.c
index 6253652..c1cfd8e 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds.c
@@ -58,6 +58,7 @@ extern uint32_t G_first_proc_gpu_config;
extern bool G_vrm_vdd_temp_expired;
extern bool G_reset_prep;
extern uint16_t G_amester_max_data_length;
+extern uint8_t G_occ_interrupt_type;
#include <gpe_export.h>
extern gpe_shared_data_t G_shared_gpe_data;
@@ -156,8 +157,8 @@ errlHndl_t cmdh_tmgt_poll (const cmdh_fsp_cmd_t * i_cmd_ptr,
ERRL_RC cmdh_poll_v20(cmdh_fsp_rsp_t * o_rsp_ptr)
{
ERRL_RC l_rc = ERRL_RC_INTERNAL_FAIL;
- uint8_t k = 0, l_max_sensors = 0;
- uint8_t l_err_hist_idx = 0, l_sens_list_idx = 0;
+ int k = 0, l_max_sensors = 0;
+ int l_err_hist_idx = 0, l_sens_list_idx = 0;
cmdh_poll_sensor_db_t l_sensorHeader;
// Set pointer to start of o_rsp_ptr
@@ -330,7 +331,8 @@ ERRL_RC cmdh_poll_v20(cmdh_fsp_rsp_t * o_rsp_ptr)
if (CENTAUR_PRESENT(l_cent))
{
//Add entry for centaurs.
- l_tempSensorList[l_sensorHeader.count].id = g_amec->proc[0].memctl[l_cent].centaur.temp_sid;
+ uint32_t l_temp_sid = g_amec->proc[0].memctl[l_cent].centaur.temp_sid;
+ l_tempSensorList[l_sensorHeader.count].id = l_temp_sid;
l_tempSensorList[l_sensorHeader.count].fru_type = DATA_FRU_CENTAUR;
if (G_cent_timeout_logged_bitmap & (CENTAUR0_PRESENT_MASK >> l_cent))
{
@@ -340,14 +342,23 @@ ERRL_RC cmdh_poll_v20(cmdh_fsp_rsp_t * o_rsp_ptr)
{
l_tempSensorList[l_sensorHeader.count].value = (g_amec->proc[0].memctl[l_cent].centaur.centaur_hottest.cur_temp) & 0xFF;
}
+
l_sensorHeader.count++;
//Add entries for present dimms associated with current centaur l_cent.
for(l_dimm=0; l_dimm < NUM_DIMMS_PER_CENTAUR; l_dimm++)
{
- if (g_amec->proc[0].memctl[l_cent].centaur.dimm_temps[l_dimm].temp_sid != 0)
+ l_temp_sid = g_amec->proc[0].memctl[l_cent].centaur.dimm_temps[l_dimm].temp_sid;
+
+ // TODO temp fix until the dimm numbering gets sorted out
+ if(FSP_SUPPORTED_OCC == G_occ_interrupt_type && l_temp_sid == 0)
+ {
+ l_temp_sid = 1 + l_dimm; // If sid is zero them make up a sid for FSP
+ }
+
+ if (l_temp_sid != 0)
{
- l_tempSensorList[l_sensorHeader.count].id = g_amec->proc[0].memctl[l_cent].centaur.dimm_temps[l_dimm].temp_sid;
+ l_tempSensorList[l_sensorHeader.count].id = l_temp_sid;
l_tempSensorList[l_sensorHeader.count].fru_type = DATA_FRU_DIMM;
//If a dimm timed out long enough, we should return 0xFFFF for that sensor.
if (G_dimm_temp_expired_bitmap.bytes[l_cent] & (DIMM_SENSOR0 >> l_dimm))
@@ -454,7 +465,7 @@ ERRL_RC cmdh_poll_v20(cmdh_fsp_rsp_t * o_rsp_ptr)
// Write data to resp buffer if any.
if (l_sensorHeader.count)
{
- uint8_t l_sensordataSz = l_sensorHeader.count * l_sensorHeader.length;
+ int l_sensordataSz = l_sensorHeader.count * l_sensorHeader.length;
// Copy sensor data into response buffer.
memcpy ((void *) &(o_rsp_ptr->data[l_rsp_index]), (void *)l_tempSensorList, l_sensordataSz);
// Increment index into response buffer.
@@ -490,7 +501,7 @@ ERRL_RC cmdh_poll_v20(cmdh_fsp_rsp_t * o_rsp_ptr)
// Write data to outbuffer if any.
if (l_sensorHeader.count)
{
- uint8_t l_sensordataSz = l_sensorHeader.count * l_sensorHeader.length;
+ int l_sensordataSz = l_sensorHeader.count * l_sensorHeader.length;
// Copy sensor data into response buffer.
memcpy ((void *) &(o_rsp_ptr->data[l_rsp_index]), (void *)l_freqSensorList, l_sensordataSz);
// Increment index into response buffer.
@@ -779,7 +790,7 @@ ERRL_RC cmdh_poll_v20(cmdh_fsp_rsp_t * o_rsp_ptr)
// Write data to outbuffer if any.
if (l_sensorHeader.count)
{
- uint8_t l_sensordataSz = l_sensorHeader.count * l_sensorHeader.length;
+ int l_sensordataSz = l_sensorHeader.count * l_sensorHeader.length;
// Copy sensor data into response buffer.
memcpy ((void *) &(o_rsp_ptr->data[l_rsp_index]), (void *)l_extnSensorList, l_sensordataSz);
// Increment index into response buffer.
@@ -966,7 +977,7 @@ errlHndl_t cmdh_clear_elog (const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
cmdh_clear_elog_query_t *l_cmd_ptr = (cmdh_clear_elog_query_t *) i_cmd_ptr;
- uint8_t l_SlotNum = ERRL_INVALID_SLOT;
+ int l_SlotNum = ERRL_INVALID_SLOT;
errlHndl_t l_err = INVALID_ERR_HNDL;
errlHndl_t l_oci_address = INVALID_ERR_HNDL;
@@ -1067,7 +1078,7 @@ void cmdh_dbug_get_trace (const cmdh_fsp_cmd_t * i_cmd_ptr,
void cmdh_dbug_get_ame_sensor (const cmdh_fsp_cmd_t * i_cmd_ptr,
cmdh_fsp_rsp_t * o_rsp_ptr)
{
- uint8_t l_rc = ERRL_RC_SUCCESS;
+ int l_rc = ERRL_RC_SUCCESS;
uint16_t l_type = 0;
uint16_t l_location = 0;
uint16_t i = 0;
diff --git a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
index 0a54511..542b5bc 100755
--- a/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
+++ b/src/occ_405/cmdh/cmdh_fsp_cmds_datacnfg.c
@@ -2052,16 +2052,7 @@ errlHndl_t data_store_mem_cfg(const cmdh_fsp_cmd_t * i_cmd_ptr,
}
else
{
- // TODO: RTC 163359 - OCC Centaur Support
- //G_sysConfigData.mem_type = MEM_TYPE_CUMULUS;
-
- CMDH_TRAC_ERR("data_store_mem_cfg: Invalid mem type 0x%02X in config data packet version[0x%02X] num_data_sets[%u]",
- data_sets_ptr[0].memory_type,
- l_cmd_ptr->header.version,
- num_data_sets);
-
- cmdh_build_errl_rsp(i_cmd_ptr, o_rsp_ptr, ERRL_RC_INVALID_DATA, &l_err);
- break;
+ G_sysConfigData.mem_type = MEM_TYPE_CUMULUS;
}
// Store the hardware sensor ID and the temperature sensor ID
@@ -2156,16 +2147,8 @@ errlHndl_t data_store_mem_cfg(const cmdh_fsp_cmd_t * i_cmd_ptr,
}
else // must be cumulus and the "memory type" byte is the centaur#
{
- CMDH_TRAC_ERR("data_store_mem_cfg: Invalid mem type 0x%02X in config data packet entry %d (entry 0 type: 0x%02X)",
- l_data_set->memory_type, i, G_sysConfigData.mem_type);
-
- cmdh_build_errl_rsp(i_cmd_ptr, o_rsp_ptr, ERRL_RC_INVALID_DATA, &l_err);
- break;
-
-#if 0
- // TODO: RTC 163359 - OCC Centaur Support
// per spec for cumulus memory type is the centaur# and dimm info1 is DIMM#
- uint8_t l_centaur_num = l_data_set->memory_type;
+ int l_centaur_num = l_data_set->memory_type;
l_dimm_num = l_data_set->dimm_info1;
// Validate the centaur and dimm #'s for this data set
@@ -2202,7 +2185,7 @@ errlHndl_t data_store_mem_cfg(const cmdh_fsp_cmd_t * i_cmd_ptr,
l_num_dimms++;
}
-#endif
+
} // Cumulus
} // for each data set
} // else no data sets given
diff --git a/src/occ_405/dimm/dimm.c b/src/occ_405/dimm/dimm.c
index 40af9de..2e1158d 100755
--- a/src/occ_405/dimm/dimm.c
+++ b/src/occ_405/dimm/dimm.c
@@ -746,265 +746,272 @@ void task_dimm_sm(struct task *i_self)
#ifdef DEBUG_LOCK_TESTING
SIMULATE_HOST();
#endif
-
- // First handle any outstanding I2C reset
- if (G_dimm_i2c_reset_required)
+ if (MEM_TYPE_NIMBUS == G_sysConfigData.mem_type)
{
- if ((G_dimm_state != DIMM_STATE_RESET_MASTER) && (check_for_i2c_failure()))
- {
- // I2C failure occurred during a reset...
- INTR_TRAC_ERR("task_dimm_sm: Failure during I2C reset - memory monitoring disabled");
- // release I2C lock to the host for this engine and stop monitoring
- L_occ_owns_lock = false;
- disable_all_dimms();
- }
- else
+
+ // First handle any outstanding I2C reset
+ if (G_dimm_i2c_reset_required)
{
- if (G_dimm_state == DIMM_STATE_INIT)
+ if ((G_dimm_state != DIMM_STATE_RESET_MASTER) && (check_for_i2c_failure()))
{
- // Reset has completed successfully
- TRAC_INFO("task_dimm_sm: I2C reset completed");
- G_dimm_i2c_reset_required = false;
- // Check if host needs I2C lock
- L_occ_owns_lock = check_and_update_i2c_lock(engine);
+ // I2C failure occurred during a reset...
+ INTR_TRAC_ERR("task_dimm_sm: Failure during I2C reset - memory monitoring disabled");
+ // release I2C lock to the host for this engine and stop monitoring
+ L_occ_owns_lock = false;
+ disable_all_dimms();
}
else
{
- // Reset still in progress
- G_dimm_state = dimm_reset_sm();
+ if (G_dimm_state == DIMM_STATE_INIT)
+ {
+ // Reset has completed successfully
+ TRAC_INFO("task_dimm_sm: I2C reset completed");
+ G_dimm_i2c_reset_required = false;
+ // Check if host needs I2C lock
+ L_occ_owns_lock = check_and_update_i2c_lock(engine);
+ }
+ else
+ {
+ // Reset still in progress
+ G_dimm_state = dimm_reset_sm();
+ }
}
}
- }
- if (G_dimm_i2c_reset_required == false)
- {
- if ((L_occ_owns_lock == false) && ((DIMM_TICK == 0) || (DIMM_TICK == 8)))
+ if (G_dimm_i2c_reset_required == false)
{
- // Check if host gave up the I2C lock
- L_occ_owns_lock = check_and_update_i2c_lock(engine);
- if (L_occ_owns_lock)
+ if ((L_occ_owns_lock == false) && ((DIMM_TICK == 0) || (DIMM_TICK == 8)))
{
- // Start over at the INIT state after receiving the lock
- G_dimm_state = DIMM_STATE_INIT;
+ // Check if host gave up the I2C lock
+ L_occ_owns_lock = check_and_update_i2c_lock(engine);
+ if (L_occ_owns_lock)
+ {
+ // Start over at the INIT state after receiving the lock
+ G_dimm_state = DIMM_STATE_INIT;
+ }
}
- }
- if (L_occ_owns_lock)
- {
- // Check for failure on prior operation
- if (check_for_i2c_failure())
+ if (L_occ_owns_lock)
{
- // If there was a failure, continue to the next DIMM (after I2c reset)
- use_next_dimm(&L_dimmPort, &L_dimmIndex);
- }
+ // Check for failure on prior operation
+ if (check_for_i2c_failure())
+ {
+ // If there was a failure, continue to the next DIMM (after I2c reset)
+ use_next_dimm(&L_dimmPort, &L_dimmIndex);
+ }
- uint8_t nextState = G_dimm_state;
- static dimm_sm_args_t L_new_dimm_args = {{{{0}}}};
+ uint8_t nextState = G_dimm_state;
+ static dimm_sm_args_t L_new_dimm_args = {{{{0}}}};
- if (G_dimm_state == DIMM_STATE_INIT)
- {
- // Setup I2C Interrupt Mask Register
- DIMM_DBG("DIMM_STATE_INIT: (I2C Engine 0x%02X, Memory Type 0x%02X)",
- engine, G_sysConfigData.mem_type);
- L_new_dimm_args.i2cEngine = engine;
- if (schedule_dimm_req(DIMM_STATE_INIT, L_new_dimm_args))
+ if (G_dimm_state == DIMM_STATE_INIT)
{
- nextState = DIMM_STATE_WRITE_MODE;
+ // Setup I2C Interrupt Mask Register
+ DIMM_DBG("DIMM_STATE_INIT: (I2C Engine 0x%02X, Memory Type 0x%02X)",
+ engine, G_sysConfigData.mem_type);
+ L_new_dimm_args.i2cEngine = engine;
+ if (schedule_dimm_req(DIMM_STATE_INIT, L_new_dimm_args))
+ {
+ nextState = DIMM_STATE_WRITE_MODE;
+ }
}
- }
- else
- {
- bool intTriggered = check_for_i2c_interrupt(engine);
- if (intTriggered == false)
+ else
{
- // Interrupt not generated, I2C operation may not have completed.
- // After MAX_TICK_COUNT_WAIT, attempt operation anyway.
- ++L_notReadyCount;
- }
+ bool intTriggered = check_for_i2c_interrupt(engine);
+ if (intTriggered == false)
+ {
+ // Interrupt not generated, I2C operation may not have completed.
+ // After MAX_TICK_COUNT_WAIT, attempt operation anyway.
+ ++L_notReadyCount;
+ }
- // Check if prior command completed (or timed out waiting for it)
- if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
- {
- if (ASYNC_REQUEST_STATE_COMPLETE == G_dimm_sm_request.request.completion_state)
+ // Check if prior command completed (or timed out waiting for it)
+ if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
{
- // IPC request completed, now check return code
- if (GPE_RC_SUCCESS == G_dimm_sm_args.error.rc)
+ if (ASYNC_REQUEST_STATE_COMPLETE == G_dimm_sm_request.request.completion_state)
{
- // last request completed without error
- switch (G_dimm_sm_args.state)
+ // IPC request completed, now check return code
+ if (GPE_RC_SUCCESS == G_dimm_sm_args.error.rc)
{
- case DIMM_STATE_INIT:
- // Save max I2C ports
- if (G_maxDimmPort != G_dimm_sm_args.maxPorts)
- {
- G_maxDimmPort = G_dimm_sm_args.maxPorts;
- DIMM_DBG("task_dimm_sm: updating DIMM Max I2C Port to %d", G_maxDimmPort);
- }
- break;
+ // last request completed without error
+ switch (G_dimm_sm_args.state)
+ {
+ case DIMM_STATE_INIT:
+ // Save max I2C ports
+ if (G_maxDimmPort != G_dimm_sm_args.maxPorts)
+ {
+ G_maxDimmPort = G_dimm_sm_args.maxPorts;
+ DIMM_DBG("task_dimm_sm: updating DIMM Max I2C Port to %d", G_maxDimmPort);
+ }
+ break;
- case DIMM_STATE_READ_TEMP:
- if (L_readIssued)
- {
- // Validate and store temperature
- process_dimm_temp();
+ case DIMM_STATE_READ_TEMP:
+ if (L_readIssued)
+ {
+ // Validate and store temperature
+ process_dimm_temp();
- // Move on to next DIMM
- use_next_dimm(&L_dimmPort, &L_dimmIndex);
- L_readIssued = false;
+ // Move on to next DIMM
+ use_next_dimm(&L_dimmPort, &L_dimmIndex);
+ L_readIssued = false;
- // Check if host needs the I2C lock
- L_occ_owns_lock = check_and_update_i2c_lock(engine);
- }
- break;
+ // Check if host needs the I2C lock
+ L_occ_owns_lock = check_and_update_i2c_lock(engine);
+ }
+ break;
- default:
- // Nothing to do
- break;
+ default:
+ // Nothing to do
+ break;
+ }
}
- }
- else
- {
- // last request did not return success
- switch (G_dimm_sm_args.state)
+ else
{
- case DIMM_STATE_INITIATE_READ:
- if (++L_readAttempt < MAX_READ_ATTEMPT)
- {
- // The initiate_read didnt complete, retry
- DIMM_DBG("task_dimm_sm: initiate read didn't start (%d attempts)", L_readAttempt);
- // Force the read again
- G_dimm_state = DIMM_STATE_INITIATE_READ;
- nextState = G_dimm_state;
- }
- else
- {
- INTR_TRAC_ERR("task_dimm_sm: initiate read didn't start after %d attempts... forcing reset", L_readAttempt);
- mark_dimm_failed();
- }
- break;
-
- case DIMM_STATE_READ_TEMP:
- if (L_readIssued)
- {
+ // last request did not return success
+ switch (G_dimm_sm_args.state)
+ {
+ case DIMM_STATE_INITIATE_READ:
if (++L_readAttempt < MAX_READ_ATTEMPT)
{
- DIMM_DBG("task_dimm_sm: read didn't complete (%d attempts)", L_readAttempt);
+ // The initiate_read didnt complete, retry
+ DIMM_DBG("task_dimm_sm: initiate read didn't start (%d attempts)", L_readAttempt);
// Force the read again
- G_dimm_state = DIMM_STATE_READ_TEMP;
+ G_dimm_state = DIMM_STATE_INITIATE_READ;
nextState = G_dimm_state;
}
else
{
- INTR_TRAC_ERR("task_dimm_sm: read did not complete after %d attempts... forcing reset", L_readAttempt);
+ INTR_TRAC_ERR("task_dimm_sm: initiate read didn't start after %d attempts... forcing reset", L_readAttempt);
mark_dimm_failed();
}
- }
- break;
+ break;
- default:
- // Nothing to do
- break;
+ case DIMM_STATE_READ_TEMP:
+ if (L_readIssued)
+ {
+ if (++L_readAttempt < MAX_READ_ATTEMPT)
+ {
+ DIMM_DBG("task_dimm_sm: read didn't complete (%d attempts)", L_readAttempt);
+ // Force the read again
+ G_dimm_state = DIMM_STATE_READ_TEMP;
+ nextState = G_dimm_state;
+ }
+ else
+ {
+ INTR_TRAC_ERR("task_dimm_sm: read did not complete after %d attempts... forcing reset", L_readAttempt);
+ mark_dimm_failed();
+ }
+ }
+ break;
+
+ default:
+ // Nothing to do
+ break;
+ }
}
}
}
- }
- if (L_occ_owns_lock)
- {
- if (false == G_dimm_i2c_reset_required)
+ if (L_occ_owns_lock)
{
- // Handle new DIMM state
- switch (G_dimm_state)
+ if (false == G_dimm_i2c_reset_required)
{
- case DIMM_STATE_WRITE_MODE:
- // Only start a DIMM read on tick 0 or 8
- if ((DIMM_TICK == 0) || (DIMM_TICK == 8))
- {
- // If DIMM has huid/sensor then it should be present
- // and if not disabled yet, start temp collection
- if (NIMBUS_DIMM_PRESENT(L_dimmPort,L_dimmIndex) &&
- (G_dimm[L_dimmPort][L_dimmIndex].disabled == false))
+ // Handle new DIMM state
+ switch (G_dimm_state)
+ {
+ case DIMM_STATE_WRITE_MODE:
+ // Only start a DIMM read on tick 0 or 8
+ if ((DIMM_TICK == 0) || (DIMM_TICK == 8))
{
- L_new_dimm_args.i2cPort = L_dimmPort;
- L_new_dimm_args.dimm = L_dimmIndex;
- if (schedule_dimm_req(DIMM_STATE_WRITE_MODE, L_new_dimm_args))
+ // If DIMM has huid/sensor then it should be present
+ // and if not disabled yet, start temp collection
+ if (NIMBUS_DIMM_PRESENT(L_dimmPort,L_dimmIndex) &&
+ (G_dimm[L_dimmPort][L_dimmIndex].disabled == false))
{
- DIMM_DBG("task_dimm_sm: Collection started for DIMM%04X at tick %d",
- DIMM_AND_PORT, DIMM_TICK);
- nextState = DIMM_STATE_WRITE_ADDR;
+ L_new_dimm_args.i2cPort = L_dimmPort;
+ L_new_dimm_args.dimm = L_dimmIndex;
+ if (schedule_dimm_req(DIMM_STATE_WRITE_MODE, L_new_dimm_args))
+ {
+ DIMM_DBG("task_dimm_sm: Collection started for DIMM%04X at tick %d",
+ DIMM_AND_PORT, DIMM_TICK);
+ nextState = DIMM_STATE_WRITE_ADDR;
+ }
+ }
+ else
+ {
+ // Skip current DIMM and move on to next one
+ use_next_dimm(&L_dimmPort, &L_dimmIndex);
}
}
- else
- {
- // Skip current DIMM and move on to next one
- use_next_dimm(&L_dimmPort, &L_dimmIndex);
- }
- }
- break;
+ break;
- case DIMM_STATE_WRITE_ADDR:
- if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
- {
- L_new_dimm_args.dimm = L_dimmIndex;
- L_new_dimm_args.i2cAddr = get_dimm_addr(L_dimmIndex);
- if (schedule_dimm_req(DIMM_STATE_WRITE_ADDR, L_new_dimm_args))
+ case DIMM_STATE_WRITE_ADDR:
+ if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
{
- nextState = DIMM_STATE_INITIATE_READ;
- L_readAttempt = 0;
- L_readIssued = false;
+ L_new_dimm_args.dimm = L_dimmIndex;
+ L_new_dimm_args.i2cAddr = get_dimm_addr(L_dimmIndex);
+ if (schedule_dimm_req(DIMM_STATE_WRITE_ADDR, L_new_dimm_args))
+ {
+ nextState = DIMM_STATE_INITIATE_READ;
+ L_readAttempt = 0;
+ L_readIssued = false;
+ }
}
- }
- break;
+ break;
- case DIMM_STATE_INITIATE_READ:
- if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
- {
- L_new_dimm_args.dimm = L_dimmIndex;
- if (schedule_dimm_req(DIMM_STATE_INITIATE_READ, L_new_dimm_args))
+ case DIMM_STATE_INITIATE_READ:
+ if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
{
- nextState = DIMM_STATE_READ_TEMP;
+ L_new_dimm_args.dimm = L_dimmIndex;
+ if (schedule_dimm_req(DIMM_STATE_INITIATE_READ, L_new_dimm_args))
+ {
+ nextState = DIMM_STATE_READ_TEMP;
+ }
}
- }
- break;
+ break;
- case DIMM_STATE_READ_TEMP:
- if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
- {
- if (schedule_dimm_req(DIMM_STATE_READ_TEMP, L_new_dimm_args))
+ case DIMM_STATE_READ_TEMP:
+ if (intTriggered || (L_notReadyCount > MAX_TICK_COUNT_WAIT))
{
- L_readIssued = true;
- nextState = DIMM_STATE_WRITE_MODE;
+ if (schedule_dimm_req(DIMM_STATE_READ_TEMP, L_new_dimm_args))
+ {
+ L_readIssued = true;
+ nextState = DIMM_STATE_WRITE_MODE;
+ }
}
- }
- break;
+ break;
- default:
- INTR_TRAC_ERR("task_dimm_sm: INVALID STATE: 0x%02X", G_dimm_state);
- break;
+ default:
+ INTR_TRAC_ERR("task_dimm_sm: INVALID STATE: 0x%02X", G_dimm_state);
+ break;
+ }
+ }
+ else
+ {
+ // Previous op triggered reset
+ nextState = dimm_reset_sm();
}
}
else
{
- // Previous op triggered reset
- nextState = dimm_reset_sm();
+ // OCC no longer holds the i2c lock (no DIMM state change required)
+ nextState = G_dimm_state;
}
}
- else
+
+ if (nextState != G_dimm_state)
{
- // OCC no longer holds the i2c lock (no DIMM state change required)
- nextState = G_dimm_state;
+ DIMM_DBG("task_dimm_sm: Updating state to 0x%02X (DIMM%04X) end of tick %d", nextState, (L_dimmPort<<8)|L_dimmIndex, DIMM_TICK);
+ G_dimm_state = nextState;
+ L_notReadyCount = 0;
}
}
-
- if (nextState != G_dimm_state)
- {
- DIMM_DBG("task_dimm_sm: Updating state to 0x%02X (DIMM%04X) end of tick %d", nextState, (L_dimmPort<<8)|L_dimmIndex, DIMM_TICK);
- G_dimm_state = nextState;
- L_notReadyCount = 0;
- }
}
}
+ else // G_sysConfigData.mem_type is Centaur
+ {
+ centaur_data();
+ }
}
} // end task_dimm_sm()
diff --git a/src/occ_405/mem/memory.c b/src/occ_405/mem/memory.c
index 4f0e9c6..d485fc8 100644
--- a/src/occ_405/mem/memory.c
+++ b/src/occ_405/mem/memory.c
@@ -31,6 +31,7 @@
#include "dimm_control.h"
#include "centaur_control.h"
#include "centaur_data.h"
+#include "centaur_structs.h"
#include "memory_service_codes.h"
#include <occ_service_codes.h> // for SSX_GENERIC_FAILURE
#include "amec_sys.h"
@@ -40,8 +41,7 @@ extern dimm_control_args_t G_dimm_control_args;
extern task_t G_task_table[TASK_END];
-// TODO: RTC 163359 - uncomment when Centaur code is enabled
-//extern GpeScomParms G_centaur_control_reg_parms;
+extern CentaurScomParms_t G_centaur_control_reg_parms;
// This array identifies dimm throttle limits for both Centaurs (Cumulus) and
// rdimms (Nimbus) based systems.
@@ -106,8 +106,7 @@ void task_memory_control( task_t * i_task )
}
else if (MEM_TYPE_CUMULUS == G_sysConfigData.mem_type)
{
-// TODO: RTC 163359 - uncomment when Centaur code is enabled
-// gpe_rc = G_centaur_control_reg_parms.rc;
+ gpe_rc = G_centaur_control_reg_parms.error.rc;
}
do
@@ -152,12 +151,10 @@ void task_memory_control( task_t * i_task )
{
if(!(L_gpe_fail_logged & (CENTAUR0_PRESENT_MASK >> memIndex)))
{
-// TODO: RTC 163359 - uncomment when Centaur code is enabled
-/* if (!check_centaur_checkstop(memIndex))
+ if (!check_centaur_checkstop(memControlTask))
{
L_gpe_fail_logged |= CENTAUR0_PRESENT_MASK >> memIndex;
- }
-*/
+ }
}
}
//Request failed. Keep count of failures and request a reset if we reach a
@@ -227,8 +224,7 @@ void task_memory_control( task_t * i_task )
{
break;
}
-// TODO RTC: 163359 - centaur code not ready yet
-// rc = centaur_control(memIndex); // Control one centaur
+ rc = centaur_control(memControlTask); // Control one centaur
}
if(rc)
@@ -243,8 +239,7 @@ void task_memory_control( task_t * i_task )
}
else if (MEM_TYPE_CUMULUS == G_sysConfigData.mem_type)
{
-// TODO RTC: 163359 - uncomment when Centaur code is enabled
-// gpe_rc = G_centaur_control_reg_parms.rc;
+ gpe_rc = G_centaur_control_reg_parms.error.rc;
}
//Error in schedule gpe memory (dimm/centaur) control
@@ -370,29 +365,8 @@ void memory_init()
}
else
{
- // TODO RTC: 163359 - CUMULUS NOT SUPPORTED YET IN PHASE1
-#if 0
TRAC_INFO("memory_init: calling centaur_init()");
centaur_init(); //no rc, handles errors internally
-#endif
- TRAC_ERR("memory_init: invalid memory type 0x%02X", G_sysConfigData.mem_type);
- /*
- * @errortype
- * @moduleid MEM_MID_MEMORY_INIT
- * @reasoncode MEMORY_INIT_FAILED
- * @userdata1 memory type
- * @userdata2 0
- * @devdesc Invalid memory type detected
- */
- errlHndl_t err = createErrl(MEM_MID_MEMORY_INIT,
- MEMORY_INIT_FAILED,
- OCC_NO_EXTENDED_RC,
- ERRL_SEV_PREDICTIVE,
- NULL,
- DEFAULT_TRACE_SIZE,
- G_sysConfigData.mem_type,
- 0);
- REQUEST_RESET(err);
}
// check if the init resulted in a reset
diff --git a/src/occ_405/occbuildname.c b/src/occ_405/occbuildname.c
index 499a0c1..8131806 100755
--- a/src/occ_405/occbuildname.c
+++ b/src/occ_405/occbuildname.c
@@ -34,6 +34,6 @@ volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) =
#else
-volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/ "op_occ_180301a\0" /*</BuildName>*/ ;
+volatile const char G_occ_buildname[16] __attribute__((section(".buildname"))) = /*<BuildName>*/ "op_occ_180328a\0" /*</BuildName>*/ ;
#endif
diff --git a/src/occ_405/sensor/sensor_enum.h b/src/occ_405/sensor/sensor_enum.h
index 51439b1..4cf6a43 100755
--- a/src/occ_405/sensor/sensor_enum.h
+++ b/src/occ_405/sensor/sensor_enum.h
@@ -526,8 +526,6 @@ enum e_gsid
TEMPDIMM14,
TEMPDIMM15,
- // TODO: RTC 163359 - Determine if we want to store individual DIMM temps for CENTAUR
- // or continue to use max DIMM temp/location under each CENTAUR.
TEMPDIMMAXM0,
TEMPDIMMAXM1,
TEMPDIMMAXM2,
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