summaryrefslogtreecommitdiffstats
path: root/src/occ_405/timer
diff options
context:
space:
mode:
authorChris Cain <cjcain@us.ibm.com>2018-11-08 17:20:05 -0600
committerChristopher J. Cain <cjcain@us.ibm.com>2018-11-27 13:40:18 -0600
commit98ccba678ad49a876b73bb36bffbbec2b90faac4 (patch)
tree79e041a8c6dbdba181d54d9443d469b368edbb58 /src/occ_405/timer
parent1904821d627918e9b50658df255ffdb199868e3e (diff)
downloadtalos-occ-98ccba678ad49a876b73bb36bffbbec2b90faac4.tar.gz
talos-occ-98ccba678ad49a876b73bb36bffbbec2b90faac4.zip
Support for PGPE error handling
Change-Id: I979f699eb9f72c0a4087e5f5af533ee3d221a4c5 RTC: 197062 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68569 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: AMIT J. TENDOLKAR <amit.tendolkar@in.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Diffstat (limited to 'src/occ_405/timer')
-rwxr-xr-xsrc/occ_405/timer/timer.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/occ_405/timer/timer.c b/src/occ_405/timer/timer.c
index be5abbe..0dd6861 100755
--- a/src/occ_405/timer/timer.c
+++ b/src/occ_405/timer/timer.c
@@ -38,6 +38,7 @@
#include <pgpe_shared.h>
#include <sensor.h>
#include <amec_sensors_centaur.h>
+#include <common.h>
//*************************************************************************/
// Externs
@@ -76,6 +77,8 @@ SSX_IRQ_FAST2FULL(ocbTHndler, ocbTHndlerFull);
// Globals
//*************************************************************************/
bool G_wdog_enabled = false;
+extern uint8_t G_occ_interrupt_type;
+bool G_htmgt_notified_of_error = false;
// memory deadman is a per port timer that the MCU uses to verify that
// the memory's power and thermal are properly monitored. The memory deadman
@@ -222,6 +225,7 @@ void init_mem_deadman_reset_task(void)
// Verify PGPE is still functional by reading PGPE Beacon from
// SRAM if after 8ms (2 consecutive checks) there is no change
// to the PGPE Beacon count then log an error and request reset.
+// 4. Check for PGPE error in shared SRAM
//
// End Function Specification
#define TASK_PGPE_BEACON_RUN_TICK_COUNT 8
@@ -259,6 +263,22 @@ void task_poke_watchdogs(struct task * i_self)
L_check_pgpe_beacon_count++;
}
}
+
+// 4. Check if PGPE has an error to report (non-FSP systems)
+ if ((G_occ_interrupt_type != FSP_SUPPORTED_OCC) && (G_htmgt_notified_of_error == false))
+ {
+ unsigned int index = 0;
+ for (; index < G_hcode_elog_table_slots; ++index)
+ {
+ if (in64(&G_hcode_elog_table[index]) != 0)
+ {
+ // Found HCODE elog
+ notify_host(INTR_REASON_HTMGT_SERVICE_REQUIRED);
+ G_htmgt_notified_of_error = true;
+ break;
+ }
+ }
+ }
}
// Function Specification
OpenPOWER on IntegriCloud