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authorChris Cain <cjcain@us.ibm.com>2018-09-10 12:57:39 -0500
committerChristopher J. Cain <cjcain@us.ibm.com>2018-09-26 11:17:55 -0500
commitb67db9d09b181dfe8bd0a77cfdca511d124b291e (patch)
tree58b9af1b2f45aea26706bf4533a2d2f0d05c8a92 /src/occ_405/pss
parent3e23a4ef97bc78aa8c8cf691407fdf9b8da30664 (diff)
downloadtalos-occ-b67db9d09b181dfe8bd0a77cfdca511d124b291e.tar.gz
talos-occ-b67db9d09b181dfe8bd0a77cfdca511d124b291e.zip
Support for NVDIMMs
Change-Id: I8ccf44287bc72a73b16662ba29b71e731c70b30e RTC:173789 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65917 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com> Tested-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Diffstat (limited to 'src/occ_405/pss')
-rwxr-xr-xsrc/occ_405/pss/apss.c19
1 files changed, 18 insertions, 1 deletions
diff --git a/src/occ_405/pss/apss.c b/src/occ_405/pss/apss.c
index 6c68a74..854e24b 100755
--- a/src/occ_405/pss/apss.c
+++ b/src/occ_405/pss/apss.c
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* Contributors Listed Below - COPYRIGHT 2011,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -52,6 +52,8 @@ const apssModeConfigStruct_t G_apss_mode_config = { APSS_MODE_COMPOSITE, 16, 2 }
// Power Measurements (read from APSS every RealTime loop)
apssPwrMeasStruct_t G_apss_pwr_meas = { {0} };
+
+
GPE_BUFFER(initGpioArgs_t G_gpe_apss_initialize_gpio_args);
GPE_BUFFER(setApssModeArgs_t G_gpe_apss_set_mode_args);
@@ -90,6 +92,9 @@ volatile bool G_ApssPwrMeasCompleted = FALSE;
// Used to tell slave inbox that pwr meas is complete but is invalid
volatile bool G_ApssPwrMeasDoneInvalid = FALSE;
+// Used for debug to simulate an EPOW assertion event
+extern uint8_t G_injected_epow_asserted;
+
// Function Specification
//
// Name: dumpHexString
@@ -668,6 +673,18 @@ void reformat_meas_data()
memcpy(G_apss_pwr_meas.adc, &l_buffer[l_index], (G_apss_mode_config.numAdcChannelsToRead * 2));
l_index += (G_apss_mode_config.numAdcChannelsToRead * 2);
memcpy(G_apss_pwr_meas.gpio, &l_buffer[l_index], (G_apss_mode_config.numGpioPortsToRead * 2));
+
+ //Check if injected EPOW has been asserted via debug command
+ if( G_injected_epow_asserted )
+ {
+ uint8_t l_epow_port = G_sysConfigData.apss_gpio_map.nvdimm_epow /
+ NUM_OF_APSS_PINS_PER_GPIO_PORT;
+ uint8_t l_epow_mask = 0x1 <<
+ (G_sysConfigData.apss_gpio_map.nvdimm_epow %
+ NUM_OF_APSS_PINS_PER_GPIO_PORT);
+ G_apss_pwr_meas.gpio[l_epow_port] &= (~l_epow_mask);
+ }
+
// TOD is always located at same offset
memcpy(&G_apss_pwr_meas.tod, &l_buffer[l_continue_meas_length+l_complete_meas_length-8], 8);
}
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