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authorWael El-Essawy <welessa@us.ibm.com>2017-03-22 10:30:48 -0500
committerWael El-Essawy <welessa@us.ibm.com>2017-05-10 13:53:16 -0400
commitcf2258322bb72a2cd868f8eaef25e9a665077f4f (patch)
treef7a9b13ef36943246377ff623ed917fa4fd08ada /src/occ_405/mem/memory_power_control.h
parentff3b5a1c08389bf766de21adcd033e3c7b86af87 (diff)
downloadtalos-occ-cf2258322bb72a2cd868f8eaef25e9a665077f4f.tar.gz
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Memory Power Control when entering and exiting IPS (Idle Power Save)
memory power control settings for IPS/default modes - as defined by memory config data packet version 0x21 - are applied to memory power control registers of all configured ports whenever the OCC enters/exits IPS, respectively. Change-Id: I56514bb8cbab80c6d4877edc74db96f3b011e523 RTC: 165546 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38294 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
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1 files changed, 38 insertions, 0 deletions
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+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_405/mem/memory_power_control.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2011,2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#include <occ_common.h>
+
+// perform memory power control (if needed)
+void amec_mem_power_control(void);
+
+// Check whether the OCC is in IPS
+inline bool is_occ_in_ips(void);
+
+// create the memory power control gpe request IPC task
+void gpe_init_mem_power_control(void);
+
+// schedule the memory power control IPC task
+int gpe_mem_power_control(uint8_t mem_pwr_ctl, uint8_t memIndex, uint8_t wait_idle_gpe);
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