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authorAndres Lugo-Reyes <aalugore@us.ibm.com>2018-02-01 13:20:27 -0600
committerMartha Broyles <mbroyles@us.ibm.com>2018-02-12 13:02:00 -0500
commitfca494dbdcf944718a577bfe0e3c6c01aabb1a69 (patch)
tree780d309e273d95a39ed8fc51537b34d15c64c5d8 /src/occ_405/dimm
parentccdb19fba8c7b6e8623178d38564703896f4510b (diff)
downloadtalos-occ-fca494dbdcf944718a577bfe0e3c6c01aabb1a69.tar.gz
talos-occ-fca494dbdcf944718a577bfe0e3c6c01aabb1a69.zip
Replace Firmware Level with FClip History in error log
-Throttle noisy traces -Add slave clip history to Call Home log Change-Id: If498c4c5b7e445d7b1b43fb16a2790f11166e430 CMVC-Prereq: 1045167 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/53578 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Diffstat (limited to 'src/occ_405/dimm')
-rw-r--r--src/occ_405/dimm/dimm_control.c24
1 files changed, 9 insertions, 15 deletions
diff --git a/src/occ_405/dimm/dimm_control.c b/src/occ_405/dimm/dimm_control.c
index 2b3a43d..6bdb94f 100644
--- a/src/occ_405/dimm/dimm_control.c
+++ b/src/occ_405/dimm/dimm_control.c
@@ -1,11 +1,11 @@
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
-/* $Source: src/occ/cent/centaur_control.c $ */
+/* $Source: src/occ_405/dimm/dimm_control.c $ */
/* */
/* OpenPOWER OnChipController Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* Contributors Listed Below - COPYRIGHT 2015,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -35,6 +35,7 @@
#include "state.h"
#include "amec_sys.h"
#include "memory.h"
+#include "common.h"
//GPE IPC request and parms for the GPE job used for DIMM modules control.
//extern GpeRequest G_dimm_control_request;
@@ -52,7 +53,8 @@ extern memory_control_task_t G_memory_control_task;
// (0x21, format 0x12)
extern uint16_t G_configured_mbas;
-
+// Bit vector that allows certain traces to run
+extern uint16_t G_allow_trace_flags;
//////////////////////////
// Function Specification
//
@@ -116,17 +118,12 @@ void dimm_update_nlimits(uint8_t mc, uint8_t port)
/*------------------------------------------------------------------------*/
/* Local Variables */
/*------------------------------------------------------------------------*/
- static uint32_t L_trace_throttle_count = 0;
+ static bool L_first_trace = true;
uint16_t l_port_dimm_maxn = 0, l_slot_dimm_maxn = 0;
/*------------------------------------------------------------------------*/
/* Code */
/*------------------------------------------------------------------------*/
- if (L_trace_throttle_count == 0)
- {
- L_trace_throttle_count = G_configured_mbas;
- }
-
do
{
memory_throttle_t* l_active_limits;
@@ -165,10 +162,8 @@ void dimm_update_nlimits(uint8_t mc, uint8_t port)
{
l_active_limits->max_n_per_mba = l_slot_dimm_maxn;
- //Don't trace all MCAs changing, just trace one they will all
- //be the same unless there is a different number of DIMMs behind
- //the MCAs or a mix of DIMM sizes is supported
- if(L_trace_throttle_count == G_configured_mbas)
+ if( (L_first_trace) ||
+ (G_allow_trace_flags & ALLOW_MEM_TRACE) )
{
TRAC_IMP("dimm_update_nlimits: New DIMM slot throttle values: "
"MC#|Port:[0x%04x], "
@@ -177,11 +172,10 @@ void dimm_update_nlimits(uint8_t mc, uint8_t port)
(uint32_t)( (l_active_limits->max_n_per_mba << 16) |
l_active_limits->min_n_per_mba),
l_active_limits->max_n_per_chip);
+ L_first_trace = false;
}
}
- L_trace_throttle_count &= ~(0x8000 >> ((mc * (MAX_NUM_MCU_PORTS)) + port));
-
} // NIMBUS_DIMM_THROTTLING_CONFIGURED ?
}while(0);
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