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| author | Ilya Smirnov <ismirno@us.ibm.com> | 2017-07-31 10:35:00 -0500 |
|---|---|---|
| committer | William A. Bryan <wilbryan@us.ibm.com> | 2017-08-21 15:09:44 -0400 |
| commit | 7efcfd6eaba07fbdd3eeed455c81c34e75735dc1 (patch) | |
| tree | e4118313c1ba75cc5491345cc0d9d9005d23ce67 /src/occ_405/common.h | |
| parent | 3b72373a3bfd5716902b48515f96faac683ef8dd (diff) | |
| download | talos-occ-7efcfd6eaba07fbdd3eeed455c81c34e75735dc1.tar.gz talos-occ-7efcfd6eaba07fbdd3eeed455c81c34e75735dc1.zip | |
IPL Time Checkstop Analysis Part 3: OCC bootloader and main
Change-Id: Id4d050f1d78a1921afc839c8b2b382961def64f0
RTC:155065
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43938
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/occ_405/common.h')
| -rw-r--r-- | src/occ_405/common.h | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/occ_405/common.h b/src/occ_405/common.h index ac4a9fd..787af35 100644 --- a/src/occ_405/common.h +++ b/src/occ_405/common.h @@ -1,11 +1,11 @@ /* IBM_PROLOG_BEGIN_TAG */ /* This is an automatically generated prolog. */ /* */ -/* $Source: src/occ/common.h $ */ +/* $Source: src/occ_405/common.h $ */ /* */ /* OpenPOWER OnChipController Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2015 */ +/* Contributors Listed Below - COPYRIGHT 2015,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -27,6 +27,9 @@ #include <rtls.h> +// Start of SRAM memory +#define SRAM_START_ADDRESS_405 0xFFF40000 + // Reasons why the OCCMISC external interrupt was triggered typedef enum { |
