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author | Wael El-Essawy <welessa@us.ibm.com> | 2016-05-02 22:20:14 -0500 |
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committer | Wael El-Essawy <welessa@us.ibm.com> | 2016-05-25 16:19:23 -0400 |
commit | 6d29cab23da5bacaf0772bb8dd6265c4b442760c (patch) | |
tree | d7dee4b726108c87734bd1508abccf47d1a230e4 /src/occ_405/cmdh/cmdh_mnfg_intf.c | |
parent | 6f82299cb1e306dabef5bbae1a9d4e5817dbcea9 (diff) | |
download | talos-occ-6d29cab23da5bacaf0772bb8dd6265c4b442760c.tar.gz talos-occ-6d29cab23da5bacaf0772bb8dd6265c4b442760c.zip |
Pstate Infrastructure & Support config data required for active state
- Support all config data required for active state.
- Set 'active ready' bit in poll response when all config data has been received.
- Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist.
- Put in TODO call PGPE to enable pstates this will also be telling PGPE how to
set PMCR mode register (OCC control pstates or OPAL).
- Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard
codes until PGPE is available.
- Call to "proc_pstate_initialize()" moved to state transition to observation
- Cleanup proc_freq2pstate()
- rewrite amec_slv_freq_smh()
- the calls to proc_set_core_bounds() and proc_set_core_pstate() will be
replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores
or set pstate for all given cores.
- Remove all DCM related code.
Change-Id: I449d188b2cffc345afca19717dcbea037f159114
RTC:130224
RTC:150935
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977
Tested-by: FSP CI Jenkins
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Diffstat (limited to 'src/occ_405/cmdh/cmdh_mnfg_intf.c')
-rwxr-xr-x | src/occ_405/cmdh/cmdh_mnfg_intf.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/occ_405/cmdh/cmdh_mnfg_intf.c b/src/occ_405/cmdh/cmdh_mnfg_intf.c index ff941cc..54bc662 100755 --- a/src/occ_405/cmdh/cmdh_mnfg_intf.c +++ b/src/occ_405/cmdh/cmdh_mnfg_intf.c @@ -282,11 +282,11 @@ uint8_t cmdh_mnfg_mem_slew(const cmdh_fsp_cmd_t * i_cmd_ptr, &G_sysConfigData.mem_throt_limits[l_cent][l_mba]; // Uses values seen on tuleta as defaults - l_throt_ptr->min_ot_n_per_mba = 13; + l_throt_ptr->min_n_per_mba = 13; l_throt_ptr->nom_n_per_mba = 72; l_throt_ptr->nom_n_per_chip = 72; - l_throt_ptr->turbo_n_per_mba = 72; - l_throt_ptr->turbo_n_per_chip = 72; + l_throt_ptr->pcap1_n_per_mba = 72; + l_throt_ptr->pcap2_n_per_mba = 72; l_throt_ptr->ovs_n_per_mba = 72; l_throt_ptr->ovs_n_per_chip = 72; } |